mem: Fix guest corruption when caches handle uncacheable accesses
[gem5.git] / src / mem / protocol / RubySlicc_Types.sm
1 /*
2 * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 // External Types
30
31 //
32 // **PLEASE NOTE!** When adding objects to this file you must also add a line
33 // in the src/mem/ruby/SConscript file. Otherwise the external object's .hh
34 // file will not be copied to the protocol directory and you will encounter a
35 // undefined declaration error.
36 //
37
38 external_type(MessageBuffer, buffer="yes", inport="yes", outport="yes");
39
40 external_type(OutPort, primitive="yes");
41
42 structure(InPort, external = "yes", primitive="yes") {
43 bool isReady();
44 void dequeue();
45 int dequeue_getDelayCycles();
46 void recycle();
47 bool isEmpty();
48 }
49
50 external_type(NodeID, default="0", primitive="yes");
51 external_type(MachineID);
52
53 structure (Set, external = "yes", non_obj="yes") {
54 void setSize(int);
55 void add(NodeID);
56 void addSet(Set);
57 void remove(NodeID);
58 void removeSet(Set);
59 void broadcast();
60 void addRandom();
61 void clear();
62 int count();
63 bool isElement(NodeID);
64 bool isEqual(Set);
65 bool isSuperset(Set);
66 bool intersectionIsEmpty(Set);
67 NodeID smallestElement();
68 }
69
70 structure (NetDest, external = "yes", non_obj="yes") {
71 void setSize(int);
72 void setSize(int, int);
73 void add(NodeID);
74 void add(MachineID);
75 void addSet(Set);
76 void addNetDest(NetDest);
77 void setNetDest(MachineType, Set);
78 void remove(NodeID);
79 void remove(MachineID);
80 void removeSet(Set);
81 void removeNetDest(NetDest);
82 void broadcast();
83 void broadcast(MachineType);
84 void addRandom();
85 void clear();
86 Set toSet();
87 int count();
88 bool isElement(NodeID);
89 bool isElement(MachineID);
90 bool isSuperset(Set);
91 bool isSuperset(NetDest);
92 bool isEmpty();
93 bool intersectionIsEmpty(Set);
94 bool intersectionIsEmpty(NetDest);
95 MachineID smallestElement(MachineType);
96 }
97
98 structure (Sequencer, external = "yes") {
99 void readCallback(Address, DataBlock);
100 void readCallback(Address, GenericMachineType, DataBlock);
101 void readCallback(Address, GenericMachineType, DataBlock, Time, Time, Time);
102 void writeCallback(Address, DataBlock);
103 void writeCallback(Address, GenericMachineType, DataBlock);
104 void writeCallback(Address, GenericMachineType, DataBlock, Time, Time, Time);
105 void checkCoherence(Address);
106 void profileNack(Address, int, int, uint64);
107 void evictionCallback(Address);
108 void recordRequestType(SequencerRequestType);
109 bool checkResourceAvailable(CacheResourceType, Address);
110 }
111
112 structure(RubyRequest, desc="...", interface="Message", external="yes") {
113 Address LineAddress, desc="Line address for this request";
114 Address PhysicalAddress, desc="Physical address for this request";
115 RubyRequestType Type, desc="Type of request (LD, ST, etc)";
116 Address ProgramCounter, desc="Program counter of the instruction that caused the miss";
117 RubyAccessMode AccessMode, desc="user/supervisor access type";
118 int Size, desc="size in bytes of access";
119 PrefetchBit Prefetch, desc="Is this a prefetch request";
120 int contextId, desc="this goes away but must be replace with Nilay";
121 }
122
123 structure(AbstractEntry, primitive="yes", external = "yes") {
124 void changePermission(AccessPermission);
125 }
126
127 structure (DirectoryMemory, external = "yes") {
128 AbstractEntry allocate(Address, AbstractEntry);
129 AbstractEntry lookup(Address);
130 bool isPresent(Address);
131 void invalidateBlock(Address);
132 void recordRequestType(DirectoryRequestType);
133 }
134
135 structure(AbstractCacheEntry, primitive="yes", external = "yes") {
136 void changePermission(AccessPermission);
137 }
138
139 structure (CacheMemory, external = "yes") {
140 bool cacheAvail(Address);
141 Address cacheProbe(Address);
142 AbstractCacheEntry allocate(Address, AbstractCacheEntry);
143 void allocateVoid(Address, AbstractCacheEntry);
144 void deallocate(Address);
145 AbstractCacheEntry lookup(Address);
146 bool isTagPresent(Address);
147 void profileMiss(RubyRequest);
148
149 void profileGenericRequest(GenericRequestType,
150 RubyAccessMode,
151 PrefetchBit);
152
153 void setMRU(Address);
154 void recordRequestType(CacheRequestType);
155 bool checkResourceAvailable(CacheResourceType, Address);
156 }
157
158 structure (WireBuffer, inport="yes", outport="yes", external = "yes") {
159
160 }
161
162 structure (MemoryControl, inport="yes", outport="yes", external = "yes") {
163 void recordRequestType(CacheRequestType);
164 }
165
166 structure (DMASequencer, external = "yes") {
167 void ackCallback();
168 void dataCallback(DataBlock);
169 void recordRequestType(CacheRequestType);
170 }
171
172 structure (TimerTable, inport="yes", external = "yes") {
173 bool isReady();
174 Address readyAddress();
175 void set(Address, int);
176 void unset(Address);
177 bool isSet(Address);
178 }
179
180 structure (GenericBloomFilter, external = "yes") {
181 void clear(int);
182 void increment(Address, int);
183 void decrement(Address, int);
184 void set(Address, int);
185 void unset(Address, int);
186
187 bool isSet(Address, int);
188 int getCount(Address, int);
189 }
190
191 structure (Prefetcher, external = "yes") {
192 void observeMiss(Address, RubyRequestType);
193 void observePfHit(Address);
194 void observePfMiss(Address);
195 }