2 * Copyright (c) 2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 * Authors: Andreas Hansson
40 #ifndef __MEM_QPORT_HH__
41 #define __MEM_QPORT_HH__
45 * Declaration of the queued port.
48 #include "mem/packet_queue.hh"
49 #include "mem/port.hh"
52 * A queued port is a port that has an infinite queue for outgoing
53 * packets and thus decouples the module that wants to send
54 * request/responses from the flow control (retry mechanism) of the
55 * port. A queued port can be used by both a master and a slave. The
56 * queue is a parameter to allow tailoring of the queue implementation
57 * (used in the cache).
59 class QueuedSlavePort : public SlavePort
64 /** Packet queue used to store outgoing requests and responses. */
65 SlavePacketQueue &queue;
67 /** This function is notification that the device should attempt to send a
69 virtual void recvRetry() { queue.retry(); }
74 * Create a QueuedPort with a given name, owner, and a supplied
75 * implementation of a packet queue. The external definition of
76 * the queue enables e.g. the cache to implement a specific queue
77 * behaviuor in a subclass, and provide the latter to the
78 * QueuePort constructor.
80 QueuedSlavePort(const std::string& name, MemObject* owner,
81 SlavePacketQueue &queue) :
82 SlavePort(name, owner), queue(queue)
85 virtual ~QueuedSlavePort() { }
88 * Schedule the sending of a timing response.
90 * @param pkt Packet to send
91 * @param when Absolute time (in ticks) to send packet
93 void schedTimingResp(PacketPtr pkt, Tick when)
94 { queue.schedSendTiming(pkt, when); }
96 /** Check the list of buffered packets against the supplied
97 * functional request. */
98 bool checkFunctional(PacketPtr pkt) { return queue.checkFunctional(pkt); }
100 unsigned int drain(DrainManager *dm) { return queue.drain(dm); }
103 class QueuedMasterPort : public MasterPort
108 /** Packet queue used to store outgoing requests and responses. */
109 MasterPacketQueue &queue;
111 /** This function is notification that the device should attempt to send a
113 virtual void recvRetry() { queue.retry(); }
118 * Create a QueuedPort with a given name, owner, and a supplied
119 * implementation of a packet queue. The external definition of
120 * the queue enables e.g. the cache to implement a specific queue
121 * behaviuor in a subclass, and provide the latter to the
122 * QueuePort constructor.
124 QueuedMasterPort(const std::string& name, MemObject* owner,
125 MasterPacketQueue &queue, PortID id = InvalidPortID) :
126 MasterPort(name, owner, id), queue(queue)
129 virtual ~QueuedMasterPort() { }
132 * Schedule the sending of a timing request.
134 * @param pkt Packet to send
135 * @param when Absolute time (in ticks) to send packet
137 void schedTimingReq(PacketPtr pkt, Tick when)
138 { queue.schedSendTiming(pkt, when); }
141 * Schedule the sending of a timing snoop response.
143 * @param pkt Packet to send
144 * @param when Absolute time (in ticks) to send packet
146 void schedTimingSnoopResp(PacketPtr pkt, Tick when)
147 { queue.schedSendTiming(pkt, when, true); }
149 /** Check the list of buffered packets against the supplied
150 * functional request. */
151 bool checkFunctional(PacketPtr pkt) { return queue.checkFunctional(pkt); }
153 unsigned int drain(DrainManager *dm) { return queue.drain(dm); }
156 #endif // __MEM_QPORT_HH__