src/mem/request.hh

   1 /*
   2  * Copyright (c) 2012-2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  15  * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Ron Dreslinski
  42  *          Steve Reinhardt
  43  *          Ali Saidi
  44  */
  45
  46 /**
  47  * @file
  48  * Declaration of a request, the overall memory request consisting of
  49  the parts of the request that are persistent throughout the transaction.
  50  */
  51
  52 #ifndef __MEM_REQUEST_HH__
  53 #define __MEM_REQUEST_HH__
  54
  55 #include <cassert>
  56 #include <climits>
  57
  58 #include "base/flags.hh"
  59 #include "base/misc.hh"
  60 #include "base/types.hh"
  61 #include "sim/core.hh"
  62
  63 /**
  64  * Special TaskIds that are used for per-context-switch stats dumps
  65  * and Cache Occupancy. Having too many tasks seems to be a problem
  66  * with vector stats. 1024 seems to be a reasonable number that
  67  * doesn't cause a problem with stats and is large enough to realistic
  68  * benchmarks (Linux/Android boot, BBench, etc.)
  69  */
  70
  71 namespace ContextSwitchTaskId {
  72     enum TaskId {
  73         MaxNormalTaskId = 1021, /* Maximum number of normal tasks */
  74         Prefetcher = 1022, /* For cache lines brought in by prefetcher */
  75         DMA = 1023, /* Mostly Table Walker */
  76         Unknown = 1024,
  77         NumTaskId
  78     };
  79 }
  80
  81 class Request;
  82
  83 typedef Request* RequestPtr;
  84 typedef uint16_t MasterID;
  85
  86 class Request
  87 {
  88   public:
  89     typedef uint64_t FlagsType;
  90     typedef uint8_t ArchFlagsType;
  91     typedef ::Flags<FlagsType> Flags;
  92
  93     enum : FlagsType {
  94         /**
  95          * Architecture specific flags.
  96          *
  97          * These bits int the flag field are reserved for
  98          * architecture-specific code. For example, SPARC uses them to
  99          * represent ASIs.
 100          */
 101         ARCH_BITS                   = 0x00000000000000FF,
 102         /** The request was an instruction fetch. */
 103         INST_FETCH                  = 0x0000000000000100,
 104         /** The virtual address is also the physical address. */
 105         PHYSICAL                    = 0x0000000000000200,
 106         /**
 107          * The request is to an uncacheable address.
 108          *
 109          * @note Uncacheable accesses may be reordered by CPU models. The
 110          * STRICT_ORDER flag should be set if such reordering is
 111          * undesirable.
 112          */
 113         UNCACHEABLE                = 0x0000000000000400,
 114         /**
 115          * The request is required to be strictly ordered by <i>CPU
 116          * models</i> and is non-speculative.
 117          *
 118          * A strictly ordered request is guaranteed to never be
 119          * re-ordered or executed speculatively by a CPU model. The
 120          * memory system may still reorder requests in caches unless
 121          * the UNCACHEABLE flag is set as well.
 122          */
 123         STRICT_ORDER                = 0x0000000000000800,
 124         /** This request is to a memory mapped register. */
 125         MMAPPED_IPR                 = 0x0000000000001000,
 126         /** This request is a clear exclusive. */
 127         CLEAR_LL                    = 0x0000000000002000,
 128         /** This request is made in privileged mode. */
 129         PRIVILEGED                  = 0x0000000000004000,
 130
 131         /**
 132          * This is a write that is targeted and zeroing an entire
 133          * cache block.  There is no need for a read/modify/write
 134          */
 135         CACHE_BLOCK_ZERO            = 0x0000000000008000,
 136
 137         /** The request should not cause a memory access. */
 138         NO_ACCESS                   = 0x0000000000100000,
 139         /**
 140          * This request will lock or unlock the accessed memory. When
 141          * used with a load, the access locks the particular chunk of
 142          * memory. When used with a store, it unlocks. The rule is
 143          * that locked accesses have to be made up of a locked load,
 144          * some operation on the data, and then a locked store.
 145          */
 146         LOCKED_RMW                  = 0x0000000000200000,
 147         /** The request is a Load locked/store conditional. */
 148         LLSC                        = 0x0000000000400000,
 149         /** This request is for a memory swap. */
 150         MEM_SWAP                    = 0x0000000000800000,
 151         MEM_SWAP_COND               = 0x0000000001000000,
 152
 153         /** The request is a prefetch. */
 154         PREFETCH                    = 0x0000000002000000,
 155         /** The request should be prefetched into the exclusive state. */
 156         PF_EXCLUSIVE                = 0x0000000004000000,
 157         /** The request should be marked as LRU. */
 158         EVICT_NEXT                  = 0x0000000008000000,
 159         /** The request should be marked with ACQUIRE. */
 160         ACQUIRE                     = 0x0000000001000000,
 161         /** The request should be marked with RELEASE. */
 162         RELEASE                     = 0x0000000002000000,
 163
 164         /**
 165          * The request should be handled by the generic IPR code (only
 166          * valid together with MMAPPED_IPR)
 167          */
 168         GENERIC_IPR                 = 0x0000000004000000,
 169
 170         /** The request targets the secure memory space. */
 171         SECURE                      = 0x0000000008000000,
 172         /** The request is a page table walk */
 173         PT_WALK                     = 0x0000000010000000,
 174
 175         /**
 176          * These flags are *not* cleared when a Request object is
 177          * reused (assigned a new address).
 178          */
 179         STICKY_FLAGS = INST_FETCH
 180     };
 181
 182     /** Master Ids that are statically allocated
 183      * @{*/
 184     enum : MasterID {
 185         /** This master id is used for writeback requests by the caches */
 186         wbMasterId = 0,
 187         /**
 188          * This master id is used for functional requests that
 189          * don't come from a particular device
 190          */
 191         funcMasterId = 1,
 192         /** This master id is used for message signaled interrupts */
 193         intMasterId = 2,
 194         /**
 195          * Invalid master id for assertion checking only. It is
 196          * invalid behavior to ever send this id as part of a request.
 197          */
 198         invldMasterId = std::numeric_limits<MasterID>::max()
 199     };
 200     /** @} */
 201
 202     /** Invalid or unknown Pid. Possible when operating system is not present
 203      *  or has not assigned a pid yet */
 204     static const uint32_t invldPid = std::numeric_limits<uint32_t>::max();
 205
 206   private:
 207     typedef uint8_t PrivateFlagsType;
 208     typedef ::Flags<PrivateFlagsType> PrivateFlags;
 209
 210     enum : PrivateFlagsType {
 211         /** Whether or not the size is valid. */
 212         VALID_SIZE           = 0x00000001,
 213         /** Whether or not paddr is valid (has been written yet). */
 214         VALID_PADDR          = 0x00000002,
 215         /** Whether or not the vaddr & asid are valid. */
 216         VALID_VADDR          = 0x00000004,
 217         /** Whether or not the pc is valid. */
 218         VALID_PC             = 0x00000010,
 219         /** Whether or not the context ID is valid. */
 220         VALID_CONTEXT_ID     = 0x00000020,
 221         VALID_THREAD_ID      = 0x00000040,
 222         /** Whether or not the sc result is valid. */
 223         VALID_EXTRA_DATA     = 0x00000080,
 224
 225         /**
 226          * These flags are *not* cleared when a Request object is reused
 227          * (assigned a new address).
 228          */
 229         STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID | VALID_THREAD_ID
 230     };
 231
 232   private:
 233
 234     /**
 235      * Set up a physical (e.g. device) request in a previously
 236      * allocated Request object.
 237      */
 238     void
 239     setPhys(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
 240     {
 241         assert(size >= 0);
 242         _paddr = paddr;
 243         _size = size;
 244         _time = time;
 245         _masterId = mid;
 246         _flags.clear(~STICKY_FLAGS);
 247         _flags.set(flags);
 248         privateFlags.clear(~STICKY_PRIVATE_FLAGS);
 249         privateFlags.set(VALID_PADDR|VALID_SIZE);
 250         depth = 0;
 251         accessDelta = 0;
 252         //translateDelta = 0;
 253     }
 254
 255     /**
 256      * The physical address of the request. Valid only if validPaddr
 257      * is set.
 258      */
 259     Addr _paddr;
 260
 261     /**
 262      * The size of the request. This field must be set when vaddr or
 263      * paddr is written via setVirt() or setPhys(), so it is always
 264      * valid as long as one of the address fields is valid.
 265      */
 266     unsigned _size;
 267
 268     /** The requestor ID which is unique in the system for all ports
 269      * that are capable of issuing a transaction
 270      */
 271     MasterID _masterId;
 272
 273     /** Flag structure for the request. */
 274     Flags _flags;
 275
 276     /** Private flags for field validity checking. */
 277     PrivateFlags privateFlags;
 278
 279     /**
 280      * The time this request was started. Used to calculate
 281      * latencies. This field is set to curTick() any time paddr or vaddr
 282      * is written.
 283      */
 284     Tick _time;
 285
 286     /**
 287      * The task id associated with this request
 288      */
 289     uint32_t _taskId;
 290
 291     /** The address space ID. */
 292     int _asid;
 293
 294     /** The virtual address of the request. */
 295     Addr _vaddr;
 296
 297     /**
 298      * Extra data for the request, such as the return value of
 299      * store conditional or the compare value for a CAS. */
 300     uint64_t _extraData;
 301
 302     /** The context ID (for statistics, typically). */
 303     int _contextId;
 304     /** The thread ID (id within this CPU) */
 305     ThreadID _threadId;
 306
 307     /** program counter of initiating access; for tracing/debugging */
 308     Addr _pc;
 309
 310   public:
 311
 312     /**
 313      * Minimal constructor. No fields are initialized. (Note that
 314      *  _flags and privateFlags are cleared by Flags default
 315      *  constructor.)
 316      */
 317     Request()
 318         : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
 319           _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
 320           _extraData(0), _contextId(0), _threadId(0), _pc(0),
 321           translateDelta(0), accessDelta(0), depth(0)
 322     {}
 323
 324     /**
 325      * Constructor for physical (e.g. device) requests.  Initializes
 326      * just physical address, size, flags, and timestamp (to curTick()).
 327      * These fields are adequate to perform a request.
 328      */
 329     Request(Addr paddr, unsigned size, Flags flags, MasterID mid)
 330         : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
 331           _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
 332           _extraData(0), _contextId(0), _threadId(0), _pc(0),
 333           translateDelta(0), accessDelta(0), depth(0)
 334     {
 335         setPhys(paddr, size, flags, mid, curTick());
 336     }
 337
 338     Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
 339         : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
 340           _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
 341           _extraData(0), _contextId(0), _threadId(0), _pc(0),
 342           translateDelta(0), accessDelta(0), depth(0)
 343     {
 344         setPhys(paddr, size, flags, mid, time);
 345     }
 346
 347     Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time,
 348             Addr pc)
 349         : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
 350           _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
 351           _extraData(0), _contextId(0), _threadId(0), _pc(0),
 352           translateDelta(0), accessDelta(0), depth(0)
 353     {
 354         setPhys(paddr, size, flags, mid, time);
 355         privateFlags.set(VALID_PC);
 356         _pc = pc;
 357     }
 358
 359     Request(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
 360             Addr pc, int cid, ThreadID tid)
 361         : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
 362           _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
 363           _extraData(0), _contextId(0), _threadId(0), _pc(0),
 364           translateDelta(0), accessDelta(0), depth(0)
 365     {
 366         setVirt(asid, vaddr, size, flags, mid, pc);
 367         setThreadContext(cid, tid);
 368     }
 369
 370     ~Request() {}
 371
 372     /**
 373      * Set up CPU and thread numbers.
 374      */
 375     void
 376     setThreadContext(int context_id, ThreadID tid)
 377     {
 378         _contextId = context_id;
 379         _threadId = tid;
 380         privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
 381     }
 382
 383     /**
 384      * Set up a virtual (e.g., CPU) request in a previously
 385      * allocated Request object.
 386      */
 387     void
 388     setVirt(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
 389             Addr pc)
 390     {
 391         _asid = asid;
 392         _vaddr = vaddr;
 393         _size = size;
 394         _masterId = mid;
 395         _pc = pc;
 396         _time = curTick();
 397
 398         _flags.clear(~STICKY_FLAGS);
 399         _flags.set(flags);
 400         privateFlags.clear(~STICKY_PRIVATE_FLAGS);
 401         privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
 402         depth = 0;
 403         accessDelta = 0;
 404         translateDelta = 0;
 405     }
 406
 407     /**
 408      * Set just the physical address.  This usually used to record the
 409      * result of a translation. However, when using virtualized CPUs
 410      * setPhys() is sometimes called to finalize a physical address
 411      * without a virtual address, so we can't check if the virtual
 412      * address is valid.
 413      */
 414     void
 415     setPaddr(Addr paddr)
 416     {
 417         _paddr = paddr;
 418         privateFlags.set(VALID_PADDR);
 419     }
 420
 421     /**
 422      * Generate two requests as if this request had been split into two
 423      * pieces. The original request can't have been translated already.
 424      */
 425     void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
 426     {
 427         assert(privateFlags.isSet(VALID_VADDR));
 428         assert(privateFlags.noneSet(VALID_PADDR));
 429         assert(split_addr > _vaddr && split_addr < _vaddr + _size);
 430         req1 = new Request(*this);
 431         req2 = new Request(*this);
 432         req1->_size = split_addr - _vaddr;
 433         req2->_vaddr = split_addr;
 434         req2->_size = _size - req1->_size;
 435     }
 436
 437     /**
 438      * Accessor for paddr.
 439      */
 440     bool
 441     hasPaddr() const
 442     {
 443         return privateFlags.isSet(VALID_PADDR);
 444     }
 445
 446     Addr
 447     getPaddr() const
 448     {
 449         assert(privateFlags.isSet(VALID_PADDR));
 450         return _paddr;
 451     }
 452
 453     /**
 454      * Time for the TLB/table walker to successfully translate this request.
 455      */
 456     Tick translateDelta;
 457
 458     /**
 459      * Access latency to complete this memory transaction not including
 460      * translation time.
 461      */
 462     Tick accessDelta;
 463
 464     /**
 465      * Level of the cache hierachy where this request was responded to
 466      * (e.g. 0 = L1; 1 = L2).
 467      */
 468     mutable int depth;
 469
 470     /**
 471      *  Accessor for size.
 472      */
 473     bool
 474     hasSize() const
 475     {
 476         return privateFlags.isSet(VALID_SIZE);
 477     }
 478
 479     unsigned
 480     getSize() const
 481     {
 482         assert(privateFlags.isSet(VALID_SIZE));
 483         return _size;
 484     }
 485
 486     /** Accessor for time. */
 487     Tick
 488     time() const
 489     {
 490         assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
 491         return _time;
 492     }
 493
 494     /** Accessor for flags. */
 495     Flags
 496     getFlags()
 497     {
 498         assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
 499         return _flags;
 500     }
 501
 502     /** Note that unlike other accessors, this function sets *specific
 503         flags* (ORs them in); it does not assign its argument to the
 504         _flags field.  Thus this method should rightly be called
 505         setFlags() and not just flags(). */
 506     void
 507     setFlags(Flags flags)
 508     {
 509         assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
 510         _flags.set(flags);
 511     }
 512
 513     /** Accessor function for vaddr.*/
 514     bool
 515     hasVaddr() const
 516     {
 517         return privateFlags.isSet(VALID_VADDR);
 518     }
 519
 520     Addr
 521     getVaddr() const
 522     {
 523         assert(privateFlags.isSet(VALID_VADDR));
 524         return _vaddr;
 525     }
 526
 527     /** Accesssor for the requestor id. */
 528     MasterID
 529     masterId() const
 530     {
 531         return _masterId;
 532     }
 533
 534     uint32_t
 535     taskId() const
 536     {
 537         return _taskId;
 538     }
 539
 540     void
 541     taskId(uint32_t id) {
 542         _taskId = id;
 543     }
 544
 545     /** Accessor function for asid.*/
 546     int
 547     getAsid() const
 548     {
 549         assert(privateFlags.isSet(VALID_VADDR));
 550         return _asid;
 551     }
 552
 553     /** Accessor function for asid.*/
 554     void
 555     setAsid(int asid)
 556     {
 557         _asid = asid;
 558     }
 559
 560     /** Accessor function for architecture-specific flags.*/
 561     ArchFlagsType
 562     getArchFlags() const
 563     {
 564         assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
 565         return _flags & ARCH_BITS;
 566     }
 567
 568     /** Accessor function to check if sc result is valid. */
 569     bool
 570     extraDataValid() const
 571     {
 572         return privateFlags.isSet(VALID_EXTRA_DATA);
 573     }
 574
 575     /** Accessor function for store conditional return value.*/
 576     uint64_t
 577     getExtraData() const
 578     {
 579         assert(privateFlags.isSet(VALID_EXTRA_DATA));
 580         return _extraData;
 581     }
 582
 583     /** Accessor function for store conditional return value.*/
 584     void
 585     setExtraData(uint64_t extraData)
 586     {
 587         _extraData = extraData;
 588         privateFlags.set(VALID_EXTRA_DATA);
 589     }
 590
 591     bool
 592     hasContextId() const
 593     {
 594         return privateFlags.isSet(VALID_CONTEXT_ID);
 595     }
 596
 597     /** Accessor function for context ID.*/
 598     int
 599     contextId() const
 600     {
 601         assert(privateFlags.isSet(VALID_CONTEXT_ID));
 602         return _contextId;
 603     }
 604
 605     /** Accessor function for thread ID. */
 606     ThreadID
 607     threadId() const
 608     {
 609         assert(privateFlags.isSet(VALID_THREAD_ID));
 610         return _threadId;
 611     }
 612
 613     void
 614     setPC(Addr pc)
 615     {
 616         privateFlags.set(VALID_PC);
 617         _pc = pc;
 618     }
 619
 620     bool
 621     hasPC() const
 622     {
 623         return privateFlags.isSet(VALID_PC);
 624     }
 625
 626     /** Accessor function for pc.*/
 627     Addr
 628     getPC() const
 629     {
 630         assert(privateFlags.isSet(VALID_PC));
 631         return _pc;
 632     }
 633
 634     /**
 635      * Increment/Get the depth at which this request is responded to.
 636      * This currently happens when the request misses in any cache level.
 637      */
 638     void incAccessDepth() const { depth++; }
 639     int getAccessDepth() const { return depth; }
 640
 641     /**
 642      * Set/Get the time taken for this request to be successfully translated.
 643      */
 644     void setTranslateLatency() { translateDelta = curTick() - _time; }
 645     Tick getTranslateLatency() const { return translateDelta; }
 646
 647     /**
 648      * Set/Get the time taken to complete this request's access, not including
 649      *  the time to successfully translate the request.
 650      */
 651     void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; }
 652     Tick getAccessLatency() const { return accessDelta; }
 653
 654     /** Accessor functions for flags.  Note that these are for testing
 655         only; setting flags should be done via setFlags(). */
 656     bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
 657     bool isStrictlyOrdered() const { return _flags.isSet(STRICT_ORDER); }
 658     bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
 659     bool isPrefetch() const { return _flags.isSet(PREFETCH); }
 660     bool isLLSC() const { return _flags.isSet(LLSC); }
 661     bool isPriv() const { return _flags.isSet(PRIVILEGED); }
 662     bool isLockedRMW() const { return _flags.isSet(LOCKED_RMW); }
 663     bool isAcquire() const { return _flags.isSet(ACQUIRE); }
 664     bool isRelease() const { return _flags.isSet(RELEASE); }
 665     bool isAcquireRelease() const {
 666         return _flags.isSet(RELEASE | ACQUIRE);
 667     }
 668     bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
 669     bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
 670     bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); }
 671     bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
 672     bool isSecure() const { return _flags.isSet(SECURE); }
 673     bool isPTWalk() const { return _flags.isSet(PT_WALK); }
 674     void setAcquire() { _flags.set(ACQUIRE); }
 675     void setRelease() { _flags.set(RELEASE); }
 676 };
 677
 678 #endif // __MEM_REQUEST_HH__