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41 * Authors: Ron Dreslinski
48 * Declaration of a request, the overall memory request consisting of
49 the parts of the request that are persistent throughout the transaction.
52 #ifndef __MEM_REQUEST_HH__
53 #define __MEM_REQUEST_HH__
58 #include "base/flags.hh"
59 #include "base/misc.hh"
60 #include "base/types.hh"
61 #include "sim/core.hh"
64 * Special TaskIds that are used for per-context-switch stats dumps
65 * and Cache Occupancy. Having too many tasks seems to be a problem
66 * with vector stats. 1024 seems to be a reasonable number that
67 * doesn't cause a problem with stats and is large enough to realistic
68 * benchmarks (Linux/Android boot, BBench, etc.)
71 namespace ContextSwitchTaskId {
73 MaxNormalTaskId = 1021, /* Maximum number of normal tasks */
74 Prefetcher = 1022, /* For cache lines brought in by prefetcher */
75 DMA = 1023, /* Mostly Table Walker */
83 typedef Request* RequestPtr;
84 typedef uint16_t MasterID;
89 typedef uint32_t FlagsType;
90 typedef uint8_t ArchFlagsType;
91 typedef ::Flags<FlagsType> Flags;
95 * Architecture specific flags.
97 * These bits int the flag field are reserved for
98 * architecture-specific code. For example, SPARC uses them to
101 ARCH_BITS = 0x000000FF,
102 /** The request was an instruction fetch. */
103 INST_FETCH = 0x00000100,
104 /** The virtual address is also the physical address. */
105 PHYSICAL = 0x00000200,
107 * The request is to an uncacheable address.
109 * @note Uncacheable accesses may be reordered by CPU models. The
110 * STRICT_ORDER flag should be set if such reordering is
113 UNCACHEABLE = 0x00000400,
115 * The request is required to be strictly ordered by <i>CPU
116 * models</i> and is non-speculative.
118 * A strictly ordered request is guaranteed to never be
119 * re-ordered or executed speculatively by a CPU model. The
120 * memory system may still reorder requests in caches unless
121 * the UNCACHEABLE flag is set as well.
123 STRICT_ORDER = 0x00000800,
124 /** This request is to a memory mapped register. */
125 MMAPPED_IPR = 0x00002000,
126 /** This request is a clear exclusive. */
127 CLEAR_LL = 0x00004000,
128 /** This request is made in privileged mode. */
129 PRIVILEGED = 0x00008000,
132 * This is a write that is targeted and zeroing an entire
133 * cache block. There is no need for a read/modify/write
135 CACHE_BLOCK_ZERO = 0x00010000,
137 /** The request should not cause a memory access. */
138 NO_ACCESS = 0x00080000,
140 * This request will lock or unlock the accessed memory. When
141 * used with a load, the access locks the particular chunk of
142 * memory. When used with a store, it unlocks. The rule is
143 * that locked accesses have to be made up of a locked load,
144 * some operation on the data, and then a locked store.
146 LOCKED_RMW = 0x00100000,
147 /** The request is a Load locked/store conditional. */
149 /** This request is for a memory swap. */
150 MEM_SWAP = 0x00400000,
151 MEM_SWAP_COND = 0x00800000,
153 /** The request is a prefetch. */
154 PREFETCH = 0x01000000,
155 /** The request should be prefetched into the exclusive state. */
156 PF_EXCLUSIVE = 0x02000000,
157 /** The request should be marked as LRU. */
158 EVICT_NEXT = 0x04000000,
161 * The request should be handled by the generic IPR code (only
162 * valid together with MMAPPED_IPR)
164 GENERIC_IPR = 0x08000000,
166 /** The request targets the secure memory space. */
168 /** The request is a page table walk */
169 PT_WALK = 0x20000000,
172 * These flags are *not* cleared when a Request object is
173 * reused (assigned a new address).
175 STICKY_FLAGS = INST_FETCH
178 /** Master Ids that are statically allocated
181 /** This master id is used for writeback requests by the caches */
184 * This master id is used for functional requests that
185 * don't come from a particular device
188 /** This master id is used for message signaled interrupts */
191 * Invalid master id for assertion checking only. It is
192 * invalid behavior to ever send this id as part of a request.
194 invldMasterId = std::numeric_limits<MasterID>::max()
198 /** Invalid or unknown Pid. Possible when operating system is not present
199 * or has not assigned a pid yet */
200 static const uint32_t invldPid = std::numeric_limits<uint32_t>::max();
203 typedef uint8_t PrivateFlagsType;
204 typedef ::Flags<PrivateFlagsType> PrivateFlags;
206 enum : PrivateFlagsType {
207 /** Whether or not the size is valid. */
208 VALID_SIZE = 0x00000001,
209 /** Whether or not paddr is valid (has been written yet). */
210 VALID_PADDR = 0x00000002,
211 /** Whether or not the vaddr & asid are valid. */
212 VALID_VADDR = 0x00000004,
213 /** Whether or not the pc is valid. */
214 VALID_PC = 0x00000010,
215 /** Whether or not the context ID is valid. */
216 VALID_CONTEXT_ID = 0x00000020,
217 VALID_THREAD_ID = 0x00000040,
218 /** Whether or not the sc result is valid. */
219 VALID_EXTRA_DATA = 0x00000080,
222 * These flags are *not* cleared when a Request object is reused
223 * (assigned a new address).
225 STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID | VALID_THREAD_ID
231 * Set up a physical (e.g. device) request in a previously
232 * allocated Request object.
235 setPhys(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
242 _flags.clear(~STICKY_FLAGS);
244 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
245 privateFlags.set(VALID_PADDR|VALID_SIZE);
248 //translateDelta = 0;
252 * The physical address of the request. Valid only if validPaddr
258 * The size of the request. This field must be set when vaddr or
259 * paddr is written via setVirt() or setPhys(), so it is always
260 * valid as long as one of the address fields is valid.
264 /** The requestor ID which is unique in the system for all ports
265 * that are capable of issuing a transaction
269 /** Flag structure for the request. */
272 /** Private flags for field validity checking. */
273 PrivateFlags privateFlags;
276 * The time this request was started. Used to calculate
277 * latencies. This field is set to curTick() any time paddr or vaddr
283 * The task id associated with this request
287 /** The address space ID. */
290 /** The virtual address of the request. */
294 * Extra data for the request, such as the return value of
295 * store conditional or the compare value for a CAS. */
298 /** The context ID (for statistics, typically). */
300 /** The thread ID (id within this CPU) */
303 /** program counter of initiating access; for tracing/debugging */
309 * Minimal constructor. No fields are initialized. (Note that
310 * _flags and privateFlags are cleared by Flags default
314 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
315 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
316 _extraData(0), _contextId(0), _threadId(0), _pc(0),
317 translateDelta(0), accessDelta(0), depth(0)
321 * Constructor for physical (e.g. device) requests. Initializes
322 * just physical address, size, flags, and timestamp (to curTick()).
323 * These fields are adequate to perform a request.
325 Request(Addr paddr, unsigned size, Flags flags, MasterID mid)
326 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
327 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
328 _extraData(0), _contextId(0), _threadId(0), _pc(0),
329 translateDelta(0), accessDelta(0), depth(0)
331 setPhys(paddr, size, flags, mid, curTick());
334 Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
335 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
336 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
337 _extraData(0), _contextId(0), _threadId(0), _pc(0),
338 translateDelta(0), accessDelta(0), depth(0)
340 setPhys(paddr, size, flags, mid, time);
343 Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time,
345 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
346 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
347 _extraData(0), _contextId(0), _threadId(0), _pc(0),
348 translateDelta(0), accessDelta(0), depth(0)
350 setPhys(paddr, size, flags, mid, time);
351 privateFlags.set(VALID_PC);
355 Request(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
356 Addr pc, int cid, ThreadID tid)
357 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
358 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
359 _extraData(0), _contextId(0), _threadId(0), _pc(0),
360 translateDelta(0), accessDelta(0), depth(0)
362 setVirt(asid, vaddr, size, flags, mid, pc);
363 setThreadContext(cid, tid);
369 * Set up CPU and thread numbers.
372 setThreadContext(int context_id, ThreadID tid)
374 _contextId = context_id;
376 privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
380 * Set up a virtual (e.g., CPU) request in a previously
381 * allocated Request object.
384 setVirt(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
394 _flags.clear(~STICKY_FLAGS);
396 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
397 privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
404 * Set just the physical address. This usually used to record the
405 * result of a translation. However, when using virtualized CPUs
406 * setPhys() is sometimes called to finalize a physical address
407 * without a virtual address, so we can't check if the virtual
414 privateFlags.set(VALID_PADDR);
418 * Generate two requests as if this request had been split into two
419 * pieces. The original request can't have been translated already.
421 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
423 assert(privateFlags.isSet(VALID_VADDR));
424 assert(privateFlags.noneSet(VALID_PADDR));
425 assert(split_addr > _vaddr && split_addr < _vaddr + _size);
426 req1 = new Request(*this);
427 req2 = new Request(*this);
428 req1->_size = split_addr - _vaddr;
429 req2->_vaddr = split_addr;
430 req2->_size = _size - req1->_size;
434 * Accessor for paddr.
439 return privateFlags.isSet(VALID_PADDR);
445 assert(privateFlags.isSet(VALID_PADDR));
450 * Time for the TLB/table walker to successfully translate this request.
455 * Access latency to complete this memory transaction not including
461 * Level of the cache hierachy where this request was responded to
462 * (e.g. 0 = L1; 1 = L2).
472 return privateFlags.isSet(VALID_SIZE);
478 assert(privateFlags.isSet(VALID_SIZE));
482 /** Accessor for time. */
486 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
490 /** Accessor for flags. */
494 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
498 /** Note that unlike other accessors, this function sets *specific
499 flags* (ORs them in); it does not assign its argument to the
500 _flags field. Thus this method should rightly be called
501 setFlags() and not just flags(). */
503 setFlags(Flags flags)
505 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
509 /** Accessor function for vaddr.*/
513 return privateFlags.isSet(VALID_VADDR);
519 assert(privateFlags.isSet(VALID_VADDR));
523 /** Accesssor for the requestor id. */
537 taskId(uint32_t id) {
541 /** Accessor function for asid.*/
545 assert(privateFlags.isSet(VALID_VADDR));
549 /** Accessor function for asid.*/
556 /** Accessor function for architecture-specific flags.*/
560 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
561 return _flags & ARCH_BITS;
564 /** Accessor function to check if sc result is valid. */
566 extraDataValid() const
568 return privateFlags.isSet(VALID_EXTRA_DATA);
571 /** Accessor function for store conditional return value.*/
575 assert(privateFlags.isSet(VALID_EXTRA_DATA));
579 /** Accessor function for store conditional return value.*/
581 setExtraData(uint64_t extraData)
583 _extraData = extraData;
584 privateFlags.set(VALID_EXTRA_DATA);
590 return privateFlags.isSet(VALID_CONTEXT_ID);
593 /** Accessor function for context ID.*/
597 assert(privateFlags.isSet(VALID_CONTEXT_ID));
601 /** Accessor function for thread ID. */
605 assert(privateFlags.isSet(VALID_THREAD_ID));
612 privateFlags.set(VALID_PC);
619 return privateFlags.isSet(VALID_PC);
622 /** Accessor function for pc.*/
626 assert(privateFlags.isSet(VALID_PC));
631 * Increment/Get the depth at which this request is responded to.
632 * This currently happens when the request misses in any cache level.
634 void incAccessDepth() const { depth++; }
635 int getAccessDepth() const { return depth; }
638 * Set/Get the time taken for this request to be successfully translated.
640 void setTranslateLatency() { translateDelta = curTick() - _time; }
641 Tick getTranslateLatency() const { return translateDelta; }
644 * Set/Get the time taken to complete this request's access, not including
645 * the time to successfully translate the request.
647 void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; }
648 Tick getAccessLatency() const { return accessDelta; }
650 /** Accessor functions for flags. Note that these are for testing
651 only; setting flags should be done via setFlags(). */
652 bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
653 bool isStrictlyOrdered() const { return _flags.isSet(STRICT_ORDER); }
654 bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
655 bool isPrefetch() const { return _flags.isSet(PREFETCH); }
656 bool isLLSC() const { return _flags.isSet(LLSC); }
657 bool isPriv() const { return _flags.isSet(PRIVILEGED); }
658 bool isLockedRMW() const { return _flags.isSet(LOCKED_RMW); }
659 bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
660 bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
661 bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); }
662 bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
663 bool isSecure() const { return _flags.isSet(SECURE); }
664 bool isPTWalk() const { return _flags.isSet(PT_WALK); }
667 #endif // __MEM_REQUEST_HH__