2 * Copyright (c) 2012-2013 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Ron Dreslinski
47 * Declaration of a request, the overall memory request consisting of
48 the parts of the request that are persistent throughout the transaction.
51 #ifndef __MEM_REQUEST_HH__
52 #define __MEM_REQUEST_HH__
57 #include "base/flags.hh"
58 #include "base/misc.hh"
59 #include "base/types.hh"
60 #include "sim/core.hh"
63 * Special TaskIds that are used for per-context-switch stats dumps
64 * and Cache Occupancy. Having too many tasks seems to be a problem
65 * with vector stats. 1024 seems to be a reasonable number that
66 * doesn't cause a problem with stats and is large enough to realistic
67 * benchmarks (Linux/Android boot, BBench, etc.)
70 namespace ContextSwitchTaskId {
72 MaxNormalTaskId = 1021, /* Maximum number of normal tasks */
73 Prefetcher = 1022, /* For cache lines brought in by prefetcher */
74 DMA = 1023, /* Mostly Table Walker */
82 typedef Request* RequestPtr;
83 typedef uint16_t MasterID;
88 typedef uint32_t FlagsType;
89 typedef uint8_t ArchFlagsType;
90 typedef ::Flags<FlagsType> Flags;
93 * Architecture specific flags.
95 * These bits int the flag field are reserved for
96 * architecture-specific code. For example, SPARC uses them to
99 static const FlagsType ARCH_BITS = 0x000000FF;
100 /** The request was an instruction fetch. */
101 static const FlagsType INST_FETCH = 0x00000100;
102 /** The virtual address is also the physical address. */
103 static const FlagsType PHYSICAL = 0x00000200;
104 /** The request is an ALPHA VPTE pal access (hw_ld). */
105 static const FlagsType VPTE = 0x00000400;
106 /** Use the alternate mode bits in ALPHA. */
107 static const FlagsType ALTMODE = 0x00000800;
108 /** The request is to an uncacheable address. */
109 static const FlagsType UNCACHEABLE = 0x00001000;
110 /** This request is to a memory mapped register. */
111 static const FlagsType MMAPPED_IPR = 0x00002000;
112 /** This request is a clear exclusive. */
113 static const FlagsType CLEAR_LL = 0x00004000;
114 /** This request is made in privileged mode. */
115 static const FlagsType PRIVILEGED = 0x00008000;
117 /** This is a write that is targeted and zeroing an entire cache block.
118 * There is no need for a read/modify/write
120 static const FlagsType CACHE_BLOCK_ZERO = 0x00010000;
122 /** The request should not cause a memory access. */
123 static const FlagsType NO_ACCESS = 0x00080000;
124 /** This request will lock or unlock the accessed memory. When used with
125 * a load, the access locks the particular chunk of memory. When used
126 * with a store, it unlocks. The rule is that locked accesses have to be
127 * made up of a locked load, some operation on the data, and then a locked
130 static const FlagsType LOCKED = 0x00100000;
131 /** The request is a Load locked/store conditional. */
132 static const FlagsType LLSC = 0x00200000;
133 /** This request is for a memory swap. */
134 static const FlagsType MEM_SWAP = 0x00400000;
135 static const FlagsType MEM_SWAP_COND = 0x00800000;
137 /** The request is a prefetch. */
138 static const FlagsType PREFETCH = 0x01000000;
139 /** The request should be prefetched into the exclusive state. */
140 static const FlagsType PF_EXCLUSIVE = 0x02000000;
141 /** The request should be marked as LRU. */
142 static const FlagsType EVICT_NEXT = 0x04000000;
144 /** The request should be handled by the generic IPR code (only
145 * valid together with MMAPPED_IPR) */
146 static const FlagsType GENERIC_IPR = 0x08000000;
148 /** The request targets the secure memory space. */
149 static const FlagsType SECURE = 0x10000000;
150 /** The request is a page table walk */
151 static const FlagsType PT_WALK = 0x20000000;
153 /** These flags are *not* cleared when a Request object is reused
154 (assigned a new address). */
155 static const FlagsType STICKY_FLAGS = INST_FETCH;
157 /** Request Ids that are statically allocated
159 /** This request id is used for writeback requests by the caches */
160 static const MasterID wbMasterId = 0;
161 /** This request id is used for functional requests that don't come from a
164 static const MasterID funcMasterId = 1;
165 /** This request id is used for message signaled interrupts */
166 static const MasterID intMasterId = 2;
167 /** Invalid request id for assertion checking only. It is invalid behavior
168 * to ever send this id as part of a request.
169 * @todo C++1x replace with numeric_limits when constexpr is added */
170 static const MasterID invldMasterId = USHRT_MAX;
173 /** Invalid or unknown Pid. Possible when operating system is not present
174 * or has not assigned a pid yet */
175 static const uint32_t invldPid = UINT_MAX;
178 typedef uint8_t PrivateFlagsType;
179 typedef ::Flags<PrivateFlagsType> PrivateFlags;
181 /** Whether or not the size is valid. */
182 static const PrivateFlagsType VALID_SIZE = 0x00000001;
183 /** Whether or not paddr is valid (has been written yet). */
184 static const PrivateFlagsType VALID_PADDR = 0x00000002;
185 /** Whether or not the vaddr & asid are valid. */
186 static const PrivateFlagsType VALID_VADDR = 0x00000004;
187 /** Whether or not the pc is valid. */
188 static const PrivateFlagsType VALID_PC = 0x00000010;
189 /** Whether or not the context ID is valid. */
190 static const PrivateFlagsType VALID_CONTEXT_ID = 0x00000020;
191 static const PrivateFlagsType VALID_THREAD_ID = 0x00000040;
192 /** Whether or not the sc result is valid. */
193 static const PrivateFlagsType VALID_EXTRA_DATA = 0x00000080;
195 /** These flags are *not* cleared when a Request object is reused
196 (assigned a new address). */
197 static const PrivateFlagsType STICKY_PRIVATE_FLAGS =
198 VALID_CONTEXT_ID | VALID_THREAD_ID;
202 * The physical address of the request. Valid only if validPaddr
208 * The size of the request. This field must be set when vaddr or
209 * paddr is written via setVirt() or setPhys(), so it is always
210 * valid as long as one of the address fields is valid.
214 /** The requestor ID which is unique in the system for all ports
215 * that are capable of issuing a transaction
219 /** Flag structure for the request. */
222 /** Private flags for field validity checking. */
223 PrivateFlags privateFlags;
226 * The time this request was started. Used to calculate
227 * latencies. This field is set to curTick() any time paddr or vaddr
233 * The task id associated with this request
237 /** The address space ID. */
240 /** The virtual address of the request. */
244 * Extra data for the request, such as the return value of
245 * store conditional or the compare value for a CAS. */
248 /** The context ID (for statistics, typically). */
250 /** The thread ID (id within this CPU) */
253 /** program counter of initiating access; for tracing/debugging */
257 /** Minimal constructor. No fields are initialized.
258 * (Note that _flags and privateFlags are cleared by Flags
259 * default constructor.)
262 : _taskId(ContextSwitchTaskId::Unknown),
263 translateDelta(0), accessDelta(0), depth(0)
267 * Constructor for physical (e.g. device) requests. Initializes
268 * just physical address, size, flags, and timestamp (to curTick()).
269 * These fields are adequate to perform a request.
271 Request(Addr paddr, int size, Flags flags, MasterID mid)
272 : _taskId(ContextSwitchTaskId::Unknown)
274 setPhys(paddr, size, flags, mid);
277 Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time)
278 : _taskId(ContextSwitchTaskId::Unknown)
280 setPhys(paddr, size, flags, mid, time);
283 Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time, Addr pc)
284 : _taskId(ContextSwitchTaskId::Unknown)
286 setPhys(paddr, size, flags, mid, time);
287 privateFlags.set(VALID_PC);
291 Request(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc,
292 int cid, ThreadID tid)
293 : _taskId(ContextSwitchTaskId::Unknown)
295 setVirt(asid, vaddr, size, flags, mid, pc);
296 setThreadContext(cid, tid);
302 * Set up CPU and thread numbers.
305 setThreadContext(int context_id, ThreadID tid)
307 _contextId = context_id;
309 privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
313 * Set up a physical (e.g. device) request in a previously
314 * allocated Request object.
317 setPhys(Addr paddr, int size, Flags flags, MasterID mid, Tick time)
324 _flags.clear(~STICKY_FLAGS);
326 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
327 privateFlags.set(VALID_PADDR|VALID_SIZE);
330 //translateDelta = 0;
334 setPhys(Addr paddr, int size, Flags flags, MasterID mid)
336 setPhys(paddr, size, flags, mid, curTick());
340 * Set up a virtual (e.g., CPU) request in a previously
341 * allocated Request object.
344 setVirt(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc)
354 _flags.clear(~STICKY_FLAGS);
356 privateFlags.clear(~STICKY_PRIVATE_FLAGS);
357 privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
364 * Set just the physical address. This usually used to record the
365 * result of a translation. However, when using virtualized CPUs
366 * setPhys() is sometimes called to finalize a physical address
367 * without a virtual address, so we can't check if the virtual
374 privateFlags.set(VALID_PADDR);
378 * Generate two requests as if this request had been split into two
379 * pieces. The original request can't have been translated already.
381 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2)
383 assert(privateFlags.isSet(VALID_VADDR));
384 assert(privateFlags.noneSet(VALID_PADDR));
385 assert(split_addr > _vaddr && split_addr < _vaddr + _size);
390 req1->_size = split_addr - _vaddr;
391 req2->_vaddr = split_addr;
392 req2->_size = _size - req1->_size;
396 * Accessor for paddr.
401 return privateFlags.isSet(VALID_PADDR);
407 assert(privateFlags.isSet(VALID_PADDR));
412 * Time for the TLB/table walker to successfully translate this request.
417 * Access latency to complete this memory transaction not including
423 * Level of the cache hierachy where this request was responded to
424 * (e.g. 0 = L1; 1 = L2).
434 return privateFlags.isSet(VALID_SIZE);
440 assert(privateFlags.isSet(VALID_SIZE));
444 /** Accessor for time. */
448 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
455 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
459 /** Accessor for flags. */
463 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
467 /** Note that unlike other accessors, this function sets *specific
468 flags* (ORs them in); it does not assign its argument to the
469 _flags field. Thus this method should rightly be called
470 setFlags() and not just flags(). */
472 setFlags(Flags flags)
474 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
479 setArchFlags(Flags flags)
481 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
482 _flags.set(flags & ARCH_BITS);
485 /** Accessor function for vaddr.*/
489 assert(privateFlags.isSet(VALID_VADDR));
493 /** Accesssor for the requestor id. */
507 taskId(uint32_t id) {
511 /** Accessor function for asid.*/
515 assert(privateFlags.isSet(VALID_VADDR));
519 /** Accessor function for asid.*/
526 /** Accessor function for architecture-specific flags.*/
530 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
531 return _flags & ARCH_BITS;
534 /** Accessor function to check if sc result is valid. */
538 return privateFlags.isSet(VALID_EXTRA_DATA);
541 /** Accessor function for store conditional return value.*/
545 assert(privateFlags.isSet(VALID_EXTRA_DATA));
549 /** Accessor function for store conditional return value.*/
551 setExtraData(uint64_t extraData)
553 _extraData = extraData;
554 privateFlags.set(VALID_EXTRA_DATA);
560 return privateFlags.isSet(VALID_CONTEXT_ID);
563 /** Accessor function for context ID.*/
567 assert(privateFlags.isSet(VALID_CONTEXT_ID));
571 /** Accessor function for thread ID. */
575 assert(privateFlags.isSet(VALID_THREAD_ID));
582 privateFlags.set(VALID_PC);
589 return privateFlags.isSet(VALID_PC);
592 /** Accessor function for pc.*/
596 assert(privateFlags.isSet(VALID_PC));
601 * Increment/Get the depth at which this request is responded to.
602 * This currently happens when the request misses in any cache level.
604 void incAccessDepth() { depth++; }
605 int getAccessDepth() const { return depth; }
608 * Set/Get the time taken for this request to be successfully translated.
610 void setTranslateLatency() { translateDelta = curTick() - _time; }
611 Tick getTranslateLatency() const { return translateDelta; }
614 * Set/Get the time taken to complete this request's access, not including
615 * the time to successfully translate the request.
617 void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; }
618 Tick getAccessLatency() const { return accessDelta; }
620 /** Accessor functions for flags. Note that these are for testing
621 only; setting flags should be done via setFlags(). */
622 bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
623 bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
624 bool isPrefetch() const { return _flags.isSet(PREFETCH); }
625 bool isLLSC() const { return _flags.isSet(LLSC); }
626 bool isPriv() const { return _flags.isSet(PRIVILEGED); }
627 bool isLocked() const { return _flags.isSet(LOCKED); }
628 bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
629 bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
630 bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); }
631 bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
632 bool isSecure() const { return _flags.isSet(SECURE); }
633 bool isPTWalk() const { return _flags.isSet(PT_WALK); }
636 #endif // __MEM_REQUEST_HH__