3 # Creates a homogeneous CMP system with a single unified cache per
4 # core and a crossbar network. Uses the default parameters listed
5 # below, which can be overridden if a wrapper script sets the hash
16 L1_CACHE_LATENCY
= "auto"
23 for i
in 0..$
*.size-1
do
25 num_cores
= $
*[i
+1].to_i
28 num_memories
= $
*[i
+1].to_i
31 memory_size_mb
= $
*[i
+1].to_i
37 iface_ports
= Array
.new
40 cache
= SetAssociativeCache
.new("l1u_"+n
.to_s
, L1_CACHE_SIZE_KB
, L1_CACHE_LATENCY
, L1_CACHE_ASSOC
, "PSEUDO_LRU")
41 sequencer
= Sequencer
.new("Sequencer_"+n
.to_s
, cache
, cache
)
42 iface_ports
<< sequencer
43 net_ports
<< MI_example_CacheController
.new("L1CacheController_"+n
.to_s
,
48 num_memories
.times
{ |n
|
49 directory
= DirectoryMemory
.new("DirectoryMemory_"+n
.to_s
, memory_size_mb
/num_memories
)
50 memory_control
= MemoryControl
.new("MemoryControl_"+n
.to_s
)
51 net_ports
<< MI_example_DirectoryController
.new("DirectoryController_"+n
.to_s
,
53 directory
, memory_control
)
56 dma_sequencer
= DMASequencer
.new("DMASequencer_"+n
.to_s
)
57 iface_ports
<< dma_sequencer
58 net_ports
<< DMAController
.new("DMAController_"+n
.to_s
, "DMA", dma_sequencer
)
61 topology
= CrossbarTopology
.new("theTopology", net_ports
)
62 on_chip_net
= Network
.new("theNetwork", topology
)
64 RubySystem
.init(iface_ports
, on_chip_net
)