a7430b06e30468df80eb345420c90860ad727e30
[gem5.git] / src / mem / ruby / network / garnet / fixed-pipeline / VCallocator_d.cc
1 /*
2 * Copyright (c) 2008 Princeton University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Niket Agarwal
29 */
30
31 #include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
32 #include "mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh"
33 #include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
34 #include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
35 #include "mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh"
36
37 VCallocator_d::VCallocator_d(Router_d *router)
38 : Consumer(router)
39 {
40 m_router = router;
41 m_num_vcs = m_router->get_num_vcs();
42 m_vc_per_vnet = m_router->get_vc_per_vnet();
43
44 m_local_arbiter_activity.resize(m_num_vcs/m_vc_per_vnet);
45 m_global_arbiter_activity.resize(m_num_vcs/m_vc_per_vnet);
46 for (int i = 0; i < m_local_arbiter_activity.size(); i++) {
47 m_local_arbiter_activity[i] = 0;
48 m_global_arbiter_activity[i] = 0;
49 }
50 }
51
52 void
53 VCallocator_d::init()
54 {
55 m_input_unit = m_router->get_inputUnit_ref();
56 m_output_unit = m_router->get_outputUnit_ref();
57
58 m_num_inports = m_router->get_num_inports();
59 m_num_outports = m_router->get_num_outports();
60 m_round_robin_invc.resize(m_num_inports);
61 m_round_robin_outvc.resize(m_num_outports);
62 m_outvc_req.resize(m_num_outports);
63 m_outvc_is_req.resize(m_num_outports);
64
65 for (int i = 0; i < m_num_inports; i++) {
66 m_round_robin_invc[i].resize(m_num_vcs);
67
68 for (int j = 0; j < m_num_vcs; j++) {
69 m_round_robin_invc[i][j] = 0;
70 }
71 }
72
73 for (int i = 0; i < m_num_outports; i++) {
74 m_round_robin_outvc[i].resize(m_num_vcs);
75 m_outvc_req[i].resize(m_num_vcs);
76 m_outvc_is_req[i].resize(m_num_vcs);
77
78 for (int j = 0; j < m_num_vcs; j++) {
79 m_round_robin_outvc[i][j].first = 0;
80 m_round_robin_outvc[i][j].second = 0;
81 m_outvc_is_req[i][j] = false;
82
83 m_outvc_req[i][j].resize(m_num_inports);
84
85 for (int k = 0; k < m_num_inports; k++) {
86 m_outvc_req[i][j][k].resize(m_num_vcs);
87 for (int l = 0; l < m_num_vcs; l++) {
88 m_outvc_req[i][j][k][l] = false;
89 }
90 }
91 }
92 }
93 }
94
95 void
96 VCallocator_d::clear_request_vector()
97 {
98 for (int i = 0; i < m_num_outports; i++) {
99 for (int j = 0; j < m_num_vcs; j++) {
100 if (!m_outvc_is_req[i][j])
101 continue;
102 m_outvc_is_req[i][j] = false;
103 for (int k = 0; k < m_num_inports; k++) {
104 for (int l = 0; l < m_num_vcs; l++) {
105 m_outvc_req[i][j][k][l] = false;
106 }
107 }
108 }
109 }
110 }
111
112 void
113 VCallocator_d::wakeup()
114 {
115 arbitrate_invcs(); // First stage of allocation
116 arbitrate_outvcs(); // Second stage of allocation
117
118 clear_request_vector();
119 check_for_wakeup();
120 m_router->call_sw_alloc();
121 }
122
123 bool
124 VCallocator_d::is_invc_candidate(int inport_iter, int invc_iter)
125 {
126 int outport = m_input_unit[inport_iter]->get_route(invc_iter);
127 int vnet = get_vnet(invc_iter);
128 Cycles t_enqueue_time =
129 m_input_unit[inport_iter]->get_enqueue_time(invc_iter);
130
131 int invc_base = vnet*m_vc_per_vnet;
132
133 if ((m_router->get_net_ptr())->isVNetOrdered(vnet)) {
134 for (int vc_offset = 0; vc_offset < m_vc_per_vnet; vc_offset++) {
135 int temp_vc = invc_base + vc_offset;
136 if (m_input_unit[inport_iter]->need_stage(temp_vc, VC_AB_, VA_,
137 m_router->curCycle()) &&
138 (m_input_unit[inport_iter]->get_route(temp_vc) == outport) &&
139 (m_input_unit[inport_iter]->get_enqueue_time(temp_vc) <
140 t_enqueue_time)) {
141 return false;
142 }
143 }
144 }
145 return true;
146 }
147
148 void
149 VCallocator_d::select_outvc(int inport_iter, int invc_iter)
150 {
151 int outport = m_input_unit[inport_iter]->get_route(invc_iter);
152 int vnet = get_vnet(invc_iter);
153 int outvc_base = vnet*m_vc_per_vnet;
154 int num_vcs_per_vnet = m_vc_per_vnet;
155
156 int outvc_offset = m_round_robin_invc[inport_iter][invc_iter];
157 m_round_robin_invc[inport_iter][invc_iter]++;
158
159 if (m_round_robin_invc[inport_iter][invc_iter] >= num_vcs_per_vnet)
160 m_round_robin_invc[inport_iter][invc_iter] = 0;
161
162 for (int outvc_offset_iter = 0; outvc_offset_iter < num_vcs_per_vnet;
163 outvc_offset_iter++) {
164 outvc_offset++;
165 if (outvc_offset >= num_vcs_per_vnet)
166 outvc_offset = 0;
167 int outvc = outvc_base + outvc_offset;
168 if (m_output_unit[outport]->is_vc_idle(outvc, m_router->curCycle())) {
169 m_local_arbiter_activity[vnet]++;
170 m_outvc_req[outport][outvc][inport_iter][invc_iter] = true;
171 if (!m_outvc_is_req[outport][outvc])
172 m_outvc_is_req[outport][outvc] = true;
173 return; // out vc acquired
174 }
175 }
176 }
177
178 void
179 VCallocator_d::arbitrate_invcs()
180 {
181 for (int inport_iter = 0; inport_iter < m_num_inports; inport_iter++) {
182 for (int invc_iter = 0; invc_iter < m_num_vcs; invc_iter++) {
183 if (!((m_router->get_net_ptr())->validVirtualNetwork(
184 get_vnet(invc_iter))))
185 continue;
186
187 if (m_input_unit[inport_iter]->need_stage(invc_iter, VC_AB_,
188 VA_, m_router->curCycle())) {
189 if (!is_invc_candidate(inport_iter, invc_iter))
190 continue;
191
192 select_outvc(inport_iter, invc_iter);
193 }
194 }
195 }
196 }
197
198 void
199 VCallocator_d::arbitrate_outvcs()
200 {
201 for (int outport_iter = 0; outport_iter < m_num_outports; outport_iter++) {
202 for (int outvc_iter = 0; outvc_iter < m_num_vcs; outvc_iter++) {
203 if (!m_outvc_is_req[outport_iter][outvc_iter]) {
204 // No requests for this outvc in this cycle
205 continue;
206 }
207
208 int inport = m_round_robin_outvc[outport_iter][outvc_iter].first;
209 int invc_offset =
210 m_round_robin_outvc[outport_iter][outvc_iter].second;
211 int vnet = get_vnet(outvc_iter);
212 int invc_base = vnet*m_vc_per_vnet;
213 int num_vcs_per_vnet = m_vc_per_vnet;
214
215 m_round_robin_outvc[outport_iter][outvc_iter].second++;
216 if (m_round_robin_outvc[outport_iter][outvc_iter].second >=
217 num_vcs_per_vnet) {
218 m_round_robin_outvc[outport_iter][outvc_iter].second = 0;
219 m_round_robin_outvc[outport_iter][outvc_iter].first++;
220 if (m_round_robin_outvc[outport_iter][outvc_iter].first >=
221 m_num_inports)
222 m_round_robin_outvc[outport_iter][outvc_iter].first = 0;
223 }
224 for (int in_iter = 0; in_iter < m_num_inports*num_vcs_per_vnet;
225 in_iter++) {
226 invc_offset++;
227 if (invc_offset >= num_vcs_per_vnet) {
228 invc_offset = 0;
229 inport++;
230 if (inport >= m_num_inports)
231 inport = 0;
232 }
233 int invc = invc_base + invc_offset;
234 if (m_outvc_req[outport_iter][outvc_iter][inport][invc]) {
235 m_global_arbiter_activity[vnet]++;
236 m_input_unit[inport]->grant_vc(invc, outvc_iter,
237 m_router->curCycle());
238 m_output_unit[outport_iter]->update_vc(
239 outvc_iter, inport, invc);
240 break;
241 }
242 }
243 }
244 }
245 }
246
247 int
248 VCallocator_d::get_vnet(int invc)
249 {
250 int vnet = invc/m_vc_per_vnet;
251 assert(vnet < m_router->get_num_vnets());
252
253 return vnet;
254 }
255
256 void
257 VCallocator_d::check_for_wakeup()
258 {
259 Cycles nextCycle = m_router->curCycle() + Cycles(1);
260
261 for (int i = 0; i < m_num_inports; i++) {
262 for (int j = 0; j < m_num_vcs; j++) {
263 if (m_input_unit[i]->need_stage(j, VC_AB_, VA_, nextCycle)) {
264 m_router->vcarb_req();
265 return;
266 }
267 }
268 }
269 }