2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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30 * The topology here is configurable; it can be a hierachical (default
31 * one) or a 2D torus or a 2D torus with half switches killed. I think
32 * all input port has a one-input-one-output switch connected just to
33 * control and bandwidth, since we don't control bandwidth on input
34 * ports. Basically, the class has a vector of nodes and edges. First
35 * 2*m_nodes elements in the node vector are input and output
36 * ports. Edges are represented in two vectors of src and dest
37 * nodes. All edges have latency.
40 #ifndef __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
41 #define __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
47 #include "mem/ruby/common/Global.hh"
48 #include "mem/ruby/system/NodeID.hh"
49 #include "params/ExtLink.hh"
50 #include "params/IntLink.hh"
51 #include "params/Link.hh"
52 #include "params/Topology.hh"
53 #include "sim/sim_object.hh"
58 typedef std::vector<std::vector<int> > Matrix;
60 class Link : public SimObject
63 typedef LinkParams Params;
64 Link(const Params *p) : SimObject(p) {}
65 const Params *params() const { return (const Params *)_params; }
68 class ExtLink : public Link
71 typedef ExtLinkParams Params;
72 ExtLink(const Params *p) : Link(p) {}
73 const Params *params() const { return (const Params *)_params; }
76 class IntLink : public Link
79 typedef IntLinkParams Params;
80 IntLink(const Params *p) : Link(p) {}
81 const Params *params() const { return (const Params *)_params; }
84 class Topology : public SimObject
87 typedef TopologyParams Params;
88 Topology(const Params *p);
89 virtual ~Topology() {}
90 const Params *params() const { return (const Params *)_params; }
92 int numSwitches() const { return m_number_of_switches; }
93 void createLinks(Network *net, bool isReconfiguration);
95 void initNetworkPtr(Network* net_ptr);
97 const std::string getName() { return m_name; }
98 void printStats(std::ostream& out) const;
100 void printConfig(std::ostream& out) const;
101 void print(std::ostream& out) const { out << "[Topology]"; }
104 SwitchID newSwitchID();
105 void addLink(SwitchID src, SwitchID dest, int link_latency);
106 void addLink(SwitchID src, SwitchID dest, int link_latency,
108 void addLink(SwitchID src, SwitchID dest, int link_latency,
109 int bw_multiplier, int link_weight);
110 void makeLink(Network *net, SwitchID src, SwitchID dest,
111 const NetDest& routing_table_entry, int link_latency, int weight,
112 int bw_multiplier, bool isReconfiguration);
114 //void makeSwitchesPerChip(std::vector<std::vector<SwitchID > > &nodePairs,
115 // std::vector<int> &latencies, std::vector<int> &bw_multis,
116 // int numberOfChips);
118 std::string getDesignStr();
119 // Private copy constructor and assignment operator
120 Topology(const Topology& obj);
121 Topology& operator=(const Topology& obj);
126 int m_number_of_switches;
128 std::vector<AbstractController*> m_controller_vector;
130 std::vector<SwitchID> m_links_src_vector;
131 std::vector<SwitchID> m_links_dest_vector;
132 std::vector<int> m_links_latency_vector;
133 std::vector<int> m_links_weight_vector;
134 std::vector<int> m_bw_multiplier_vector;
136 Matrix m_component_latencies;
137 Matrix m_component_inter_switches;
141 operator<<(std::ostream& out, const Topology& obj)
148 #endif // __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__