src/mem/ruby/network/topologies/MeshDirCorners.py

   1 # Copyright (c) 2010 Advanced Micro Devices, Inc.
   2 # All rights reserved.
   3 #
   4 # Redistribution and use in source and binary forms, with or without
   5 # modification, are permitted provided that the following conditions are
   6 # met: redistributions of source code must retain the above copyright
   7 # notice, this list of conditions and the following disclaimer;
   8 # redistributions in binary form must reproduce the above copyright
   9 # notice, this list of conditions and the following disclaimer in the
  10 # documentation and/or other materials provided with the distribution;
  11 # neither the name of the copyright holders nor the names of its
  12 # contributors may be used to endorse or promote products derived from
  13 # this software without specific prior written permission.
  14 #
  15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 #
  27 # Authors: Brad Beckmann
  28
  29 from m5.params import *
  30 from m5.objects import *
  31
  32 # This file contains a special network creation function.  This
  33 # networks is not general and will only work with specific system
  34 # configurations.  The network specified is similar to GEMS old file
  35 # specified network.
  36
  37 def makeTopology(nodes, options):
  38     num_routers = options.num_cpus
  39     num_rows = options.mesh_rows
  40
  41     # First determine which nodes are cache cntrls vs. dirs vs. dma
  42     cache_nodes = []
  43     dir_nodes = []
  44     dma_nodes = []
  45     for node in nodes:
  46         if node.type == 'L1Cache_Controller' or \
  47            node.type == 'L2Cache_Controller':
  48             cache_nodes.append(node)
  49         elif node.type == 'Directory_Controller':
  50             dir_nodes.append(node)
  51         elif node.type == 'DMA_Controller':
  52             dma_nodes.append(node)
  53
  54     # Obviously the number or rows must be <= the number of routers
  55     # and evenly divisible.  Also the number of caches must be a
  56     # multiple of the number of routers and the number of directories
  57     # must be four.
  58     assert(num_rows <= num_routers)
  59     num_columns = int(num_routers / num_rows)
  60     assert(num_columns * num_rows == num_routers)
  61     caches_per_router, remainder = divmod(len(cache_nodes), num_routers)
  62     assert(remainder == 0)
  63     assert(len(dir_nodes) == 4)
  64
  65     # Connect each cache controller to the appropriate router
  66     ext_links = []
  67     for (i, n) in enumerate(cache_nodes):
  68         cntrl_level, router_id = divmod(i, num_routers)
  69         assert(cntrl_level < caches_per_router)
  70         ext_links.append(ExtLink(ext_node=n, int_node=router_id))
  71
  72     # Connect the dir nodes to the corners.
  73     ext_links.append(ExtLink(ext_node=dir_nodes[0], int_node=0))
  74     ext_links.append(ExtLink(ext_node=dir_nodes[1],
  75                              int_node=(num_columns - 1)))
  76
  77     ext_links.append(ExtLink(ext_node=dir_nodes[2],
  78                              int_node=(num_routers - num_columns)))
  79
  80     ext_links.append(ExtLink(ext_node=dir_nodes[3],
  81                              int_node=(num_routers - 1)))
  82
  83     # Connect the dma nodes to router 0.  These should only be DMA nodes.
  84     for (i, node) in enumerate(dma_nodes):
  85         assert(node.type == 'DMA_Controller')
  86         ext_links.append(ExtLink(ext_node=node, int_node=0))
  87
  88     # Create the mesh links.  First row (east-west) links then column
  89     # (north-south) links
  90     int_links = []
  91     for row in xrange(num_rows):
  92         for col in xrange(num_columns):
  93             if (col + 1 < num_columns):
  94                 east_id = col + (row * num_columns)
  95                 west_id = (col + 1) + (row * num_columns)
  96                 int_links.append(IntLink(node_a=east_id,
  97                                          node_b=west_id,
  98                                          weight=1))
  99     for col in xrange(num_columns):
 100         for row in xrange(num_rows):
 101             if (row + 1 < num_rows):
 102                 north_id = col + (row * num_columns)
 103                 south_id = col + ((row + 1) * num_columns)
 104                 int_links.append(IntLink(node_a=north_id,
 105                                          node_b=south_id,
 106                                          weight=2))
 107
 108     return Topology(ext_links=ext_links,
 109                     int_links=int_links,
 110                     num_int_nodes=num_routers)
 111