2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 This file has been modified by Kevin Moore and Dan Nussbaum of the
31 Scalable Systems Research Group at Sun Microsystems Laboratories
32 (http://research.sun.com/scalable/) to support the Adaptive
33 Transactional Memory Test Platform (ATMTP).
35 Please send email to atmtp-interest@sun.com with feedback, questions, or
36 to request future announcements about ATMTP.
38 ----------------------------------------------------------------------
40 File modification date: 2008-02-23
42 ----------------------------------------------------------------------
45 #ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46 #define __MEM_RUBY_PROFILER_PROFILER_HH__
53 #include "base/hashmap.hh"
54 #include "mem/protocol/AccessType.hh"
55 #include "mem/protocol/GenericMachineType.hh"
56 #include "mem/protocol/GenericRequestType.hh"
57 #include "mem/protocol/PrefetchBit.hh"
58 #include "mem/protocol/RubyAccessMode.hh"
59 #include "mem/protocol/RubyRequestType.hh"
60 #include "mem/ruby/common/Address.hh"
61 #include "mem/ruby/common/Global.hh"
62 #include "mem/ruby/common/Histogram.hh"
63 #include "mem/ruby/common/Set.hh"
64 #include "mem/ruby/system/MachineID.hh"
65 #include "mem/ruby/system/MemoryControl.hh"
66 #include "params/RubyProfiler.hh"
67 #include "sim/sim_object.hh"
70 class AddressProfiler;
72 class Profiler : public SimObject
75 typedef RubyProfilerParams Params;
76 Profiler(const Params *);
81 void setPeriodicStatsFile(const std::string& filename);
82 void setPeriodicStatsInterval(int64_t period);
84 void printStats(std::ostream& out, bool short_stats=false);
85 void printShortStats(std::ostream& out) { printStats(out, true); }
86 void printTraceStats(std::ostream& out) const;
88 void printResourceUsage(std::ostream& out) const;
90 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
91 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
93 void addAddressTraceSample(const RubyRequest& msg, NodeID id);
95 void profileRequest(const std::string& requestStr);
96 void profileSharing(const Address& addr, AccessType type,
97 NodeID requestor, const Set& sharers,
100 void profileMulticastRetry(const Address& addr, int count);
102 void profileFilterAction(int action);
104 void profileConflictingRequests(const Address& addr);
107 profileOutstandingRequest(int outstanding)
109 m_outstanding_requests.add(outstanding);
113 profileOutstandingPersistentRequest(int outstanding)
115 m_outstanding_persistent_requests.add(outstanding);
119 profileAverageLatencyEstimate(int latency)
121 m_average_latency_estimate.add(latency);
124 void recordPrediction(bool wasGood, bool wasPredicted);
126 void startTransaction(int cpu);
127 void endTransaction(int cpu);
128 void profilePFWait(Time waitTime);
130 void controllerBusy(MachineID machID);
133 void missLatency(Time t,
134 RubyRequestType type,
135 const GenericMachineType respondingMach);
137 void missLatencyWcc(Time issuedTime,
138 Time initialRequestTime,
139 Time forwardRequestTime,
140 Time firstResponseTime,
141 Time completionTime);
143 void missLatencyDir(Time issuedTime,
144 Time initialRequestTime,
145 Time forwardRequestTime,
146 Time firstResponseTime,
147 Time completionTime);
149 void swPrefetchLatency(Time t,
150 RubyRequestType type,
151 const GenericMachineType respondingMach);
153 void sequencerRequests(int num) { m_sequencer_requests.add(num); }
155 void profileMsgDelay(uint32_t virtualNetwork, Time delayCycles);
157 void print(std::ostream& out) const;
159 void rubyWatch(int proc);
160 bool watchAddress(Address addr);
162 // return Ruby's start time
170 bool getHotLines() { return m_hot_lines; }
171 bool getAllInstructions() { return m_all_instructions; }
174 // Private copy constructor and assignment operator
175 Profiler(const Profiler& obj);
176 Profiler& operator=(const Profiler& obj);
178 AddressProfiler* m_address_profiler_ptr;
179 AddressProfiler* m_inst_profiler_ptr;
181 std::vector<int64> m_instructions_executed_at_start;
182 std::vector<int64> m_cycles_executed_at_start;
184 std::ostream* m_periodic_output_file_ptr;
185 int64_t m_stats_period;
188 time_t m_real_time_start_time;
190 std::vector<std::vector<int64_t> > m_busyControllerCount;
191 int64_t m_busyBankCount;
192 Histogram m_multicast_retry_histogram;
194 Histogram m_filter_action_histogram;
195 Histogram m_tbeProfile;
197 Histogram m_sequencer_requests;
198 Histogram m_read_sharing_histogram;
199 Histogram m_write_sharing_histogram;
200 Histogram m_all_sharing_histogram;
201 int64 m_cache_to_cache;
202 int64 m_memory_to_cache;
204 Histogram m_prefetchWaitHistogram;
206 std::vector<Histogram> m_missLatencyHistograms;
207 std::vector<Histogram> m_machLatencyHistograms;
208 std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
209 Histogram m_wCCIssueToInitialRequestHistogram;
210 Histogram m_wCCInitialRequestToForwardRequestHistogram;
211 Histogram m_wCCForwardRequestToFirstResponseHistogram;
212 Histogram m_wCCFirstResponseToCompleteHistogram;
213 int64 m_wCCIncompleteTimes;
214 Histogram m_dirIssueToInitialRequestHistogram;
215 Histogram m_dirInitialRequestToForwardRequestHistogram;
216 Histogram m_dirForwardRequestToFirstResponseHistogram;
217 Histogram m_dirFirstResponseToCompleteHistogram;
218 int64 m_dirIncompleteTimes;
220 Histogram m_allMissLatencyHistogram;
222 Histogram m_allSWPrefetchLatencyHistogram;
223 Histogram m_SWPrefetchL2MissLatencyHistogram;
224 std::vector<Histogram> m_SWPrefetchLatencyHistograms;
225 std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
227 Histogram m_delayedCyclesHistogram;
228 Histogram m_delayedCyclesNonPFHistogram;
229 std::vector<Histogram> m_delayedCyclesVCHistograms;
231 Histogram m_outstanding_requests;
232 Histogram m_outstanding_persistent_requests;
234 Histogram m_average_latency_estimate;
236 m5::hash_set<Address> m_watch_address_set;
237 // counts all initiated cache request including PUTs
239 std::map<std::string, int> m_requestProfileMap;
243 bool m_all_instructions;
245 int m_num_of_sequencers;
248 class ProfileEvent : public Event
251 ProfileEvent(Profiler *_profiler)
253 profiler = _profiler;
256 void process() { profiler->wakeup(); }
259 ProfileEvent m_event;
263 operator<<(std::ostream& out, const Profiler& obj)
270 #endif // __MEM_RUBY_PROFILER_PROFILER_HH__