Ruby: Resurrect Cache Warmup Capability
[gem5.git] / src / mem / ruby / system / Sequencer.hh
1 /*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30 #define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32 #include <iostream>
33
34 #include "base/hashmap.hh"
35 #include "mem/protocol/GenericMachineType.hh"
36 #include "mem/protocol/RubyRequestType.hh"
37 #include "mem/ruby/common/Address.hh"
38 #include "mem/ruby/common/Consumer.hh"
39 #include "mem/ruby/system/RubyPort.hh"
40
41 class DataBlock;
42 class CacheMemory;
43
44 class RubySequencerParams;
45
46 struct SequencerRequest
47 {
48 PacketPtr pkt;
49 RubyRequestType m_type;
50 Time issue_time;
51
52 SequencerRequest(PacketPtr _pkt, RubyRequestType _m_type, Time _issue_time)
53 : pkt(_pkt), m_type(_m_type), issue_time(_issue_time)
54 {}
55 };
56
57 std::ostream& operator<<(std::ostream& out, const SequencerRequest& obj);
58
59 class Sequencer : public RubyPort, public Consumer
60 {
61 public:
62 typedef RubySequencerParams Params;
63 Sequencer(const Params *);
64 ~Sequencer();
65
66 // Public Methods
67 void wakeup(); // Used only for deadlock detection
68
69 void printConfig(std::ostream& out) const;
70
71 void printProgress(std::ostream& out) const;
72
73 void writeCallback(const Address& address, DataBlock& data);
74
75 void writeCallback(const Address& address,
76 GenericMachineType mach,
77 DataBlock& data);
78
79 void writeCallback(const Address& address,
80 GenericMachineType mach,
81 DataBlock& data,
82 Time initialRequestTime,
83 Time forwardRequestTime,
84 Time firstResponseTime);
85
86 void readCallback(const Address& address, DataBlock& data);
87
88 void readCallback(const Address& address,
89 GenericMachineType mach,
90 DataBlock& data);
91
92 void readCallback(const Address& address,
93 GenericMachineType mach,
94 DataBlock& data,
95 Time initialRequestTime,
96 Time forwardRequestTime,
97 Time firstResponseTime);
98
99 RequestStatus makeRequest(PacketPtr pkt);
100 bool empty() const;
101 int outstandingCount() const { return m_outstanding_count; }
102 bool
103 isDeadlockEventScheduled() const
104 {
105 return deadlockCheckEvent.scheduled();
106 }
107
108 void
109 descheduleDeadlockEvent()
110 {
111 deschedule(deadlockCheckEvent);
112 }
113
114 void print(std::ostream& out) const;
115 void printStats(std::ostream& out) const;
116 void checkCoherence(const Address& address);
117
118 void markRemoved();
119 void removeRequest(SequencerRequest* request);
120
121 private:
122 void issueRequest(PacketPtr pkt, RubyRequestType type);
123
124 void hitCallback(SequencerRequest* request,
125 GenericMachineType mach,
126 DataBlock& data,
127 bool success,
128 Time initialRequestTime,
129 Time forwardRequestTime,
130 Time firstResponseTime);
131
132 RequestStatus insertRequest(PacketPtr pkt, RubyRequestType request_type);
133
134 bool handleLlsc(const Address& address, SequencerRequest* request);
135
136 // Private copy constructor and assignment operator
137 Sequencer(const Sequencer& obj);
138 Sequencer& operator=(const Sequencer& obj);
139
140 private:
141 int m_max_outstanding_requests;
142 int m_deadlock_threshold;
143
144 CacheMemory* m_dataCache_ptr;
145 CacheMemory* m_instCache_ptr;
146
147 typedef m5::hash_map<Address, SequencerRequest*> RequestTable;
148 RequestTable m_writeRequestTable;
149 RequestTable m_readRequestTable;
150 // Global outstanding request count, across all request tables
151 int m_outstanding_count;
152 bool m_deadlock_check_scheduled;
153
154 int m_store_waiting_on_load_cycles;
155 int m_store_waiting_on_store_cycles;
156 int m_load_waiting_on_store_cycles;
157 int m_load_waiting_on_load_cycles;
158
159 bool m_usingNetworkTester;
160
161 class SequencerWakeupEvent : public Event
162 {
163 private:
164 Sequencer *m_sequencer_ptr;
165
166 public:
167 SequencerWakeupEvent(Sequencer *_seq) : m_sequencer_ptr(_seq) {}
168 void process() { m_sequencer_ptr->wakeup(); }
169 const char *description() const { return "Sequencer deadlock check"; }
170 };
171
172 SequencerWakeupEvent deadlockCheckEvent;
173 };
174
175 inline std::ostream&
176 operator<<(std::ostream& out, const Sequencer& obj)
177 {
178 obj.print(out);
179 out << std::flush;
180 return out;
181 }
182
183 #endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__
184