7f047ef1f5607a80b300bd24036d67fde9161afa
[gem5.git] / src / mem / serial_link.hh
1 /*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2015 The University of Bologna
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 /**
43 * @file
44 * Declaration of the SerialLink Class, modeling Hybrid-Memory-Cube's serial
45 * interface.
46 */
47
48 #ifndef __MEM_SERIAL_LINK_HH__
49 #define __MEM_SERIAL_LINK_HH__
50
51 #include <deque>
52
53 #include "base/types.hh"
54 #include "mem/port.hh"
55 #include "params/SerialLink.hh"
56 #include "sim/clocked_object.hh"
57
58 /**
59 * SerialLink is a simple variation of the Bridge class, with the ability to
60 * account for the latency of packet serialization. We assume that the
61 * serializer component at the transmitter side does not need to receive the
62 * whole packet to start the serialization. But the deserializer waits for the
63 * complete packet to check its integrity first.
64 */
65 class SerialLink : public ClockedObject
66 {
67 protected:
68
69 /**
70 * A deferred packet stores a packet along with its scheduled
71 * transmission time
72 */
73 class DeferredPacket
74 {
75
76 public:
77
78 const Tick tick;
79 const PacketPtr pkt;
80
81 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
82 { }
83 };
84
85 // Forward declaration to allow the slave port to have a pointer
86 class SerialLinkMasterPort;
87
88 /**
89 * The port on the side that receives requests and sends
90 * responses. The slave port has a set of address ranges that it
91 * is responsible for. The slave port also has a buffer for the
92 * responses not yet sent.
93 */
94 class SerialLinkSlavePort : public ResponsePort
95 {
96
97 private:
98
99 /** The serial_link to which this port belongs. */
100 SerialLink& serial_link;
101
102 /**
103 * Master port on the other side of the serial_link.
104 */
105 SerialLinkMasterPort& masterPort;
106
107 /** Minimum request delay though this serial_link. */
108 const Cycles delay;
109
110 /** Address ranges to pass through the serial_link */
111 const AddrRangeList ranges;
112
113 /**
114 * Response packet queue. Response packets are held in this
115 * queue for a specified delay to model the processing delay
116 * of the serial_link. We use a deque as we need to iterate over
117 * the items for functional accesses.
118 */
119 std::deque<DeferredPacket> transmitList;
120
121 /** Counter to track the outstanding responses. */
122 unsigned int outstandingResponses;
123
124 /** If we should send a retry when space becomes available. */
125 bool retryReq;
126
127 /** Max queue size for reserved responses. */
128 unsigned int respQueueLimit;
129
130 /**
131 * Is this side blocked from accepting new response packets.
132 *
133 * @return true if the reserved space has reached the set limit
134 */
135 bool respQueueFull() const;
136
137 /**
138 * Handle send event, scheduled when the packet at the head of
139 * the response queue is ready to transmit (for timing
140 * accesses only).
141 */
142 void trySendTiming();
143
144 /** Send event for the response queue. */
145 EventFunctionWrapper sendEvent;
146
147 public:
148
149 /**
150 * Constructor for the SerialLinkSlavePort.
151 *
152 * @param _name the port name including the owner
153 * @param _serial_link the structural owner
154 * @param _masterPort the master port on the other side of the
155 * serial_link
156 * @param _delay the delay in cycles from receiving to sending
157 * @param _resp_limit the size of the response queue
158 * @param _ranges a number of address ranges to forward
159 */
160 SerialLinkSlavePort(const std::string& _name, SerialLink&
161 _serial_link, SerialLinkMasterPort& _masterPort,
162 Cycles _delay, int _resp_limit, const
163 std::vector<AddrRange>& _ranges);
164
165 /**
166 * Queue a response packet to be sent out later and also schedule
167 * a send if necessary.
168 *
169 * @param pkt a response to send out after a delay
170 * @param when tick when response packet should be sent
171 */
172 void schedTimingResp(PacketPtr pkt, Tick when);
173
174 /**
175 * Retry any stalled request that we have failed to accept at
176 * an earlier point in time. This call will do nothing if no
177 * request is waiting.
178 */
179 void retryStalledReq();
180
181 protected:
182
183 /** When receiving a timing request from the peer port,
184 pass it to the serial_link. */
185 bool recvTimingReq(PacketPtr pkt);
186
187 /** When receiving a retry request from the peer port,
188 pass it to the serial_link. */
189 void recvRespRetry();
190
191 /** When receiving a Atomic requestfrom the peer port,
192 pass it to the serial_link. */
193 Tick recvAtomic(PacketPtr pkt);
194
195 /** When receiving a Functional request from the peer port,
196 pass it to the serial_link. */
197 void recvFunctional(PacketPtr pkt);
198
199 /** When receiving a address range request the peer port,
200 pass it to the serial_link. */
201 AddrRangeList getAddrRanges() const;
202 };
203
204
205 /**
206 * Port on the side that forwards requests and receives
207 * responses. The master port has a buffer for the requests not
208 * yet sent.
209 */
210 class SerialLinkMasterPort : public RequestPort
211 {
212
213 private:
214
215 /** The serial_link to which this port belongs. */
216 SerialLink& serial_link;
217
218 /**
219 * The slave port on the other side of the serial_link.
220 */
221 SerialLinkSlavePort& slavePort;
222
223 /** Minimum delay though this serial_link. */
224 const Cycles delay;
225
226 /**
227 * Request packet queue. Request packets are held in this
228 * queue for a specified delay to model the processing delay
229 * of the serial_link. We use a deque as we need to iterate over
230 * the items for functional accesses.
231 */
232 std::deque<DeferredPacket> transmitList;
233
234 /** Max queue size for request packets */
235 const unsigned int reqQueueLimit;
236
237 /**
238 * Handle send event, scheduled when the packet at the head of
239 * the outbound queue is ready to transmit (for timing
240 * accesses only).
241 */
242 void trySendTiming();
243
244 /** Send event for the request queue. */
245 EventFunctionWrapper sendEvent;
246
247 public:
248
249 /**
250 * Constructor for the SerialLinkMasterPort.
251 *
252 * @param _name the port name including the owner
253 * @param _serial_link the structural owner
254 * @param _slavePort the slave port on the other side of the
255 * serial_link
256 * @param _delay the delay in cycles from receiving to sending
257 * @param _req_limit the size of the request queue
258 */
259 SerialLinkMasterPort(const std::string& _name, SerialLink&
260 _serial_link, SerialLinkSlavePort& _slavePort, Cycles
261 _delay, int _req_limit);
262
263 /**
264 * Is this side blocked from accepting new request packets.
265 *
266 * @return true if the occupied space has reached the set limit
267 */
268 bool reqQueueFull() const;
269
270 /**
271 * Queue a request packet to be sent out later and also schedule
272 * a send if necessary.
273 *
274 * @param pkt a request to send out after a delay
275 * @param when tick when response packet should be sent
276 */
277 void schedTimingReq(PacketPtr pkt, Tick when);
278
279 /**
280 * Check a functional request against the packets in our
281 * request queue.
282 *
283 * @param pkt packet to check against
284 *
285 * @return true if we find a match
286 */
287 bool trySatisfyFunctional(PacketPtr pkt);
288
289 protected:
290
291 /** When receiving a timing request from the peer port,
292 pass it to the serial_link. */
293 bool recvTimingResp(PacketPtr pkt);
294
295 /** When receiving a retry request from the peer port,
296 pass it to the serial_link. */
297 void recvReqRetry();
298 };
299
300 /** Slave port of the serial_link. */
301 SerialLinkSlavePort slavePort;
302
303 /** Master port of the serial_link. */
304 SerialLinkMasterPort masterPort;
305
306 /** Number of parallel lanes in this serial link */
307 unsigned num_lanes;
308
309 /** Speed of each link (Gb/s) in this serial link */
310 uint64_t link_speed;
311
312 public:
313
314 Port &getPort(const std::string &if_name,
315 PortID idx=InvalidPortID);
316
317 virtual void init();
318
319 typedef SerialLinkParams Params;
320
321 SerialLink(SerialLinkParams *p);
322 };
323
324 #endif //__MEM_SERIAL_LINK_HH__