a67b4825fb9e3978b19889ce3ca785291996e55e
2 * Copyright (c) 2010-2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
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14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
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18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
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21 * redistributions in binary form must reproduce the above copyright
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23 * documentation and/or other materials provided with the distribution;
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25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Ron Dreslinski
45 #include "base/random.hh"
46 #include "mem/simple_mem.hh"
50 SimpleMemory::SimpleMemory(const SimpleMemoryParams
* p
) :
52 port(name() + ".port", *this), lat(p
->latency
),
53 lat_var(p
->latency_var
), bandwidth(p
->bandwidth
),
54 isBusy(false), retryReq(false), releaseEvent(this)
61 // allow unconnected memories as this is used in several ruby
62 // systems at the moment
63 if (port
.isConnected()) {
64 port
.sendRangeChange();
69 SimpleMemory::calculateLatency(PacketPtr pkt
)
71 if (pkt
->memInhibitAsserted()) {
76 latency
+= random_mt
.random
<Tick
>(0, lat_var
);
82 SimpleMemory::doAtomicAccess(PacketPtr pkt
)
85 return calculateLatency(pkt
);
89 SimpleMemory::doFunctionalAccess(PacketPtr pkt
)
91 functionalAccess(pkt
);
95 SimpleMemory::recvTimingReq(PacketPtr pkt
)
97 if (pkt
->memInhibitAsserted()) {
98 // snooper will supply based on copy of packet
99 // still target's responsibility to delete packet
104 // we should never get a new request after committing to retry the
105 // current one, the bus violates the rule as it simply sends a
106 // retry to the next one waiting on the retry list, so simply
111 // if we are busy with a read or write, remember that we have to
118 // update the release time according to the bandwidth limit, and
119 // do so with respect to the time it takes to finish this request
120 // rather than long term as it is the short term data rate that is
121 // limited for any real memory
123 // only look at reads and writes when determining if we are busy,
124 // and for how long, as it is not clear what to regulate for the
125 // other types of commands
126 if (pkt
->isRead() || pkt
->isWrite()) {
127 // calculate an appropriate tick to release to not exceed
128 // the bandwidth limit
129 Tick duration
= pkt
->getSize() * bandwidth
;
131 // only consider ourselves busy if there is any need to wait
132 // to avoid extra events being scheduled for (infinitely) fast
135 schedule(releaseEvent
, curTick() + duration
);
140 // go ahead and deal with the packet and put the response in the
141 // queue if there is one
142 bool needsResponse
= pkt
->needsResponse();
143 Tick latency
= doAtomicAccess(pkt
);
144 // turn packet around to go back to requester if response expected
146 // doAtomicAccess() should already have turned packet into
148 assert(pkt
->isResponse());
149 port
.schedTimingResp(pkt
, curTick() + latency
);
158 SimpleMemory::release()
169 SimpleMemory::getSlavePort(const std::string
&if_name
, int idx
)
171 if (if_name
!= "port") {
172 return MemObject::getSlavePort(if_name
, idx
);
179 SimpleMemory::drain(Event
*de
)
181 int count
= port
.drain(de
);
184 changeState(Draining
);
186 changeState(Drained
);
190 SimpleMemory::MemoryPort::MemoryPort(const std::string
& _name
,
191 SimpleMemory
& _memory
)
192 : QueuedSlavePort(_name
, &_memory
, queueImpl
),
193 queueImpl(_memory
, *this), memory(_memory
)
197 SimpleMemory::MemoryPort::getAddrRanges() const
199 AddrRangeList ranges
;
200 ranges
.push_back(memory
.getAddrRange());
205 SimpleMemory::MemoryPort::recvAtomic(PacketPtr pkt
)
207 return memory
.doAtomicAccess(pkt
);
211 SimpleMemory::MemoryPort::recvFunctional(PacketPtr pkt
)
213 pkt
->pushLabel(memory
.name());
215 if (!queue
.checkFunctional(pkt
)) {
216 // Default implementation of SimpleTimingPort::recvFunctional()
217 // calls recvAtomic() and throws away the latency; we can save a
218 // little here by just not calculating the latency.
219 memory
.doFunctionalAccess(pkt
);
226 SimpleMemory::MemoryPort::recvTimingReq(PacketPtr pkt
)
228 return memory
.recvTimingReq(pkt
);
232 SimpleMemoryParams::create()
234 return new SimpleMemory(this);