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26 * this software without specific prior written permission.
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40 * Authors: Ron Dreslinski
45 #include "base/random.hh"
46 #include "mem/simple_mem.hh"
47 #include "debug/Drain.hh"
51 SimpleMemory::SimpleMemory(const SimpleMemoryParams
* p
) :
53 port(name() + ".port", *this), latency(p
->latency
),
54 latency_var(p
->latency_var
), bandwidth(p
->bandwidth
), isBusy(false),
55 retryReq(false), retryResp(false),
56 releaseEvent(this), dequeueEvent(this)
63 AbstractMemory::init();
65 // allow unconnected memories as this is used in several ruby
66 // systems at the moment
67 if (port
.isConnected()) {
68 port
.sendRangeChange();
73 SimpleMemory::recvAtomic(PacketPtr pkt
)
75 panic_if(pkt
->cacheResponding(), "Should not see packets where cache "
83 SimpleMemory::recvFunctional(PacketPtr pkt
)
85 pkt
->pushLabel(name());
87 functionalAccess(pkt
);
90 auto p
= packetQueue
.begin();
91 // potentially update the packets in our packet queue as well
92 while (!done
&& p
!= packetQueue
.end()) {
93 done
= pkt
->checkFunctional(p
->pkt
);
101 SimpleMemory::recvTimingReq(PacketPtr pkt
)
103 panic_if(pkt
->cacheResponding(), "Should not see packets where cache "
106 panic_if(!(pkt
->isRead() || pkt
->isWrite()),
107 "Should only see read and writes at memory controller, "
108 "saw %s to %#llx\n", pkt
->cmdString(), pkt
->getAddr());
110 // we should not get a new request after committing to retry the
111 // current one, but unfortunately the CPU violates this rule, so
112 // simply ignore it for now
116 // if we are busy with a read or write, remember that we have to
123 // technically the packet only reaches us after the header delay,
124 // and since this is a memory controller we also need to
125 // deserialise the payload before performing any write operation
126 Tick receive_delay
= pkt
->headerDelay
+ pkt
->payloadDelay
;
127 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
129 // update the release time according to the bandwidth limit, and
130 // do so with respect to the time it takes to finish this request
131 // rather than long term as it is the short term data rate that is
132 // limited for any real memory
134 // calculate an appropriate tick to release to not exceed
135 // the bandwidth limit
136 Tick duration
= pkt
->getSize() * bandwidth
;
138 // only consider ourselves busy if there is any need to wait
139 // to avoid extra events being scheduled for (infinitely) fast
142 schedule(releaseEvent
, curTick() + duration
);
146 // go ahead and deal with the packet and put the response in the
147 // queue if there is one
148 bool needsResponse
= pkt
->needsResponse();
150 // turn packet around to go back to requester if response expected
152 // recvAtomic() should already have turned packet into
154 assert(pkt
->isResponse());
156 Tick when_to_send
= curTick() + receive_delay
+ getLatency();
158 // typically this should be added at the end, so start the
159 // insertion sort with the last element, also make sure not to
160 // re-order in front of some existing packet with the same
161 // address, the latter is important as this memory effectively
162 // hands out exclusive copies (shared is not asserted)
163 auto i
= packetQueue
.end();
165 while (i
!= packetQueue
.begin() && when_to_send
< i
->tick
&&
166 i
->pkt
->getAddr() != pkt
->getAddr())
169 // emplace inserts the element before the position pointed to by
170 // the iterator, so advance it one step
171 packetQueue
.emplace(++i
, pkt
, when_to_send
);
173 if (!retryResp
&& !dequeueEvent
.scheduled())
174 schedule(dequeueEvent
, packetQueue
.back().tick
);
176 pendingDelete
.reset(pkt
);
183 SimpleMemory::release()
194 SimpleMemory::dequeue()
196 assert(!packetQueue
.empty());
197 DeferredPacket deferred_pkt
= packetQueue
.front();
199 retryResp
= !port
.sendTimingResp(deferred_pkt
.pkt
);
202 packetQueue
.pop_front();
204 // if the queue is not empty, schedule the next dequeue event,
205 // otherwise signal that we are drained if we were asked to do so
206 if (!packetQueue
.empty()) {
207 // if there were packets that got in-between then we
208 // already have an event scheduled, so use re-schedule
209 reschedule(dequeueEvent
,
210 std::max(packetQueue
.front().tick
, curTick()), true);
211 } else if (drainState() == DrainState::Draining
) {
212 DPRINTF(Drain
, "Draining of SimpleMemory complete\n");
219 SimpleMemory::getLatency() const
222 (latency_var
? random_mt
.random
<Tick
>(0, latency_var
) : 0);
226 SimpleMemory::recvRespRetry()
234 SimpleMemory::getSlavePort(const std::string
&if_name
, PortID idx
)
236 if (if_name
!= "port") {
237 return MemObject::getSlavePort(if_name
, idx
);
244 SimpleMemory::drain()
246 if (!packetQueue
.empty()) {
247 DPRINTF(Drain
, "SimpleMemory Queue has requests, waiting to drain\n");
248 return DrainState::Draining
;
250 return DrainState::Drained
;
254 SimpleMemory::MemoryPort::MemoryPort(const std::string
& _name
,
255 SimpleMemory
& _memory
)
256 : SlavePort(_name
, &_memory
), memory(_memory
)
260 SimpleMemory::MemoryPort::getAddrRanges() const
262 AddrRangeList ranges
;
263 ranges
.push_back(memory
.getAddrRange());
268 SimpleMemory::MemoryPort::recvAtomic(PacketPtr pkt
)
270 return memory
.recvAtomic(pkt
);
274 SimpleMemory::MemoryPort::recvFunctional(PacketPtr pkt
)
276 memory
.recvFunctional(pkt
);
280 SimpleMemory::MemoryPort::recvTimingReq(PacketPtr pkt
)
282 return memory
.recvTimingReq(pkt
);
286 SimpleMemory::MemoryPort::recvRespRetry()
288 memory
.recvRespRetry();
292 SimpleMemoryParams::create()
294 return new SimpleMemory(this);