src/mem/translating_port_proxy.cc

   1 /*
   2  * Copyright (c) 2011,2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /**
  42  * @file
  43  * Port object definitions.
  44  */
  45
  46 #include "mem/translating_port_proxy.hh"
  47
  48 #include "base/chunk_generator.hh"
  49 #include "cpu/base.hh"
  50 #include "cpu/thread_context.hh"
  51 #include "sim/system.hh"
  52
  53 TranslatingPortProxy::TranslatingPortProxy(
  54         ThreadContext *tc, Request::Flags _flags) :
  55     PortProxy(tc->getCpuPtr()->getSendFunctional(),
  56               tc->getSystemPtr()->cacheLineSize()), _tc(tc),
  57               pageBytes(tc->getSystemPtr()->getPageBytes()),
  58               flags(_flags)
  59 {}
  60
  61 bool
  62 TranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const
  63 {
  64     BaseTLB *dtb = _tc->getDTBPtr();
  65     BaseTLB *itb = _tc->getDTBPtr();
  66     return dtb->translateFunctional(req, _tc, mode) == NoFault ||
  67            itb->translateFunctional(req, _tc, BaseTLB::Read) == NoFault;
  68 }
  69
  70 bool
  71 TranslatingPortProxy::tryTLBs(RequestPtr req, BaseTLB::Mode mode) const
  72 {
  73     // If at first this doesn't succeed, try to fixup and translate again. If
  74     // it still fails, report failure.
  75     return tryTLBsOnce(req, mode) ||
  76         (fixupAddr(req->getVaddr(), mode) && tryTLBsOnce(req, mode));
  77 }
  78
  79 bool
  80 TranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const
  81 {
  82     for (ChunkGenerator gen(addr, size, pageBytes); !gen.done();
  83          gen.next())
  84     {
  85         auto req = std::make_shared<Request>(
  86                 gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
  87                 _tc->contextId());
  88
  89         if (!tryTLBs(req, BaseTLB::Read))
  90             return false;
  91
  92         PortProxy::readBlobPhys(
  93                 req->getPaddr(), req->getFlags(), p, gen.size());
  94
  95         p = static_cast<uint8_t *>(p) + gen.size();
  96     }
  97     return true;
  98 }
  99
 100 bool
 101 TranslatingPortProxy::tryWriteBlob(
 102         Addr addr, const void *p, int size) const
 103 {
 104     for (ChunkGenerator gen(addr, size, pageBytes); !gen.done();
 105          gen.next())
 106     {
 107         auto req = std::make_shared<Request>(
 108                 gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
 109                 _tc->contextId());
 110
 111         if (!tryTLBs(req, BaseTLB::Write))
 112             return false;
 113
 114         PortProxy::writeBlobPhys(
 115                 req->getPaddr(), req->getFlags(), p, gen.size());
 116         p = static_cast<const uint8_t *>(p) + gen.size();
 117     }
 118     return true;
 119 }
 120
 121 bool
 122 TranslatingPortProxy::tryMemsetBlob(Addr address, uint8_t v, int size) const
 123 {
 124     for (ChunkGenerator gen(address, size, pageBytes); !gen.done();
 125          gen.next())
 126     {
 127         auto req = std::make_shared<Request>(
 128                 gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
 129                 _tc->contextId());
 130
 131         if (!tryTLBs(req, BaseTLB::Write))
 132             return false;
 133
 134         PortProxy::memsetBlobPhys(
 135                 req->getPaddr(), req->getFlags(), v, gen.size());
 136     }
 137     return true;
 138 }