Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/mesa into gallium-0.2
[mesa.git] / src / mesa / drivers / dri / i810 / i810_3d_reg.h
1
2 #ifndef I810_3D_REG_H
3 #define I810_3D_REG_H
4
5 #include "i810_reg.h"
6
7 /* Registers not used in the X server
8 */
9
10 #define I810_NOP_ID 0x2094
11 #define I810_NOP_ID_MASK ((1<<22)-1)
12
13
14 /* 3D instructions
15 */
16
17
18 /* GFXRENDERSTATE_PV_PIXELIZATION_RULE, p149
19 *
20 * Format:
21 * 0: GFX_OP_PV_RULE | PV_*
22 *
23 */
24 #define GFX_OP_PV_RULE ((0x3<<29)|(0x7<<24))
25 #define PV_SMALL_TRI_FILTER_ENABLE (0x1<<11)
26 #define PV_UPDATE_PIXRULE (0x1<<10)
27 #define PV_PIXRULE_ENABLE (0x1<<9)
28 #define PV_UPDATE_LINELIST (0x1<<8)
29 #define PV_LINELIST_MASK (0x3<<6)
30 #define PV_LINELIST_PV0 (0x0<<6)
31 #define PV_LINELIST_PV1 (0x1<<6)
32 #define PV_UPDATE_TRIFAN (0x1<<5)
33 #define PV_TRIFAN_MASK (0x3<<3)
34 #define PV_TRIFAN_PV0 (0x0<<3)
35 #define PV_TRIFAN_PV1 (0x1<<3)
36 #define PV_TRIFAN_PV2 (0x2<<3)
37 #define PV_UPDATE_TRISTRIP (0x1<<2)
38 #define PV_TRISTRIP_MASK (0x3<<0)
39 #define PV_TRISTRIP_PV0 (0x0<<0)
40 #define PV_TRISTRIP_PV1 (0x1<<0)
41 #define PV_TRISTRIP_PV2 (0x2<<0)
42
43
44 /* GFXRENDERSTATE_SCISSOR_ENABLE, p146
45 *
46 * Format:
47 * 0: GFX_OP_SCISSOR | SC_*
48 */
49 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
50 #define SC_UPDATE_SCISSOR (0x1<<1)
51 #define SC_ENABLE_MASK (0x1<<0)
52 #define SC_ENABLE (0x1<<0)
53
54 /* GFXRENDERSTATE_SCISSOR_INFO, p147
55 *
56 * Format:
57 * 0: GFX_OP_SCISSOR_INFO
58 * 1: SCI_MIN_*
59 * 2: SCI_MAX_*
60 */
61 #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
62 #define SCI_YMIN_MASK (0xffff<<16)
63 #define SCI_XMIN_MASK (0xffff<<0)
64 #define SCI_YMAX_MASK (0xffff<<16)
65 #define SCI_XMAX_MASK (0xffff<<0)
66
67 /* GFXRENDERSTATE_DRAWING_RECT_INFO, p144
68 *
69 * Format:
70 * 0: GFX_OP_DRAWRECT_INFO
71 * 1: DR1_*
72 * 2: DR2_*
73 * 3: DR3_*
74 * 4: DR4_*
75 */
76 #define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
77 #define DR1_RECT_CLIP_ENABLE (0x0<<31)
78 #define DR1_RECT_CLIP_DISABLE (0x1<<31)
79 #define DR1_X_DITHER_BIAS_MASK (0x3<<26)
80 #define DR1_X_DITHER_BIAS_SHIFT 26
81 #define DR1_Y_DITHER_BIAS_MASK (0x3<<24)
82 #define DR1_Y_DITHER_BIAS_SHIFT 24
83 #define DR2_YMIN_MASK (0xffff<<16)
84 #define DR2_XMIN_MASK (0xffff<<0)
85 #define DR3_YMAX_MASK (0xffff<<16)
86 #define DR3_XMAX_MASK (0xffff<<0)
87 #define DR4_YORG_MASK (0x3ff<<16)
88 #define DR4_XORG_MASK (0x7ff<<0)
89
90
91 /* GFXRENDERSTATE_LINEWIDTH_CULL_SHADE_MODE, p140
92 *
93 * Format:
94 * 0: GFX_OP_LINEWIDTH_CULL_SHADE_MODE | LCS_*
95 */
96 #define GFX_OP_LINEWIDTH_CULL_SHADE_MODE ((0x3<<29)|(0x2<<24))
97 #define LCS_UPDATE_ZMODE (0x1<<20)
98 #define LCS_Z_MASK (0xf<<16)
99 #define LCS_Z_NEVER (0x1<<16)
100 #define LCS_Z_LESS (0x2<<16)
101 #define LCS_Z_EQUAL (0x3<<16)
102 #define LCS_Z_LEQUAL (0x4<<16)
103 #define LCS_Z_GREATER (0x5<<16)
104 #define LCS_Z_NOTEQUAL (0x6<<16)
105 #define LCS_Z_GEQUAL (0x7<<16)
106 #define LCS_Z_ALWAYS (0x8<<16)
107 #define LCS_UPDATE_LINEWIDTH (0x1<<15)
108 #define LCS_LINEWIDTH_MASK (0x7<<12)
109 #define LCS_LINEWIDTH_SHIFT 12
110 #define LCS_LINEWIDTH_0_5 (0x1<<12)
111 #define LCS_LINEWIDTH_1_0 (0x2<<12)
112 #define LCS_LINEWIDTH_2_0 (0x4<<12)
113 #define LCS_LINEWIDTH_3_0 (0x6<<12)
114 #define LCS_UPDATE_ALPHA_INTERP (0x1<<11)
115 #define LCS_ALPHA_FLAT (0x1<<10)
116 #define LCS_ALPHA_INTERP (0x0<<10)
117 #define LCS_UPDATE_FOG_INTERP (0x1<<9)
118 #define LCS_FOG_INTERP (0x0<<8)
119 #define LCS_FOG_FLAT (0x1<<8)
120 #define LCS_UPDATE_SPEC_INTERP (0x1<<7)
121 #define LCS_SPEC_INTERP (0x0<<6)
122 #define LCS_SPEC_FLAT (0x1<<6)
123 #define LCS_UPDATE_RGB_INTERP (0x1<<5)
124 #define LCS_RGB_INTERP (0x0<<4)
125 #define LCS_RGB_FLAT (0x1<<4)
126 #define LCS_UPDATE_CULL_MODE (0x1<<3)
127 #define LCS_CULL_MASK (0x7<<0)
128 #define LCS_CULL_DISABLE (0x1<<0)
129 #define LCS_CULL_CW (0x2<<0)
130 #define LCS_CULL_CCW (0x3<<0)
131 #define LCS_CULL_BOTH (0x4<<0)
132
133 #define LCS_INTERP_FLAT (LCS_ALPHA_FLAT|LCS_RGB_FLAT|LCS_SPEC_FLAT)
134 #define LCS_UPDATE_INTERP (LCS_UPDATE_ALPHA_INTERP| \
135 LCS_UPDATE_RGB_INTERP| \
136 LCS_UPDATE_SPEC_INTERP)
137
138
139 /* GFXRENDERSTATE_BOOLEAN_ENA_1, p142
140 *
141 */
142 #define GFX_OP_BOOL_1 ((0x3<<29)|(0x3<<24))
143 #define B1_UPDATE_SPEC_SETUP_ENABLE (1<<19)
144 #define B1_SPEC_SETUP_ENABLE (1<<18)
145 #define B1_UPDATE_ALPHA_SETUP_ENABLE (1<<17)
146 #define B1_ALPHA_SETUP_ENABLE (1<<16)
147 #define B1_UPDATE_CI_KEY_ENABLE (1<<15)
148 #define B1_CI_KEY_ENABLE (1<<14)
149 #define B1_UPDATE_CHROMAKEY_ENABLE (1<<13)
150 #define B1_CHROMAKEY_ENABLE (1<<12)
151 #define B1_UPDATE_Z_BIAS_ENABLE (1<<11)
152 #define B1_Z_BIAS_ENABLE (1<<10)
153 #define B1_UPDATE_SPEC_ENABLE (1<<9)
154 #define B1_SPEC_ENABLE (1<<8)
155 #define B1_UPDATE_FOG_ENABLE (1<<7)
156 #define B1_FOG_ENABLE (1<<6)
157 #define B1_UPDATE_ALPHA_TEST_ENABLE (1<<5)
158 #define B1_ALPHA_TEST_ENABLE (1<<4)
159 #define B1_UPDATE_BLEND_ENABLE (1<<3)
160 #define B1_BLEND_ENABLE (1<<2)
161 #define B1_UPDATE_Z_TEST_ENABLE (1<<1)
162 #define B1_Z_TEST_ENABLE (1<<0)
163
164 /* GFXRENDERSTATE_BOOLEAN_ENA_2, p143
165 *
166 */
167 #define GFX_OP_BOOL_2 ((0x3<<29)|(0x4<<24))
168 #define B2_UPDATE_MAP_CACHE_ENABLE (1<<17)
169 #define B2_MAP_CACHE_ENABLE (1<<16)
170 #define B2_UPDATE_ALPHA_DITHER_ENABLE (1<<15)
171 #define B2_ALPHA_DITHER_ENABLE (1<<14)
172 #define B2_UPDATE_FOG_DITHER_ENABLE (1<<13)
173 #define B2_FOG_DITHER_ENABLE (1<<12)
174 #define B2_UPDATE_SPEC_DITHER_ENABLE (1<<11)
175 #define B2_SPEC_DITHER_ENABLE (1<<10)
176 #define B2_UPDATE_RGB_DITHER_ENABLE (1<<9)
177 #define B2_RGB_DITHER_ENABLE (1<<8)
178 #define B2_UPDATE_FB_WRITE_ENABLE (1<<3)
179 #define B2_FB_WRITE_ENABLE (1<<2)
180 #define B2_UPDATE_ZB_WRITE_ENABLE (1<<1)
181 #define B2_ZB_WRITE_ENABLE (1<<0)
182
183
184 /* GFXRENDERSTATE_FOG_COLOR, p144
185 */
186 #define GFX_OP_FOG_COLOR ((0x3<<29)|(0x15<<24))
187 #define FOG_RED_SHIFT 16
188 #define FOG_GREEN_SHIFT 8
189 #define FOG_BLUE_SHIFT 0
190 #define FOG_RESERVED_MASK ((0x7<<16)|(0x3<<8)|(0x3))
191
192
193 /* GFXRENDERSTATE_Z_BIAS_ALPHA_FUNC_REF, p139
194 */
195 #define GFX_OP_ZBIAS_ALPHAFUNC ((0x3<<29)|(0x14<<24))
196 #define ZA_UPDATE_ZBIAS (1<<22)
197 #define ZA_ZBIAS_SHIFT 14
198 #define ZA_ZBIAS_MASK (0xff<<14)
199 #define ZA_UPDATE_ALPHAFUNC (1<<13)
200 #define ZA_ALPHA_MASK (0xf<<9)
201 #define ZA_ALPHA_NEVER (1<<9)
202 #define ZA_ALPHA_LESS (2<<9)
203 #define ZA_ALPHA_EQUAL (3<<9)
204 #define ZA_ALPHA_LEQUAL (4<<9)
205 #define ZA_ALPHA_GREATER (5<<9)
206 #define ZA_ALPHA_NOTEQUAL (6<<9)
207 #define ZA_ALPHA_GEQUAL (7<<9)
208 #define ZA_ALPHA_ALWAYS (8<<9)
209 #define ZA_UPDATE_ALPHAREF (1<<8)
210 #define ZA_ALPHAREF_MASK (0xff<<0)
211 #define ZA_ALPHAREF_SHIFT 0
212 #define ZA_ALPHAREF_RESERVED (0x7<<0)
213
214
215 /* GFXRENDERSTATE_SRC_DST_BLEND_MONO, p136
216 */
217 #define GFX_OP_SRC_DEST_MONO ((0x3<<29)|(0x8<<24))
218 #define SDM_UPDATE_MONO_ENABLE (1<<13)
219 #define SDM_MONO_ENABLE (1<<12)
220 #define SDM_UPDATE_SRC_BLEND (1<<11)
221 #define SDM_SRC_MASK (0xf<<6)
222 #define SDM_SRC_ZERO (0x1<<6)
223 #define SDM_SRC_ONE (0x2<<6)
224 #define SDM_SRC_SRC_COLOR (0x3<<6)
225 #define SDM_SRC_INV_SRC_COLOR (0x4<<6)
226 #define SDM_SRC_SRC_ALPHA (0x5<<6)
227 #define SDM_SRC_INV_SRC_ALPHA (0x6<<6)
228 #define SDM_SRC_DST_COLOR (0x9<<6)
229 #define SDM_SRC_INV_DST_COLOR (0xa<<6)
230 #define SDM_SRC_BOTH_SRC_ALPHA (0xc<<6)
231 #define SDM_SRC_BOTH_INV_SRC_ALPHA (0xd<<6)
232 #define SDM_UPDATE_DST_BLEND (1<<5)
233 #define SDM_DST_MASK (0xf<<0)
234 #define SDM_DST_ZERO (0x1<<0)
235 #define SDM_DST_ONE (0x2<<0)
236 #define SDM_DST_SRC_COLOR (0x3<<0)
237 #define SDM_DST_INV_SRC_COLOR (0x4<<0)
238 #define SDM_DST_SRC_ALPHA (0x5<<0)
239 #define SDM_DST_INV_SRC_ALPHA (0x6<<0)
240 #define SDM_DST_DST_COLOR (0x9<<0)
241 #define SDM_DST_INV_DST_COLOR (0xa<<0)
242 #define SDM_DST_BOTH_SRC_ALPHA (0xc<<0)
243 #define SDM_DST_BOTH_INV_SRC_ALPHA (0xd<<0)
244
245
246 /* GFXRENDERSTATE_COLOR_FACTOR, p134
247 *
248 * Format:
249 * 0: GFX_OP_COLOR_FACTOR
250 * 1: ARGB8888 color factor
251 */
252 #define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
253
254 /* GFXRENDERSTATE_MAP_ALPHA_BLEND_STAGES, p132
255 */
256 #define GFX_OP_MAP_ALPHA_STAGES ((0x3<<29)|(0x1<<24))
257 #define MA_STAGE_SHIFT 20
258 #define MA_STAGE_0 (0<<20)
259 #define MA_STAGE_1 (1<<20)
260 #define MA_STAGE_2 (2<<20)
261
262 #define MA_ARG_ONE (0x0<<2)
263 #define MA_ARG_ALPHA_FACTOR (0x1<<2)
264 #define MA_ARG_ITERATED_ALPHA (0x3<<2)
265 #define MA_ARG_CURRENT_ALPHA (0x5<<2)
266 #define MA_ARG_TEX0_ALPHA (0x6<<2)
267 #define MA_ARG_TEX1_ALPHA (0x7<<2)
268 #define MA_ARG_INVERT (0x1)
269 #define MA_ARG_DONT_INVERT (0x0)
270
271 #define MA_UPDATE_ARG1 (1<<18)
272 #define MA_ARG1_SHIFT 13
273 #define MA_ARG1_MASK (0x1d << MA_ARG1_SHIFT)
274
275 #define MA_UPDATE_ARG2 (1<<12)
276 #define MA_ARG2_SHIFT 6
277 #define MA_ARG2_MASK (0x1d << MA_ARG2_SHIFT)
278
279 #define MA_UPDATE_OP (1<<5)
280 #define MA_OP_MASK (0xf)
281 #define MA_OP_ARG1 (0x1)
282 #define MA_OP_ARG2 (0x2)
283 #define MA_OP_MODULATE (0x3)
284 #define MA_OP_MODULATE_X2 (0x4)
285 #define MA_OP_MODULATE_X4 (0x5)
286 #define MA_OP_ADD (0x6)
287 #define MA_OP_ADD_SIGNED (0x7)
288 #define MA_OP_LIN_BLEND_ITER_ALPHA (0x8)
289 #define MA_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
290 #define MA_OP_LIN_BLEND_TEX0_ALPHA (0x10)
291 #define MA_OP_LIN_BLEND_TEX1_ALPHA (0x11)
292 #define MA_OP_SUBTRACT (0x14)
293
294
295 /* GFXRENDERSTATE_MAP_COLOR_BLEND_STAGES, p129
296 */
297 #define GFX_OP_MAP_COLOR_STAGES ((0x3<<29)|(0x0<<24))
298 #define MC_STAGE_SHIFT 20
299 #define MC_STAGE_0 (0<<20)
300 #define MC_STAGE_1 (1<<20)
301 #define MC_STAGE_2 (2<<20)
302 #define MC_UPDATE_DEST (1<<19)
303 #define MC_DEST_MASK (1<<18)
304 #define MC_DEST_CURRENT (0<<18)
305 #define MC_DEST_ACCUMULATOR (1<<18)
306
307 #define MC_ARG_ONE (0x0<<2)
308 #define MC_ARG_COLOR_FACTOR (0x1<<2)
309 #define MC_ARG_ACCUMULATOR (0x2<<2)
310 #define MC_ARG_ITERATED_COLOR (0x3<<2)
311 #define MC_ARG_SPECULAR_COLOR (0x4<<2)
312 #define MC_ARG_CURRENT_COLOR (0x5<<2)
313 #define MC_ARG_TEX0_COLOR (0x6<<2)
314 #define MC_ARG_TEX1_COLOR (0x7<<2)
315 #define MC_ARG_DONT_REPLICATE_ALPHA (0x0<<1)
316 #define MC_ARG_REPLICATE_ALPHA (0x1<<1)
317 #define MC_ARG_DONT_INVERT (0x0)
318 #define MC_ARG_INVERT (0x1)
319
320 #define MC_UPDATE_ARG1 (1<<17)
321 #define MC_ARG1_SHIFT 12
322 #define MC_ARG1_MASK (0x1f << MC_ARG1_SHIFT)
323
324 #define MC_UPDATE_ARG2 (1<<11)
325 #define MC_ARG2_SHIFT 6
326 #define MC_ARG2_MASK (0x1f << MC_ARG2_SHIFT)
327
328 #define MC_UPDATE_OP (1<<5)
329 #define MC_OP_MASK (0xf)
330 #define MC_OP_DISABLE (0x0)
331 #define MC_OP_ARG1 (0x1)
332 #define MC_OP_ARG2 (0x2)
333 #define MC_OP_MODULATE (0x3)
334 #define MC_OP_MODULATE_X2 (0x4)
335 #define MC_OP_MODULATE_X4 (0x5)
336 #define MC_OP_ADD (0x6)
337 #define MC_OP_ADD_SIGNED (0x7)
338 #define MC_OP_LIN_BLEND_ITER_ALPHA (0x8)
339 #define MC_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
340 #define MC_OP_LIN_BLEND_TEX0_ALPHA (0x10)
341 #define MC_OP_LIN_BLEND_TEX1_ALPHA (0x11)
342 #define MC_OP_LIN_BLEND_TEX0_COLOR (0x12)
343 #define MC_OP_LIN_BLEND_TEX1_COLOR (0x13)
344 #define MC_OP_SUBTRACT (0x14)
345
346 /* GFXRENDERSTATE_MAP_PALETTE_LOAD, p128
347 *
348 * Format:
349 * 0: GFX_OP_MAP_PALETTE_LOAD
350 * 1: 16bpp color[0]
351 * ...
352 * 256: 16bpp color[255]
353 */
354 #define GFX_OP_MAP_PALETTE_LOAD ((0x3<<29)|(0x1d<<24)|(0x82<<16)|0xff)
355
356 /* GFXRENDERSTATE_MAP_LOD_CONTROL, p127
357 */
358 #define GFX_OP_MAP_LOD_CTL ((0x3<<29)|(0x1c<<24)|(0x4<<19))
359 #define MLC_MAP_ID_SHIFT 16
360 #define MLC_MAP_0 (0<<16)
361 #define MLC_MAP_1 (1<<16)
362 #define MLC_UPDATE_DITHER_WEIGHT (1<<10)
363 #define MLC_DITHER_WEIGHT_MASK (0x3<<8)
364 #define MLC_DITHER_WEIGHT_FULL (0x0<<8)
365 #define MLC_DITHER_WEIGHT_50 (0x1<<8)
366 #define MLC_DITHER_WEIGHT_25 (0x2<<8)
367 #define MLC_DITHER_WEIGHT_12 (0x3<<8)
368 #define MLC_UPDATE_LOD_BIAS (1<<7)
369 #define MLC_LOD_BIAS_MASK ((1<<7)-1)
370
371 /* GFXRENDERSTATE_MAP_LOD_LIMITS, p126
372 */
373 #define GFX_OP_MAP_LOD_LIMITS ((0x3<<29)|(0x1c<<24)|(0x3<<19))
374 #define MLL_MAP_ID_SHIFT 16
375 #define MLL_MAP_0 (0<<16)
376 #define MLL_MAP_1 (1<<16)
377 #define MLL_UPDATE_MAX_MIP (1<<13)
378 #define MLL_MAX_MIP_SHIFT 5
379 #define MLL_MAX_MIP_MASK (0xff<<5)
380 #define MLL_MAX_MIP_ONE (0x10<<5)
381 #define MLL_UPDATE_MIN_MIP (1<<4)
382 #define MLL_MIN_MIP_SHIFT 0
383 #define MLL_MIN_MIP_MASK (0xf<<0)
384
385 /* GFXRENDERSTATE_MAP_FILTER, p124
386 */
387 #define GFX_OP_MAP_FILTER ((0x3<<29)|(0x1c<<24)|(0x2<<19))
388 #define MF_MAP_ID_SHIFT 16
389 #define MF_MAP_0 (0<<16)
390 #define MF_MAP_1 (1<<16)
391 #define MF_UPDATE_ANISOTROPIC (1<<12)
392 #define MF_ANISOTROPIC_MASK (1<<10)
393 #define MF_ANISOTROPIC_ENABLE (1<<10)
394 #define MF_UPDATE_MIP_FILTER (1<<9)
395 #define MF_MIP_MASK (0x3<<6)
396 #define MF_MIP_NONE (0x0<<6)
397 #define MF_MIP_NEAREST (0x1<<6)
398 #define MF_MIP_DITHER (0x2<<6)
399 #define MF_MIP_LINEAR (0x3<<6)
400 #define MF_UPDATE_MAG_FILTER (1<<5)
401 #define MF_MAG_MASK (1<<3)
402 #define MF_MAG_LINEAR (1<<3)
403 #define MF_MAG_NEAREST (0<<3)
404 #define MF_UPDATE_MIN_FILTER (1<<2)
405 #define MF_MIN_MASK (1<<0)
406 #define MF_MIN_LINEAR (1<<0)
407 #define MF_MIN_NEAREST (0<<0)
408
409 /* GFXRENDERSTATE_MAP_INFO, p118
410 */
411 #define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
412 #define MI1_MAP_ID_SHIFT 28
413 #define MI1_MAP_0 (0<<28)
414 #define MI1_MAP_1 (1<<28)
415 #define MI1_FMT_MASK (0x7<<24)
416 #define MI1_FMT_8CI (0x0<<24)
417 #define MI1_FMT_8BPP (0x1<<24)
418 #define MI1_FMT_16BPP (0x2<<24)
419 #define MI1_FMT_422 (0x5<<24)
420 #define MI1_PF_MASK (0x3<<21)
421 #define MI1_PF_8CI_RGB565 (0x0<<21)
422 #define MI1_PF_8CI_ARGB1555 (0x1<<21)
423 #define MI1_PF_8CI_ARGB4444 (0x2<<21)
424 #define MI1_PF_8CI_AY88 (0x3<<21)
425 #define MI1_PF_16BPP_RGB565 (0x0<<21)
426 #define MI1_PF_16BPP_ARGB1555 (0x1<<21)
427 #define MI1_PF_16BPP_ARGB4444 (0x2<<21)
428 #define MI1_PF_16BPP_AY88 (0x3<<21)
429 #define MI1_PF_422_YCRCB_SWAP_Y (0x0<<21)
430 #define MI1_PF_422_YCRCB (0x1<<21)
431 #define MI1_PF_422_YCRCB_SWAP_UV (0x2<<21)
432 #define MI1_PF_422_YCRCB_SWAP_YUV (0x3<<21)
433 #define MI1_OUTPUT_CHANNEL_MASK (0x3<<19)
434 #define MI1_COLOR_CONV_ENABLE (1<<18)
435 #define MI1_VERT_STRIDE_MASK (1<<17)
436 #define MI1_VERT_STRIDE_1 (1<<17)
437 #define MI1_VERT_OFFSET_MASK (1<<16)
438 #define MI1_VERT_OFFSET_1 (1<<16)
439 #define MI1_ENABLE_FENCE_REGS (1<<10)
440 #define MI1_TILED_SURFACE (1<<9)
441 #define MI1_TILE_WALK_X (0<<8)
442 #define MI1_TILE_WALK_Y (1<<8)
443 #define MI1_PITCH_MASK (0xf<<0)
444 #define MI2_DIMENSIONS_ARE_LOG2 (1<<31)
445 #define MI2_DIMENSIONS_ARE_EXACT (0<<31)
446 #define MI2_HEIGHT_SHIFT 16
447 #define MI2_HEIGHT_MASK (0x1ff<<16)
448 #define MI2_WIDTH_SHIFT 0
449 #define MI2_WIDTH_MASK (0x1ff<<0)
450 #define MI3_BASE_ADDR_MASK (~0xf)
451
452 /* GFXRENDERSTATE_MAP_COORD_SETS, p116
453 */
454 #define GFX_OP_MAP_COORD_SETS ((0x3<<29)|(0x1c<<24)|(0x1<<19))
455 #define MCS_COORD_ID_SHIFT 16
456 #define MCS_COORD_0 (0<<16)
457 #define MCS_COORD_1 (1<<16)
458 #define MCS_UPDATE_NORMALIZED (1<<15)
459 #define MCS_NORMALIZED_COORDS_MASK (1<<14)
460 #define MCS_NORMALIZED_COORDS (1<<14)
461 #define MCS_UPDATE_V_STATE (1<<7)
462 #define MCS_V_STATE_MASK (0x3<<4)
463 #define MCS_V_WRAP (0x0<<4)
464 #define MCS_V_MIRROR (0x1<<4)
465 #define MCS_V_CLAMP (0x2<<4)
466 #define MCS_V_WRAP_SHORTEST (0x3<<4)
467 #define MCS_UPDATE_U_STATE (1<<3)
468 #define MCS_U_STATE_MASK (0x3<<0)
469 #define MCS_U_WRAP (0x0<<0)
470 #define MCS_U_MIRROR (0x1<<0)
471 #define MCS_U_CLAMP (0x2<<0)
472 #define MCS_U_WRAP_SHORTEST (0x3<<0)
473
474 /* GFXRENDERSTATE_MAP_TEXELS, p115
475 */
476 #define GFX_OP_MAP_TEXELS ((0x3<<29)|(0x1c<<24)|(0x0<<19))
477 #define MT_UPDATE_TEXEL1_STATE (1<<15)
478 #define MT_TEXEL1_DISABLE (0<<14)
479 #define MT_TEXEL1_ENABLE (1<<14)
480 #define MT_TEXEL1_COORD0 (0<<11)
481 #define MT_TEXEL1_COORD1 (1<<11)
482 #define MT_TEXEL1_MAP0 (0<<8)
483 #define MT_TEXEL1_MAP1 (1<<8)
484 #define MT_UPDATE_TEXEL0_STATE (1<<7)
485 #define MT_TEXEL0_DISABLE (0<<6)
486 #define MT_TEXEL0_ENABLE (1<<6)
487 #define MT_TEXEL0_COORD0 (0<<3)
488 #define MT_TEXEL0_COORD1 (1<<3)
489 #define MT_TEXEL0_MAP0 (0<<0)
490 #define MT_TEXEL0_MAP1 (1<<0)
491
492 /* GFXRENDERSTATE_VERTEX_FORMAT, p110
493 */
494 #define GFX_OP_VERTEX_FMT ((0x3<<29)|(0x5<<24))
495 #define VF_TEXCOORD_COUNT_SHIFT 8
496 #define VF_TEXCOORD_COUNT_0 (0<<8)
497 #define VF_TEXCOORD_COUNT_1 (1<<8)
498 #define VF_TEXCOORD_COUNT_2 (2<<8)
499 #define VF_SPEC_FOG_ENABLE (1<<7)
500 #define VF_RGBA_ENABLE (1<<6)
501 #define VF_Z_OFFSET_ENABLE (1<<5)
502 #define VF_XYZ (0x1<<1)
503 #define VF_XYZW (0x2<<1)
504 #define VF_XY (0x3<<1)
505 #define VF_XYW (0x4<<1)
506
507
508 #define VERT_X_MASK (~0xf)
509 #define VERT_X_EDGE_V2V0 (1<<2)
510 #define VERT_X_EDGE_V1V2 (1<<1)
511 #define VERT_X_EDGE_V0V1 (1<<0)
512
513 /* Not enabled fields should not be sent to hardware:
514 */
515 typedef struct {
516 union {
517 float x;
518 unsigned int edge_flags;
519 } x;
520 float y;
521 float z;
522 float z_bias;
523 float oow;
524 unsigned int argb;
525 unsigned int fog_spec_rgb; /* spec g and r ignored. */
526 float tu0;
527 float tv0;
528 float tu1;
529 float tv1;
530 } i810_full_vertex;
531
532
533
534 /* GFXCMDPARSER_BATCH_BUFFER, p105
535 *
536 * Not clear whether start address must be shifted or not. Not clear
537 * whether address is physical system memory, or subject to GTT
538 * translation. Because the address appears to be 32 bits long,
539 * perhaps it refers to physical system memory...
540 */
541 #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
542 #define BB1_START_ADDR_MASK (~0x7)
543 #define BB1_PROTECTED (1<<0)
544 #define BB1_UNPROTECTED (0<<0)
545 #define BB2_END_ADDR_MASK (~0x7)
546
547 /* Hardware seems to barf on buffers larger than this (in strange ways)...
548 */
549 #define MAX_BATCH (512*1024)
550
551
552 /* GFXCMDPARSER_Z_BUFFER_INFO, p98
553 *
554 * Base address is in GTT space, and must be 4K aligned
555 */
556 #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
557 #define ZB_BASE_ADDR_SHIFT 0
558 #define ZB_BASE_ADDR_MASK (~((1<<12)-1))
559 #define ZB_PITCH_512B (0x0<<0)
560 #define ZB_PITCH_1K (0x1<<0)
561 #define ZB_PITCH_2K (0x2<<0)
562 #define ZB_PITCH_4K (0x3<<0)
563
564 /* GFXCMDPARSER_FRONT_BUFFER_INFO, p97
565 *
566 * Format:
567 * 0: CMD_OP_FRONT_BUFFER_INFO | (pitch<<FB0_PITCH_SHIFT) | FB0_*
568 * 1: FB1_*
569 */
570 #define CMD_OP_FRONT_BUFFER_INFO ((0x0<<29)|(0x14<<23))
571 #define FB0_PITCH_SHIFT 8
572 #define FB0_FLIP_SYNC (0<<6)
573 #define FB0_FLIP_ASYNC (1<<6)
574 #define FB0_BASE_ADDR_SHIFT 0
575 #define FB0_BASE_ADDR_MASK 0x03FFFFF8
576
577 /* GFXCMDPARSER_DEST_BUFFER_INFO, p96
578 *
579 * Format:
580 */
581 #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
582 #define DB1_BASE_ADDR_SHIFT 0
583 #define DB1_BASE_ADDR_MASK 0x03FFF000
584 #define DB1_PITCH_512B (0x0<<0)
585 #define DB1_PITCH_1K (0x1<<0)
586 #define DB1_PITCH_2K (0x2<<0)
587 #define DB1_PITCH_4K (0x4<<0)
588
589
590 /* GFXRENDERSTATE_DEST_BUFFER_VARIABLES, p152
591 *
592 * Format:
593 * 0: GFX_OP_DESTBUFFER_VARS
594 * 1: DEST_*
595 */
596 #define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
597 #define DV_HORG_BIAS_MASK (0xf<<20)
598 #define DV_HORG_BIAS_OGL (0x0<<20)
599 #define DV_VORG_BIAS_MASK (0xf<<16)
600 #define DV_VORG_BIAS_OGL (0x0<<16)
601 #define DV_PF_MASK (0x7<<8)
602 #define DV_PF_INDEX (0x0<<8)
603 #define DV_PF_555 (0x1<<8)
604 #define DV_PF_565 (0x2<<8)
605
606 #define GFX_OP_ANTIALIAS ((0x3<<29)|(0x6<<24))
607 #define AA_UPDATE_EDGEFLAG (1<<13)
608 #define AA_ENABLE_EDGEFLAG (1<<12)
609 #define AA_UPDATE_POLYWIDTH (1<<11)
610 #define AA_POLYWIDTH_05 (1<<9)
611 #define AA_POLYWIDTH_10 (2<<9)
612 #define AA_POLYWIDTH_20 (3<<9)
613 #define AA_POLYWIDTH_40 (4<<9)
614 #define AA_UPDATE_LINEWIDTH (1<<8)
615 #define AA_LINEWIDTH_05 (1<<6)
616 #define AA_LINEWIDTH_10 (2<<6)
617 #define AA_LINEWIDTH_20 (3<<6)
618 #define AA_LINEWIDTH_40 (4<<6)
619 #define AA_UPDATE_BB_EXPANSION (1<<5)
620 #define AA_BB_EXPANSION_SHIFT 2
621 #define AA_UPDATE_AA_ENABLE (1<<1)
622 #define AA_ENABLE (1<<0)
623
624 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
625 #define ST1_ENABLE (1<<16)
626 #define ST1_MASK (0xffff)
627
628 #define I810_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
629
630 #endif