2 * GLX Hardware Device Driver for Intel i810
3 * Copyright (C) 1999 Keith Whitwell
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
21 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 /* $XFree86: xc/lib/GL/mesa/src/drv/i810/i810context.h,v 1.9 2002/12/16 16:18:51 dawes Exp $ */
26 #ifndef I810CONTEXT_INC
27 #define I810CONTEXT_INC
29 typedef struct i810_context_t i810Context
;
30 typedef struct i810_context_t
*i810ContextPtr
;
31 typedef struct i810_texture_object_t
*i810TextureObjectPtr
;
36 #include "i810screen.h"
40 /* Reasons to disable hardware rasterization.
42 #define I810_FALLBACK_TEXTURE 0x1
43 #define I810_FALLBACK_DRAW_BUFFER 0x2
44 #define I810_FALLBACK_READ_BUFFER 0x4
45 #define I810_FALLBACK_COLORMASK 0x8
46 #define I810_FALLBACK_SPECULAR 0x20
47 #define I810_FALLBACK_LOGICOP 0x40
48 #define I810_FALLBACK_RENDERMODE 0x80
49 #define I810_FALLBACK_STENCIL 0x100
50 #define I810_FALLBACK_BLEND_EQ 0x200
51 #define I810_FALLBACK_BLEND_FUNC 0x400
55 #define PCI_CHIP_I810 0x7121
56 #define PCI_CHIP_I810_DC100 0x7123
57 #define PCI_CHIP_I810_E 0x7125
58 #define PCI_CHIP_I815 0x1132
61 #define IS_I810(imesa) (imesa->i810Screen->deviceID == PCI_CHIP_I810 || \
62 imesa->i810Screen->deviceID == PCI_CHIP_I810_DC100 || \
63 imesa->i810Screen->deviceID == PCI_CHIP_I810_E)
64 #define IS_I815(imesa) (imesa->i810Screen->deviceID == PCI_CHIP_I815)
67 #define I810_UPLOAD_TEX(i) (I810_UPLOAD_TEX0<<(i))
69 /* Use the templated vertex formats:
71 #define TAG(x) i810##x
72 #include "tnl_dd/t_dd_vertex.h"
75 typedef void (*i810_tri_func
)( i810ContextPtr
, i810Vertex
*, i810Vertex
*,
77 typedef void (*i810_line_func
)( i810ContextPtr
, i810Vertex
*, i810Vertex
* );
78 typedef void (*i810_point_func
)( i810ContextPtr
, i810Vertex
* );
80 struct i810_context_t
{
84 /* Texture object bookkeeping
87 driTexHeap
* texture_heaps
[1];
88 driTextureObject swapped
;
90 struct i810_texture_object_t
*CurrentTexObj
[2];
93 /* Bit flag to keep track of fallbacks.
97 /* Temporaries for translating away float colors:
99 struct gl_client_array UbyteColor
;
100 struct gl_client_array UbyteSecondaryColor
;
102 /* State for i810vb.c and i810tris.c.
104 GLuint new_state
; /* _NEW_* flags */
105 GLuint SetupNewInputs
;
108 GLmatrix ViewportMatrix
;
109 GLenum render_primitive
;
110 GLenum reduced_primitive
;
114 drmBufPtr vertex_buffer
;
118 GLuint vertex_last_prim
;
120 GLboolean upload_cliprects
;
123 /* Fallback rasterization functions
125 i810_point_func draw_point
;
126 i810_line_func draw_line
;
127 i810_tri_func draw_tri
;
131 GLuint dirty
; /* I810_UPLOAD_* */
132 GLuint Setup
[I810_CTX_SETUP_SIZE
];
133 GLuint BufferSetup
[I810_DEST_SETUP_SIZE
];
135 int vertex_stride_shift
;
136 unsigned int lastStamp
;
137 GLboolean stipple_in_hw
;
139 GLenum TexEnvImageFmt
[2];
141 /* State which can't be computed completely on the fly:
147 /* Funny mesa mirrors
154 GLframebuffer
*glBuffer
;
155 GLboolean doPageFlip
;
157 /* These refer to the current draw (front vs. back) buffer:
159 char *drawMap
; /* draw buffer address in virtual mem */
161 int drawX
; /* origin of drawable in draw buffer */
163 GLuint numClipRects
; /* cliprects for that buffer */
164 XF86DRIClipRectPtr pClipRects
;
173 XF86DRIClipRectRec draw_rect
;
174 XF86DRIClipRectRec scissor_rect
;
176 drmContext hHWContext
;
180 __DRIdrawablePrivate
*driDrawable
;
181 __DRIscreenPrivate
*driScreen
;
182 i810ScreenPrivate
*i810Screen
;
187 #define I810_CONTEXT(ctx) ((i810ContextPtr)(ctx->DriverCtx))
189 #define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch
190 #define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue
193 /* Lock the hardware and validate our state.
195 #define LOCK_HARDWARE( imesa ) \
198 DRM_CAS(imesa->driHwLock, imesa->hHWContext, \
199 (DRM_LOCK_HELD|imesa->hHWContext), __ret); \
201 i810GetLock( imesa, 0 ); \
206 /* Release the kernel lock.
208 #define UNLOCK_HARDWARE(imesa) \
209 DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);
212 /* This is the wrong way to do it, I'm sure. Otherwise the drm
213 * bitches that I've already got the heavyweight lock. At worst,
214 * this is 3 ioctls. The best solution probably only gets me down
215 * to 2 ioctls in the worst case.
217 #define LOCK_HARDWARE_QUIESCENT( imesa ) do { \
218 LOCK_HARDWARE( imesa ); \
219 i810RegetLockQuiescent( imesa ); \
223 extern void i810GetLock( i810ContextPtr imesa
, GLuint flags
);
224 extern void i810EmitHwStateLocked( i810ContextPtr imesa
);
225 extern void i810EmitScissorValues( i810ContextPtr imesa
, int box_nr
, int emit
);
226 extern void i810EmitDrawingRectangle( i810ContextPtr imesa
);
227 extern void i810XMesaSetBackClipRects( i810ContextPtr imesa
);
228 extern void i810XMesaSetFrontClipRects( i810ContextPtr imesa
);
230 #define SUBPIXEL_X -.5
231 #define SUBPIXEL_Y -.5
233 /* ================================================================
238 extern int I810_DEBUG
;
243 #define DEBUG_TEXTURE 0x1
244 #define DEBUG_STATE 0x2
245 #define DEBUG_IOCTL 0x4
246 #define DEBUG_PRIMS 0x8
247 #define DEBUG_VERTS 0x10
248 #define DEBUG_FALLBACKS 0x20
249 #define DEBUG_VERBOSE 0x40
250 #define DEBUG_DRI 0x80
251 #define DEBUG_DMA 0x100
252 #define DEBUG_SANITY 0x200
253 #define DEBUG_SYNC 0x400
254 #define DEBUG_SLEEP 0x800