src/mesa/drivers/dri/i830/i830_context.h

   1 /*
   2  * GLX Hardware Device Driver for Intel i830
   3  * Copyright (C) 1999 Keith Whitwell
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included
  13  * in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  16  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  21  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 /* Adapted for use in the I830M driver:
  26  *   Jeff Hartmann <jhartmann@2d3d.com>
  27  */
  28 /* $XFree86: xc/lib/GL/mesa/src/drv/i830/i830_context.h,v 1.7 2003/02/06 04:18:01 dawes Exp $ */
  29
  30 #ifndef I830CONTEXT_INC
  31 #define I830CONTEXT_INC
  32
  33 typedef struct i830_context_t i830Context;
  34 typedef struct i830_context_t *i830ContextPtr;
  35 typedef struct i830_texture_object_t *i830TextureObjectPtr;
  36
  37
  38 #include "mtypes.h"
  39 #include "drm.h"
  40 #include "mm.h"
  41
  42 #include "i830_screen.h"
  43 #include "i830_tex.h"
  44
  45 #define TAG(x) i830##x
  46 #include "tnl_dd/t_dd_vertex.h"
  47 #undef TAG
  48
  49 #define DV_PF_555  (1<<8)
  50 #define DV_PF_565  (2<<8)
  51 #define DV_PF_8888 (3<<8)
  52
  53 #define I830_TEX_MAXLEVELS 10
  54
  55 #define I830_CONTEXT(ctx)       ((i830ContextPtr)(ctx->DriverCtx))
  56 #define GET_DISPATCH_AGE(imesa) imesa->sarea->last_dispatch
  57 #define GET_ENQUEUE_AGE(imesa)  imesa->sarea->last_enqueue
  58
  59
  60 typedef void (*i830_tri_func)(i830ContextPtr, i830Vertex *, i830Vertex *,
  61                                                           i830Vertex *);
  62 typedef void (*i830_line_func)(i830ContextPtr, i830Vertex *, i830Vertex *);
  63 typedef void (*i830_point_func)(i830ContextPtr, i830Vertex *);
  64
  65 #define I830_FALLBACK_TEXTURE            0x1
  66 #define I830_FALLBACK_DRAW_BUFFER        0x2
  67 #define I830_FALLBACK_READ_BUFFER        0x4
  68 #define I830_FALLBACK_COLORMASK          0x8
  69 #define I830_FALLBACK_RENDERMODE         0x10
  70 #define I830_FALLBACK_STENCIL            0x20
  71 #define I830_FALLBACK_STIPPLE            0x40
  72 #define I830_FALLBACK_USER               0x80
  73
  74 struct i830_context_t
  75 {
  76    GLint refcount;
  77    GLcontext *glCtx;
  78
  79    /*From I830 stuff*/
  80    int TextureMode;
  81    GLuint renderindex;
  82    GLuint TexBlendWordsUsed[I830_TEXBLEND_COUNT];
  83    GLuint TexBlend[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
  84    GLuint Init_TexBlend[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
  85    GLuint Init_TexBlendWordsUsed[I830_TEXBLEND_COUNT];
  86    GLuint Init_TexBlendColorPipeNum[I830_TEXBLEND_COUNT];
  87    GLuint TexBlendColorPipeNum[I830_TEXBLEND_COUNT];
  88    GLuint Init_BufferSetup[I830_DEST_SETUP_SIZE];
  89    GLuint LodBias[2];
  90
  91    GLenum palette_format;
  92    GLuint palette[256];
  93
  94
  95    GLuint Init_Setup[I830_CTX_SETUP_SIZE];
  96    GLuint vertex_prim;
  97    drmBufPtr vertex_dma_buffer;
  98
  99    GLboolean mask_red;
 100    GLboolean mask_green;
 101    GLboolean mask_blue;
 102    GLboolean mask_alpha;
 103
 104    GLubyte clear_red;
 105    GLubyte clear_green;
 106    GLubyte clear_blue;
 107    GLubyte clear_alpha;
 108
 109    GLfloat depth_scale;
 110    int depth_clear_mask;
 111    int stencil_clear_mask;
 112    int ClearDepth;
 113    int hw_stencil;
 114
 115    GLuint MonoColor;
 116
 117    GLuint LastTexEnabled;
 118    GLuint TexEnabledMask;
 119
 120    /* Texture object bookkeeping
 121     */
 122    unsigned              nr_heaps;
 123    driTexHeap          * texture_heaps[1];
 124    driTextureObject      swapped;
 125
 126    struct i830_texture_object_t *CurrentTexObj[2];
 127
 128    /* Rasterization and vertex state:
 129     */
 130    GLuint Fallback;
 131    GLuint NewGLState;
 132
 133    /* Temporaries for translating away float colors:
 134     */
 135    struct gl_client_array UbyteColor;
 136    struct gl_client_array UbyteSecondaryColor;
 137
 138    /* State for i830vb.c and i830tris.c.
 139     */
 140    GLuint SetupNewInputs;
 141    GLuint SetupIndex;
 142    GLuint RenderIndex;
 143    GLmatrix ViewportMatrix;
 144    GLenum render_primitive;
 145    GLenum reduced_primitive;
 146    GLuint hw_primitive;
 147    GLuint vertex_format;
 148    char *verts;
 149
 150    drmBufPtr  vertex_buffer;
 151    char *vertex_addr;
 152    GLuint vertex_low;
 153    GLuint vertex_high;
 154    GLuint vertex_last_prim;
 155
 156    GLboolean upload_cliprects;
 157
 158
 159    /* Fallback rasterization functions
 160     */
 161    i830_point_func draw_point;
 162    i830_line_func draw_line;
 163    i830_tri_func draw_tri;
 164
 165    /* Hardware state
 166     */
 167    GLuint dirty;                /* I810_UPLOAD_* */
 168    GLuint Setup[I830_CTX_SETUP_SIZE];
 169    GLuint BufferSetup[I830_DEST_SETUP_SIZE];
 170    GLuint StippleSetup[I830_STP_SETUP_SIZE];
 171    int vertex_size;
 172    int vertex_stride_shift;
 173    unsigned int lastStamp;
 174    GLboolean hw_stipple;
 175
 176    GLenum TexEnvImageFmt[2];
 177
 178    /* State which can't be computed completely on the fly:
 179     */
 180    GLuint LcsCullMode;
 181    GLuint LcsLineWidth;
 182    GLuint LcsPointSize;
 183
 184    /* Funny mesa mirrors
 185     */
 186    GLuint ClearColor;
 187
 188    /* DRI stuff
 189     */
 190    GLuint needClip;
 191    GLframebuffer *glBuffer;
 192
 193    /* These refer to the current draw (front vs. back) buffer:
 194     */
 195    char *drawMap;               /* draw buffer address in virtual mem */
 196    char *readMap;
 197    int drawX;                   /* origin of drawable in draw buffer */
 198    int drawY;
 199    GLuint numClipRects;         /* cliprects for that buffer */
 200    XF86DRIClipRectPtr pClipRects;
 201
 202    int lastSwap;
 203    int texAge;
 204    int ctxAge;
 205    int dirtyAge;
 206    int perf_boxes;
 207
 208    int do_irqs;
 209
 210    GLboolean scissor;
 211    XF86DRIClipRectRec draw_rect;
 212    XF86DRIClipRectRec scissor_rect;
 213
 214    drmContext hHWContext;
 215    drmLock *driHwLock;
 216    int driFd;
 217
 218    __DRIdrawablePrivate *driDrawable;
 219    __DRIscreenPrivate *driScreen;
 220    i830ScreenPrivate *i830Screen;
 221    I830SAREAPtr sarea;
 222 };
 223
 224
 225 #define I830_TEX_UNIT_ENABLED(unit)     (1<<unit)
 226 #define VALID_I830_TEXTURE_OBJECT(tobj) (tobj)
 227
 228 #define I830_CONTEXT(ctx)   ((i830ContextPtr)(ctx->DriverCtx))
 229 #define I830_DRIVER_DATA(vb) ((i830VertexBufferPtr)((vb)->driver_data))
 230 #define GET_DISPATCH_AGE(imesa) imesa->sarea->last_dispatch
 231 #define GET_ENQUEUE_AGE(imesa)  imesa->sarea->last_enqueue
 232
 233
 234 /* Lock the hardware and validate our state.
 235  */
 236 #define LOCK_HARDWARE( imesa )                          \
 237 do {                                                    \
 238     char __ret=0;                                       \
 239     DRM_CAS(imesa->driHwLock, imesa->hHWContext,        \
 240         (DRM_LOCK_HELD|imesa->hHWContext), __ret);      \
 241     if (__ret)                                          \
 242         i830GetLock( imesa, 0 );                        \
 243 }while (0)
 244
 245
 246   /* Unlock the hardware using the global current context
 247    */
 248 #define UNLOCK_HARDWARE(imesa)                                          \
 249 do {                                                                    \
 250    imesa->perf_boxes |= imesa->sarea->perf_boxes;                       \
 251    DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);       \
 252 } while (0)
 253
 254   /* This is the wrong way to do it, I'm sure.  Otherwise the drm
 255    * bitches that I've already got the heavyweight lock.  At worst,
 256    * this is 3 ioctls.  The best solution probably only gets me down
 257    * to 2 ioctls in the worst case.
 258    */
 259 #define LOCK_HARDWARE_QUIESCENT( imesa ) do {            \
 260    LOCK_HARDWARE( imesa );                               \
 261    i830RegetLockQuiescent( imesa );                      \
 262 } while(0)
 263
 264
 265
 266 extern void i830GetLock(i830ContextPtr imesa, GLuint flags);
 267 extern void i830EmitHwStateLocked(i830ContextPtr imesa);
 268 extern void i830EmitDrawingRectangle(i830ContextPtr imesa);
 269 extern void i830XMesaSetBackClipRects(i830ContextPtr imesa);
 270 extern void i830XMesaSetFrontClipRects(i830ContextPtr imesa);
 271 extern void i830DDExtensionsInit(GLcontext *ctx);
 272 extern void i830DDInitDriverFuncs(GLcontext *ctx);
 273 extern void i830DDUpdateHwState(GLcontext *ctx);
 274
 275 #define SUBPIXEL_X 0.125
 276 #define SUBPIXEL_Y 0.125
 277
 278
 279 /* ================================================================
 280  * Debugging:
 281  */
 282 #define DO_DEBUG                1
 283 #if DO_DEBUG
 284 extern int I830_DEBUG;
 285 #else
 286 #define I830_DEBUG              0
 287 #endif
 288
 289 #define DEBUG_TEXTURE   0x1
 290 #define DEBUG_STATE     0x2
 291 #define DEBUG_IOCTL     0x4
 292 #define DEBUG_PRIMS     0x8
 293 #define DEBUG_VERTS     0x10
 294 #define DEBUG_FALLBACKS 0x20
 295 #define DEBUG_VERBOSE   0x40
 296 #define DEBUG_DRI       0x80
 297 #define DEBUG_DMA       0x100
 298 #define DEBUG_SANITY    0x200
 299 #define DEBUG_SYNC      0x400
 300 #define DEBUG_SLEEP     0x800
 301
 302
 303 #define PCI_CHIP_845_G                  0x2562
 304 #define PCI_CHIP_I830_M                 0x3577
 305 #define PCI_CHIP_I855_GM                0x3582
 306 #define PCI_CHIP_I865_G                 0x2572
 307
 308
 309 #endif
 310