Reorganized hardware state data structures and state emission. Don't track
[mesa.git] / src / mesa / drivers / dri / i830 / i830_context.h
1 /*
2 * GLX Hardware Device Driver for Intel i830
3 * Copyright (C) 1999 Keith Whitwell
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
21 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 /* Adapted for use in the I830M driver:
26 * Jeff Hartmann <jhartmann@2d3d.com>
27 */
28 /* $XFree86: xc/lib/GL/mesa/src/drv/i830/i830_context.h,v 1.7 2003/02/06 04:18:01 dawes Exp $ */
29
30 #ifndef I830CONTEXT_INC
31 #define I830CONTEXT_INC
32
33 typedef struct i830_context_t i830Context;
34 typedef struct i830_context_t *i830ContextPtr;
35 typedef struct i830_texture_object_t *i830TextureObjectPtr;
36
37
38 #include "mtypes.h"
39 #include "drm.h"
40 #include "mm.h"
41 #include "tnl/t_vertex.h"
42
43 #include "i830_screen.h"
44 #include "i830_tex.h"
45
46 #define TAG(x) i830##x
47 #include "tnl_dd/t_dd_vertex.h"
48 #undef TAG
49
50 #define DV_PF_555 (1<<8)
51 #define DV_PF_565 (2<<8)
52 #define DV_PF_8888 (3<<8)
53
54 #define I830_TEX_MAXLEVELS 10
55
56 #define I830_CONTEXT(ctx) ((i830ContextPtr)(ctx->DriverCtx))
57 #define GET_DISPATCH_AGE(imesa) imesa->sarea->last_dispatch
58 #define GET_ENQUEUE_AGE(imesa) imesa->sarea->last_enqueue
59
60
61 typedef void (*i830_tri_func)(i830ContextPtr, i830Vertex *, i830Vertex *,
62 i830Vertex *);
63 typedef void (*i830_line_func)(i830ContextPtr, i830Vertex *, i830Vertex *);
64 typedef void (*i830_point_func)(i830ContextPtr, i830Vertex *);
65
66 #define I830_FALLBACK_TEXTURE 0x1
67 #define I830_FALLBACK_DRAW_BUFFER 0x2
68 #define I830_FALLBACK_READ_BUFFER 0x4
69 #define I830_FALLBACK_COLORMASK 0x8
70 #define I830_FALLBACK_RENDERMODE 0x10
71 #define I830_FALLBACK_STENCIL 0x20
72 #define I830_FALLBACK_STIPPLE 0x40
73 #define I830_FALLBACK_USER 0x80
74
75 struct i830_context_t
76 {
77 GLint refcount;
78 GLcontext *glCtx;
79
80 /*From I830 stuff*/
81 int TextureMode;
82 GLuint renderindex;
83 GLuint TexBlendWordsUsed[I830_TEXBLEND_COUNT];
84 GLuint TexBlend[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
85 GLuint Init_TexBlend[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
86 GLuint Init_TexBlendWordsUsed[I830_TEXBLEND_COUNT];
87 GLuint Init_TexBlendColorPipeNum[I830_TEXBLEND_COUNT];
88 GLuint TexBlendColorPipeNum[I830_TEXBLEND_COUNT];
89 GLuint Init_BufferSetup[I830_DEST_SETUP_SIZE];
90 GLuint LodBias[2];
91
92 GLenum palette_format;
93 GLuint palette[256];
94
95
96 GLuint Init_Setup[I830_CTX_SETUP_SIZE];
97 GLuint vertex_prim;
98 drmBufPtr vertex_dma_buffer;
99
100 GLboolean mask_red;
101 GLboolean mask_green;
102 GLboolean mask_blue;
103 GLboolean mask_alpha;
104
105 GLubyte clear_red;
106 GLubyte clear_green;
107 GLubyte clear_blue;
108 GLubyte clear_alpha;
109
110 GLfloat depth_scale;
111 int depth_clear_mask;
112 int stencil_clear_mask;
113 int ClearDepth;
114 int hw_stencil;
115
116 GLuint MonoColor;
117
118 GLuint LastTexEnabled;
119 GLuint TexEnabledMask;
120
121 /* Texture object bookkeeping
122 */
123 unsigned nr_heaps;
124 driTexHeap * texture_heaps[1];
125 driTextureObject swapped;
126
127 struct i830_texture_object_t *CurrentTexObj[2];
128
129 /* Rasterization and vertex state:
130 */
131 GLuint Fallback;
132 GLuint NewGLState;
133
134 /* Vertex state
135 */
136 GLuint vertex_size;
137 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
138 GLuint vertex_attr_count;
139 char *verts; /* points to tnl->clipspace.vertex_buf */
140
141
142 /* State for i830tris.c.
143 */
144 GLuint RenderIndex;
145 GLmatrix ViewportMatrix;
146 GLenum render_primitive;
147 GLenum reduced_primitive;
148 GLuint hw_primitive;
149
150 drmBufPtr vertex_buffer;
151 char *vertex_addr;
152 GLuint vertex_low;
153 GLuint vertex_high;
154 GLuint vertex_last_prim;
155
156 GLboolean upload_cliprects;
157
158
159 /* Fallback rasterization functions
160 */
161 i830_point_func draw_point;
162 i830_line_func draw_line;
163 i830_tri_func draw_tri;
164
165 /* Hardware state
166 */
167 GLuint dirty; /* I810_UPLOAD_* */
168 GLuint Setup[I830_CTX_SETUP_SIZE];
169 GLuint BufferSetup[I830_DEST_SETUP_SIZE];
170 GLuint StippleSetup[I830_STP_SETUP_SIZE];
171 unsigned int lastStamp;
172 GLboolean hw_stipple;
173
174 GLenum TexEnvImageFmt[2];
175
176 /* State which can't be computed completely on the fly:
177 */
178 GLuint LcsCullMode;
179 GLuint LcsLineWidth;
180 GLuint LcsPointSize;
181
182 /* Funny mesa mirrors
183 */
184 GLuint ClearColor;
185
186 /* DRI stuff
187 */
188 GLuint needClip;
189 GLframebuffer *glBuffer;
190
191 /* These refer to the current draw (front vs. back) buffer:
192 */
193 char *drawMap; /* draw buffer address in virtual mem */
194 char *readMap;
195 int drawX; /* origin of drawable in draw buffer */
196 int drawY;
197 GLuint numClipRects; /* cliprects for that buffer */
198 XF86DRIClipRectPtr pClipRects;
199
200 int lastSwap;
201 int texAge;
202 int ctxAge;
203 int dirtyAge;
204 int perf_boxes;
205
206 int do_irqs;
207
208 GLboolean scissor;
209 XF86DRIClipRectRec draw_rect;
210 XF86DRIClipRectRec scissor_rect;
211
212 drmContext hHWContext;
213 drmLock *driHwLock;
214 int driFd;
215
216 __DRIdrawablePrivate *driDrawable;
217 __DRIscreenPrivate *driScreen;
218 i830ScreenPrivate *i830Screen;
219 I830SAREAPtr sarea;
220 };
221
222
223 #define I830_TEX_UNIT_ENABLED(unit) (1<<unit)
224 #define VALID_I830_TEXTURE_OBJECT(tobj) (tobj)
225
226 #define I830_CONTEXT(ctx) ((i830ContextPtr)(ctx->DriverCtx))
227 #define I830_DRIVER_DATA(vb) ((i830VertexBufferPtr)((vb)->driver_data))
228 #define GET_DISPATCH_AGE(imesa) imesa->sarea->last_dispatch
229 #define GET_ENQUEUE_AGE(imesa) imesa->sarea->last_enqueue
230
231
232 /* Lock the hardware and validate our state.
233 */
234 #define LOCK_HARDWARE( imesa ) \
235 do { \
236 char __ret=0; \
237 DRM_CAS(imesa->driHwLock, imesa->hHWContext, \
238 (DRM_LOCK_HELD|imesa->hHWContext), __ret); \
239 if (__ret) \
240 i830GetLock( imesa, 0 ); \
241 }while (0)
242
243
244 /* Unlock the hardware using the global current context
245 */
246 #define UNLOCK_HARDWARE(imesa) \
247 do { \
248 imesa->perf_boxes |= imesa->sarea->perf_boxes; \
249 DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext); \
250 } while (0)
251
252 /* This is the wrong way to do it, I'm sure. Otherwise the drm
253 * bitches that I've already got the heavyweight lock. At worst,
254 * this is 3 ioctls. The best solution probably only gets me down
255 * to 2 ioctls in the worst case.
256 */
257 #define LOCK_HARDWARE_QUIESCENT( imesa ) do { \
258 LOCK_HARDWARE( imesa ); \
259 i830RegetLockQuiescent( imesa ); \
260 } while(0)
261
262
263
264 extern void i830GetLock(i830ContextPtr imesa, GLuint flags);
265 extern void i830EmitHwStateLocked(i830ContextPtr imesa);
266 extern void i830EmitDrawingRectangle(i830ContextPtr imesa);
267 extern void i830XMesaSetBackClipRects(i830ContextPtr imesa);
268 extern void i830XMesaSetFrontClipRects(i830ContextPtr imesa);
269 extern void i830DDExtensionsInit(GLcontext *ctx);
270 extern void i830DDInitDriverFuncs(GLcontext *ctx);
271 extern void i830DDUpdateHwState(GLcontext *ctx);
272
273 #define SUBPIXEL_X 0.125
274 #define SUBPIXEL_Y 0.125
275
276
277 /* ================================================================
278 * Debugging:
279 */
280 #define DO_DEBUG 1
281 #if DO_DEBUG
282 extern int I830_DEBUG;
283 #else
284 #define I830_DEBUG 0
285 #endif
286
287 #define DEBUG_TEXTURE 0x1
288 #define DEBUG_STATE 0x2
289 #define DEBUG_IOCTL 0x4
290 #define DEBUG_PRIMS 0x8
291 #define DEBUG_VERTS 0x10
292 #define DEBUG_FALLBACKS 0x20
293 #define DEBUG_VERBOSE 0x40
294 #define DEBUG_DRI 0x80
295 #define DEBUG_DMA 0x100
296 #define DEBUG_SANITY 0x200
297 #define DEBUG_SYNC 0x400
298 #define DEBUG_SLEEP 0x800
299
300
301 #define PCI_CHIP_845_G 0x2562
302 #define PCI_CHIP_I830_M 0x3577
303 #define PCI_CHIP_I855_GM 0x3582
304 #define PCI_CHIP_I865_G 0x2572
305
306
307 #endif
308