Can't bail in sisDDLogicOpCode when logicop is off, because it's called with
[mesa.git] / src / mesa / drivers / dri / i830 / i830_render.c
1 /*
2 * Intel i810 DRI driver for Mesa 3.5
3 *
4 * Copyright (C) 1999-2000 Keith Whitwell All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL KEITH WHITWELL BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
21 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Author:
25 * Keith Whitwell <keith@tungstengraphics.com>
26 * Adapted for use on the I830:
27 * Jeff Hartmann <jhartmann@2d3d.com>
28 */
29 /* $XFree86: xc/lib/GL/mesa/src/drv/i830/i830_render.c,v 1.2 2002/12/10 01:26:53 dawes Exp $ */
30
31 /*
32 * Render unclipped vertex buffers by emitting vertices directly to
33 * dma buffers. Use strip/fan hardware acceleration where possible.
34 *
35 */
36 #include "glheader.h"
37 #include "context.h"
38 #include "macros.h"
39 #include "imports.h"
40 #include "mtypes.h"
41 #include "enums.h"
42
43 #include "tnl/t_context.h"
44
45 #include "i830_screen.h"
46 #include "i830_dri.h"
47
48 #include "i830_context.h"
49 #include "i830_tris.h"
50 #include "i830_state.h"
51 #include "i830_ioctl.h"
52
53 /*
54 * Render unclipped vertex buffers by emitting vertices directly to
55 * dma buffers. Use strip/fan hardware primitives where possible.
56 * Try to simulate missing primitives with indexed vertices.
57 */
58 #define HAVE_POINTS 0 /* Has it, but can't use because subpixel has to
59 * be adjusted for points on the I830/I845G
60 */
61 #define HAVE_LINES 1
62 #define HAVE_LINE_STRIPS 1
63 #define HAVE_TRIANGLES 1
64 #define HAVE_TRI_STRIPS 1
65 #define HAVE_TRI_STRIP_1 0 /* has it, template can't use it yet */
66 #define HAVE_TRI_FANS 1
67 #define HAVE_POLYGONS 1
68 #define HAVE_QUADS 0
69 #define HAVE_QUAD_STRIPS 0
70
71 #define HAVE_ELTS 0
72
73 static GLuint hw_prim[GL_POLYGON+1] = {
74 0,
75 PRIM3D_LINELIST,
76 PRIM3D_LINESTRIP,
77 PRIM3D_LINESTRIP,
78 PRIM3D_TRILIST,
79 PRIM3D_TRISTRIP,
80 PRIM3D_TRIFAN,
81 0,
82 0,
83 PRIM3D_POLY
84 };
85
86 static const GLenum reduced_prim[GL_POLYGON+1] = {
87 GL_POINTS,
88 GL_LINES,
89 GL_LINES,
90 GL_LINES,
91 GL_TRIANGLES,
92 GL_TRIANGLES,
93 GL_TRIANGLES,
94 GL_TRIANGLES,
95 GL_TRIANGLES,
96 GL_TRIANGLES
97 };
98
99 static const int scale_prim[GL_POLYGON+1] = {
100 0, /* fallback case */
101 1,
102 2,
103 2,
104 1,
105 3,
106 3,
107 0, /* fallback case */
108 0, /* fallback case */
109 3
110 };
111
112
113 #define LOCAL_VARS i830ContextPtr imesa = I830_CONTEXT(ctx)
114 #define INIT( prim ) do { \
115 I830_STATECHANGE(imesa, 0); \
116 i830RasterPrimitive( ctx, reduced_prim[prim], hw_prim[prim] ); \
117 } while (0)
118
119 #define FLUSH() I830_FIREVERTICES( imesa )
120 #define GET_CURRENT_VB_MAX_VERTS() \
121 (((int)imesa->vertex_high - (int)imesa->vertex_low) / (imesa->vertex_size*4))
122 #define GET_SUBSEQUENT_VB_MAX_VERTS() \
123 (I830_DMA_BUF_SZ-8) / (imesa->vertex_size * 4)
124
125
126 #define ALLOC_VERTS( nr ) \
127 i830AllocDmaLow( imesa, (nr) * imesa->vertex_size * 4)
128 #define EMIT_VERTS( ctx, j, nr, buf ) \
129 _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf)
130
131 #define TAG(x) i830_##x
132 #include "tnl_dd/t_dd_dmatmp.h"
133
134
135 /**********************************************************************/
136 /* Render pipeline stage */
137 /**********************************************************************/
138
139 /* Heuristic for i830, which can only emit a single primitive per dma
140 * buffer, and has only a small number of dma buffers.
141 */
142 static GLboolean choose_render( struct vertex_buffer *VB, int bufsz )
143 {
144 int nr_prims = 0;
145 int nr_rprims = 0;
146 int nr_rverts = 0;
147 int rprim = 0;
148 int i;
149
150
151 for (i = 0 ; i < VB->PrimitiveCount ; i++)
152 {
153 GLuint prim = VB->Primitive[i].mode;
154 GLuint length = VB->Primitive[i].count;
155
156 if (!length)
157 continue;
158
159 if (!hw_prim[prim & PRIM_MODE_MASK])
160 return GL_FALSE;
161
162 nr_prims++;
163 nr_rverts += length * scale_prim[prim & PRIM_MODE_MASK];
164
165 if (reduced_prim[prim&PRIM_MODE_MASK] != rprim) {
166 nr_rprims++;
167 rprim = reduced_prim[prim&PRIM_MODE_MASK];
168 }
169 }
170
171 nr_prims += i / bufsz;
172 nr_rprims += nr_rverts / bufsz;
173
174 if ((nr_prims > nr_rprims * 2) ||
175 (nr_prims > nr_rprims + 3))
176 return GL_FALSE;
177
178 return GL_TRUE;
179 }
180
181
182 static GLboolean i830_run_render( GLcontext *ctx,
183 struct tnl_pipeline_stage *stage )
184 {
185 i830ContextPtr imesa = I830_CONTEXT(ctx);
186 TNLcontext *tnl = TNL_CONTEXT(ctx);
187 struct vertex_buffer *VB = &tnl->vb;
188 GLuint i;
189 /* Don't handle clipping or indexed vertices.
190 */
191 if (imesa->RenderIndex != 0 ||
192 !i830_validate_render( ctx, VB ) ||
193 !choose_render( VB, 200 )) { /* 200 is estimate of nr verts/buf */
194 return GL_TRUE;
195 }
196
197 tnl->Driver.Render.Start( ctx );
198
199 for (i = 0 ; i < VB->PrimitiveCount ; i++)
200 {
201 GLuint prim = VB->Primitive[i].mode;
202 GLuint start = VB->Primitive[i].start;
203 GLuint length = VB->Primitive[i].count;
204
205 if (!length)
206 continue;
207
208 i830_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
209 prim );
210 }
211
212 tnl->Driver.Render.Finish( ctx );
213
214 return GL_FALSE; /* finished the pipe */
215 }
216
217
218 static void i830_check_render( GLcontext *ctx,
219 struct tnl_pipeline_stage *stage )
220 {
221 stage->inputs = TNL_CONTEXT(ctx)->render_inputs;
222 }
223
224 static void dtr( struct tnl_pipeline_stage *stage )
225 {
226 (void)stage;
227 }
228
229
230 const struct tnl_pipeline_stage _i830_render_stage =
231 {
232 "i830 render",
233 (_DD_NEW_SEPARATE_SPECULAR |
234 _NEW_TEXTURE|
235 _NEW_FOG|
236 _NEW_RENDERMODE), /* re-check (new inputs) */
237 0, /* re-run (always runs) */
238 GL_TRUE, /* active */
239 0, 0, /* inputs (set in check_render), outputs */
240 0, 0, /* changed_inputs, private */
241 dtr, /* destructor */
242 i830_check_render, /* check - initially set to alloc data */
243 i830_run_render /* run */
244 };