projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
dri: Remove unused dri texmem.c
[mesa.git] / src / mesa / drivers / dri / i915 / i830_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/dd.h"
34 #include "main/state.h"
35
36 #include "drivers/common/driverfuncs.h"
37
38 #include "intel_screen.h"
39 #include "intel_batchbuffer.h"
40 #include "intel_fbo.h"
41 #include "intel_buffers.h"
42
43 #include "i830_context.h"
44 #include "i830_reg.h"
45
46 #define FILE_DEBUG_FLAG DEBUG_STATE
47
48 static void
49 i830StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
50 GLuint mask)
51 {
52 struct i830_context *i830 = i830_context(ctx);
53 int test = intel_translate_compare_func(func);
54
55 mask = mask & 0xff;
56
57 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
58 _mesa_lookup_enum_by_nr(func), ref, mask);
59
60
61 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
62 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
63 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
64 STENCIL_TEST_MASK(mask));
65 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
66 ENABLE_STENCIL_TEST_FUNC_MASK);
67 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
68 ENABLE_STENCIL_TEST_FUNC |
69 STENCIL_REF_VALUE(ref) |
70 STENCIL_TEST_FUNC(test));
71 }
72
73 static void
74 i830StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
75 {
76 struct i830_context *i830 = i830_context(ctx);
77
78 DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
79
80 mask = mask & 0xff;
81
82 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
83 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
84 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
85 STENCIL_WRITE_MASK(mask));
86 }
87
88 static void
89 i830StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
90 GLenum zpass)
91 {
92 struct i830_context *i830 = i830_context(ctx);
93 int fop, dfop, dpop;
94
95 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
96 _mesa_lookup_enum_by_nr(fail),
97 _mesa_lookup_enum_by_nr(zfail),
98 _mesa_lookup_enum_by_nr(zpass));
99
100 fop = 0;
101 dfop = 0;
102 dpop = 0;
103
104 switch (fail) {
105 case GL_KEEP:
106 fop = STENCILOP_KEEP;
107 break;
108 case GL_ZERO:
109 fop = STENCILOP_ZERO;
110 break;
111 case GL_REPLACE:
112 fop = STENCILOP_REPLACE;
113 break;
114 case GL_INCR:
115 fop = STENCILOP_INCRSAT;
116 break;
117 case GL_DECR:
118 fop = STENCILOP_DECRSAT;
119 break;
120 case GL_INCR_WRAP:
121 fop = STENCILOP_INCR;
122 break;
123 case GL_DECR_WRAP:
124 fop = STENCILOP_DECR;
125 break;
126 case GL_INVERT:
127 fop = STENCILOP_INVERT;
128 break;
129 default:
130 break;
131 }
132 switch (zfail) {
133 case GL_KEEP:
134 dfop = STENCILOP_KEEP;
135 break;
136 case GL_ZERO:
137 dfop = STENCILOP_ZERO;
138 break;
139 case GL_REPLACE:
140 dfop = STENCILOP_REPLACE;
141 break;
142 case GL_INCR:
143 dfop = STENCILOP_INCRSAT;
144 break;
145 case GL_DECR:
146 dfop = STENCILOP_DECRSAT;
147 break;
148 case GL_INCR_WRAP:
149 dfop = STENCILOP_INCR;
150 break;
151 case GL_DECR_WRAP:
152 dfop = STENCILOP_DECR;
153 break;
154 case GL_INVERT:
155 dfop = STENCILOP_INVERT;
156 break;
157 default:
158 break;
159 }
160 switch (zpass) {
161 case GL_KEEP:
162 dpop = STENCILOP_KEEP;
163 break;
164 case GL_ZERO:
165 dpop = STENCILOP_ZERO;
166 break;
167 case GL_REPLACE:
168 dpop = STENCILOP_REPLACE;
169 break;
170 case GL_INCR:
171 dpop = STENCILOP_INCRSAT;
172 break;
173 case GL_DECR:
174 dpop = STENCILOP_DECRSAT;
175 break;
176 case GL_INCR_WRAP:
177 dpop = STENCILOP_INCR;
178 break;
179 case GL_DECR_WRAP:
180 dpop = STENCILOP_DECR;
181 break;
182 case GL_INVERT:
183 dpop = STENCILOP_INVERT;
184 break;
185 default:
186 break;
187 }
188
189
190 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
191 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
192 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
193 STENCIL_FAIL_OP(fop) |
194 STENCIL_PASS_DEPTH_FAIL_OP
195 (dfop) |
196 STENCIL_PASS_DEPTH_PASS_OP
197 (dpop));
198 }
199
200 static void
201 i830AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
202 {
203 struct i830_context *i830 = i830_context(ctx);
204 int test = intel_translate_compare_func(func);
205 GLubyte refByte;
206 GLuint refInt;
207
208 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
209 refInt = (GLuint) refByte;
210
211 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
212 i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
213 i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
214 ENABLE_ALPHA_REF_VALUE |
215 ALPHA_TEST_FUNC(test) |
216 ALPHA_REF_VALUE(refInt));
217 }
218
219 /**
220 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
221 * Blend, and Blending. It needs to be called from numerous places where we
222 * could change the LogicOp or Independant Alpha Blend without subsequent
223 * calls to glEnable.
224 *
225 * \todo
226 * This function is substantially different from the old i830-specific driver.
227 * I'm not sure which is correct.
228 */
229 static void
230 i830EvalLogicOpBlendState(struct gl_context * ctx)
231 {
232 struct i830_context *i830 = i830_context(ctx);
233
234 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
235
236 if (ctx->Color.ColorLogicOpEnabled) {
237 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
238 ENABLE_LOGIC_OP_MASK);
239 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
240 ENABLE_LOGIC_OP);
241 }
242 else if (ctx->Color.BlendEnabled) {
243 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
244 ENABLE_LOGIC_OP_MASK);
245 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
246 DISABLE_LOGIC_OP);
247 }
248 else {
249 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
250 ENABLE_LOGIC_OP_MASK);
251 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
252 DISABLE_LOGIC_OP);
253 }
254 }
255
256 static void
257 i830BlendColor(struct gl_context * ctx, const GLfloat color[4])
258 {
259 struct i830_context *i830 = i830_context(ctx);
260 GLubyte r, g, b, a;
261
262 DBG("%s\n", __FUNCTION__);
263
264 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
265 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
266 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
267 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
268
269 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
270 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
271 (a << 24) | (r << 16) | (g << 8) | b;
272 }
273
274 /**
275 * Sets both the blend equation (called "function" in i830 docs) and the
276 * blend function (called "factor" in i830 docs). This is done in a single
277 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
278 * change the interpretation of the blend function.
279 */
280 static void
281 i830_set_blend_state(struct gl_context * ctx)
282 {
283 struct i830_context *i830 = i830_context(ctx);
284 int funcA;
285 int funcRGB;
286 int eqnA;
287 int eqnRGB;
288 int iab;
289 int s1;
290
291
292 funcRGB =
293 SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcRGB))
294 | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstRGB));
295
296 switch (ctx->Color.Blend[0].EquationRGB) {
297 case GL_FUNC_ADD:
298 eqnRGB = BLENDFUNC_ADD;
299 break;
300 case GL_MIN:
301 eqnRGB = BLENDFUNC_MIN;
302 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
303 break;
304 case GL_MAX:
305 eqnRGB = BLENDFUNC_MAX;
306 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
307 break;
308 case GL_FUNC_SUBTRACT:
309 eqnRGB = BLENDFUNC_SUB;
310 break;
311 case GL_FUNC_REVERSE_SUBTRACT:
312 eqnRGB = BLENDFUNC_RVRSE_SUB;
313 break;
314 default:
315 fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
316 __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB);
317 return;
318 }
319
320
321 funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcA))
322 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstA));
323
324 switch (ctx->Color.Blend[0].EquationA) {
325 case GL_FUNC_ADD:
326 eqnA = BLENDFUNC_ADD;
327 break;
328 case GL_MIN:
329 eqnA = BLENDFUNC_MIN;
330 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
331 break;
332 case GL_MAX:
333 eqnA = BLENDFUNC_MAX;
334 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
335 break;
336 case GL_FUNC_SUBTRACT:
337 eqnA = BLENDFUNC_SUB;
338 break;
339 case GL_FUNC_REVERSE_SUBTRACT:
340 eqnA = BLENDFUNC_RVRSE_SUB;
341 break;
342 default:
343 fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
344 __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA);
345 return;
346 }
347
348 iab = eqnA | funcA
349 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
350 | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
351 | ENABLE_ALPHA_BLENDFUNC;
352 s1 = eqnRGB | funcRGB
353 | _3DSTATE_MODES_1_CMD
354 | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
355 | ENABLE_COLR_BLND_FUNC;
356
357 if ((eqnA | funcA) != (eqnRGB | funcRGB))
358 iab |= ENABLE_INDPT_ALPHA_BLEND;
359 else
360 iab |= DISABLE_INDPT_ALPHA_BLEND;
361
362 if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
363 s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
364 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
365 i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
366 i830->state.Ctx[I830_CTXREG_STATE1] = s1;
367 }
368
369 /* This will catch a logicop blend equation. It will also ensure
370 * independant alpha blend is really in the correct state (either enabled
371 * or disabled) if blending is already enabled.
372 */
373
374 i830EvalLogicOpBlendState(ctx);
375
376 if (0) {
377 fprintf(stderr,
378 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
379 __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
380 i830->state.Ctx[I830_CTXREG_IALPHAB],
381 (ctx->Color.BlendEnabled) ? "en" : "dis");
382 }
383 }
384
385
386 static void
387 i830BlendEquationSeparate(struct gl_context * ctx, GLenum modeRGB, GLenum modeA)
388 {
389 DBG("%s -> %s, %s\n", __FUNCTION__,
390 _mesa_lookup_enum_by_nr(modeRGB),
391 _mesa_lookup_enum_by_nr(modeA));
392
393 (void) modeRGB;
394 (void) modeA;
395 i830_set_blend_state(ctx);
396 }
397
398
399 static void
400 i830BlendFuncSeparate(struct gl_context * ctx, GLenum sfactorRGB,
401 GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
402 {
403 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
404 _mesa_lookup_enum_by_nr(sfactorRGB),
405 _mesa_lookup_enum_by_nr(dfactorRGB),
406 _mesa_lookup_enum_by_nr(sfactorA),
407 _mesa_lookup_enum_by_nr(dfactorA));
408
409 (void) sfactorRGB;
410 (void) dfactorRGB;
411 (void) sfactorA;
412 (void) dfactorA;
413 i830_set_blend_state(ctx);
414 }
415
416
417
418 static void
419 i830DepthFunc(struct gl_context * ctx, GLenum func)
420 {
421 struct i830_context *i830 = i830_context(ctx);
422 int test = intel_translate_compare_func(func);
423
424 DBG("%s\n", __FUNCTION__);
425
426 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
427 i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
428 i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
429 DEPTH_TEST_FUNC(test));
430 }
431
432 static void
433 i830DepthMask(struct gl_context * ctx, GLboolean flag)
434 {
435 struct i830_context *i830 = i830_context(ctx);
436
437 DBG("%s flag (%d)\n", __FUNCTION__, flag);
438
439 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
440
441 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
442
443 if (flag && ctx->Depth.Test)
444 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
445 else
446 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
447 }
448
449 /** Called from ctx->Driver.Viewport() */
450 static void
451 i830Viewport(struct gl_context * ctx,
452 GLint x, GLint y, GLsizei width, GLsizei height)
453 {
454 intelCalcViewport(ctx);
455 }
456
457
458 /** Called from ctx->Driver.DepthRange() */
459 static void
460 i830DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
461 {
462 intelCalcViewport(ctx);
463 }
464
465 /* =============================================================
466 * Polygon stipple
467 *
468 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
469 * Fortunately stipple is usually a repeating pattern.
470 */
471 static void
472 i830PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
473 {
474 struct i830_context *i830 = i830_context(ctx);
475 const GLubyte *m = mask;
476 GLubyte p[4];
477 int i, j, k;
478 int active = (ctx->Polygon.StippleFlag &&
479 i830->intel.reduced_primitive == GL_TRIANGLES);
480 GLuint newMask;
481
482 if (active) {
483 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
484 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
485 }
486
487 p[0] = mask[12] & 0xf;
488 p[0] |= p[0] << 4;
489 p[1] = mask[8] & 0xf;
490 p[1] |= p[1] << 4;
491 p[2] = mask[4] & 0xf;
492 p[2] |= p[2] << 4;
493 p[3] = mask[0] & 0xf;
494 p[3] |= p[3] << 4;
495
496 for (k = 0; k < 8; k++)
497 for (j = 3; j >= 0; j--)
498 for (i = 0; i < 4; i++, m++)
499 if (*m != p[j]) {
500 i830->intel.hw_stipple = 0;
501 return;
502 }
503
504 newMask = (((p[0] & 0xf) << 0) |
505 ((p[1] & 0xf) << 4) |
506 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
507
508
509 if (newMask == 0xffff || newMask == 0x0) {
510 /* this is needed to make conform pass */
511 i830->intel.hw_stipple = 0;
512 return;
513 }
514
515 i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
516 i830->state.Stipple[I830_STPREG_ST1] |= newMask;
517 i830->intel.hw_stipple = 1;
518
519 if (active)
520 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
521 }
522
523
524 /* =============================================================
525 * Hardware clipping
526 */
527 static void
528 i830Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
529 {
530 struct i830_context *i830 = i830_context(ctx);
531 int x1, y1, x2, y2;
532
533 if (!ctx->DrawBuffer)
534 return;
535
536 DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
537
538 if (ctx->DrawBuffer->Name == 0) {
539 x1 = x;
540 y1 = ctx->DrawBuffer->Height - (y + h);
541 x2 = x + w - 1;
542 y2 = y1 + h - 1;
543 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
544 }
545 else {
546 /* FBO - not inverted
547 */
548 x1 = x;
549 y1 = y;
550 x2 = x + w - 1;
551 y2 = y + h - 1;
552 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
553 }
554
555 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
556 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
557 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
558 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
559
560 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
561
562 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
563 i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
564 i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
565 }
566
567 static void
568 i830LogicOp(struct gl_context * ctx, GLenum opcode)
569 {
570 struct i830_context *i830 = i830_context(ctx);
571 int tmp = intel_translate_logic_op(opcode);
572
573 DBG("%s\n", __FUNCTION__);
574
575 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
576 i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
577 i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
578 }
579
580
581
582 static void
583 i830CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
584 {
585 struct i830_context *i830 = i830_context(ctx);
586 GLuint mode;
587
588 DBG("%s\n", __FUNCTION__);
589
590 if (!ctx->Polygon.CullFlag) {
591 mode = CULLMODE_NONE;
592 }
593 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
594 mode = CULLMODE_CW;
595
596 if (ctx->Polygon.CullFaceMode == GL_FRONT)
597 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
598 if (ctx->Polygon.FrontFace != GL_CCW)
599 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
600 }
601 else {
602 mode = CULLMODE_BOTH;
603 }
604
605 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
606 i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
607 i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
608 }
609
610 static void
611 i830LineWidth(struct gl_context * ctx, GLfloat widthf)
612 {
613 struct i830_context *i830 = i830_context(ctx);
614 int width;
615 int state5;
616
617 DBG("%s\n", __FUNCTION__);
618
619 width = (int) (widthf * 2);
620 width = CLAMP(width, 1, 15);
621
622 state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
623 state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
624
625 if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
626 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
627 i830->state.Ctx[I830_CTXREG_STATE5] = state5;
628 }
629 }
630
631 static void
632 i830PointSize(struct gl_context * ctx, GLfloat size)
633 {
634 struct i830_context *i830 = i830_context(ctx);
635 GLint point_size = (int) size;
636
637 DBG("%s\n", __FUNCTION__);
638
639 point_size = CLAMP(point_size, 1, 256);
640 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
641 i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
642 i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
643 FIXED_POINT_WIDTH(point_size));
644 }
645
646
647 /* =============================================================
648 * Color masks
649 */
650
651 static void
652 i830ColorMask(struct gl_context * ctx,
653 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
654 {
655 struct i830_context *i830 = i830_context(ctx);
656 GLuint tmp = 0;
657
658 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
659
660 tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
661 ENABLE_COLOR_MASK |
662 ENABLE_COLOR_WRITE |
663 ((!r) << WRITEMASK_RED_SHIFT) |
664 ((!g) << WRITEMASK_GREEN_SHIFT) |
665 ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
666
667 if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
668 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
669 i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
670 }
671 }
672
673 static void
674 update_specular(struct gl_context * ctx)
675 {
676 struct i830_context *i830 = i830_context(ctx);
677
678 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
679 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
680
681 if (_mesa_need_secondary_color(ctx))
682 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
683 else
684 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
685 }
686
687 static void
688 i830LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
689 {
690 DBG("%s\n", __FUNCTION__);
691
692 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
693 update_specular(ctx);
694 }
695 }
696
697 /* In Mesa 3.5 we can reliably do native flatshading.
698 */
699 static void
700 i830ShadeModel(struct gl_context * ctx, GLenum mode)
701 {
702 struct i830_context *i830 = i830_context(ctx);
703 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
704
705
706 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
707
708 i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
709
710 if (mode == GL_FLAT) {
711 i830->state.Ctx[I830_CTXREG_STATE3] |=
712 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
713 | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
714 COLOR_SHADE_MODE(SHADE_MODE_FLAT));
715 }
716 else {
717 i830->state.Ctx[I830_CTXREG_STATE3] |=
718 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
719 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
720 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
721 COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
722 }
723 }
724
725 /* =============================================================
726 * Fog
727 */
728 static void
729 i830Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
730 {
731 struct i830_context *i830 = i830_context(ctx);
732
733 DBG("%s\n", __FUNCTION__);
734
735 if (pname == GL_FOG_COLOR) {
736 GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
737 ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
738 ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
739
740 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
741 i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
742 (_3DSTATE_FOG_COLOR_CMD | color);
743 }
744 }
745
746 /* =============================================================
747 */
748
749 static void
750 i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
751 {
752 struct i830_context *i830 = i830_context(ctx);
753
754 switch (cap) {
755 case GL_LIGHTING:
756 case GL_COLOR_SUM:
757 update_specular(ctx);
758 break;
759
760 case GL_ALPHA_TEST:
761 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
762 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
763 if (state)
764 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
765 else
766 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
767
768 break;
769
770 case GL_BLEND:
771 i830EvalLogicOpBlendState(ctx);
772 break;
773
774 case GL_COLOR_LOGIC_OP:
775 i830EvalLogicOpBlendState(ctx);
776
777 /* Logicop doesn't seem to work at 16bpp:
778 */
779 if (i830->intel.ctx.Visual.rgbBits == 16)
780 FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
781 break;
782
783 case GL_DITHER:
784 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
785 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
786
787 if (state)
788 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
789 else
790 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
791 break;
792
793 case GL_DEPTH_TEST:
794 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
795 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
796
797 if (state)
798 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
799 else
800 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
801
802 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
803 */
804 i830DepthMask(ctx, ctx->Depth.Mask);
805 break;
806
807 case GL_SCISSOR_TEST:
808 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
809
810 if (state)
811 i830->state.Buffer[I830_DESTREG_SENABLE] =
812 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
813 else
814 i830->state.Buffer[I830_DESTREG_SENABLE] =
815 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
816
817 break;
818
819 case GL_LINE_SMOOTH:
820 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
821
822 i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
823 if (state)
824 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
825 else
826 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
827 break;
828
829 case GL_FOG:
830 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
831 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
832 if (state)
833 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
834 else
835 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
836 break;
837
838 case GL_CULL_FACE:
839 i830CullFaceFrontFace(ctx, 0);
840 break;
841
842 case GL_TEXTURE_2D:
843 break;
844
845 case GL_STENCIL_TEST:
846 {
847 bool hw_stencil = false;
848 if (ctx->DrawBuffer) {
849 struct intel_renderbuffer *irbStencil
850 = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
851 hw_stencil = (irbStencil && irbStencil->region);
852 }
853 if (hw_stencil) {
854 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
855
856 if (state) {
857 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
858 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
859 }
860 else {
861 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
862 i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
863 ~ENABLE_STENCIL_WRITE;
864 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
865 i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
866 DISABLE_STENCIL_WRITE;
867 }
868 }
869 else {
870 FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
871 }
872 }
873 break;
874
875 case GL_POLYGON_STIPPLE:
876 /* The stipple command worked on my 855GM box, but not my 845G.
877 * I'll do more testing later to find out exactly which hardware
878 * supports it. Disabled for now.
879 */
880 if (i830->intel.hw_stipple &&
881 i830->intel.reduced_primitive == GL_TRIANGLES) {
882 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
883 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
884 if (state)
885 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
886 }
887 break;
888
889 default:
890 ;
891 }
892 }
893
894
895 static void
896 i830_init_packets(struct i830_context *i830)
897 {
898 /* Zero all state */
899 memset(&i830->state, 0, sizeof(i830->state));
900
901 /* Set default blend state */
902 i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
903 TEXPIPE_COLOR |
904 ENABLE_TEXOUTPUT_WRT_SEL |
905 TEXOP_OUTPUT_CURRENT |
906 DISABLE_TEX_CNTRL_STAGE |
907 TEXOP_SCALE_1X |
908 TEXOP_MODIFY_PARMS |
909 TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
910 i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
911 TEXPIPE_ALPHA |
912 ENABLE_TEXOUTPUT_WRT_SEL |
913 TEXOP_OUTPUT_CURRENT |
914 TEXOP_SCALE_1X |
915 TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
916 i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
917 TEXPIPE_COLOR |
918 TEXBLEND_ARG1 |
919 TEXBLENDARG_MODIFY_PARMS |
920 TEXBLENDARG_DIFFUSE);
921 i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
922 TEXPIPE_ALPHA |
923 TEXBLEND_ARG1 |
924 TEXBLENDARG_MODIFY_PARMS |
925 TEXBLENDARG_DIFFUSE);
926
927 i830->state.TexBlendWordsUsed[0] = 4;
928
929
930 i830->state.Ctx[I830_CTXREG_VF] = 0;
931 i830->state.Ctx[I830_CTXREG_VF2] = 0;
932
933 i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
934 AA_LINE_ECAAR_WIDTH_ENABLE |
935 AA_LINE_ECAAR_WIDTH_1_0 |
936 AA_LINE_REGION_WIDTH_ENABLE |
937 AA_LINE_REGION_WIDTH_1_0 |
938 AA_LINE_DISABLE);
939
940 i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
941 DISABLE_LOGIC_OP |
942 DISABLE_STENCIL_TEST |
943 DISABLE_DEPTH_BIAS |
944 DISABLE_SPEC_ADD |
945 DISABLE_FOG |
946 DISABLE_ALPHA_TEST |
947 DISABLE_COLOR_BLEND |
948 DISABLE_DEPTH_TEST);
949
950 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
951 if (i830->intel.hw_stencil) {
952 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
953 ENABLE_STENCIL_WRITE |
954 ENABLE_TEX_CACHE |
955 ENABLE_DITHER |
956 ENABLE_COLOR_MASK |
957 /* set no color comps disabled */
958 ENABLE_COLOR_WRITE |
959 ENABLE_DEPTH_WRITE);
960 }
961 else
962 #endif
963 {
964 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
965 DISABLE_STENCIL_WRITE |
966 ENABLE_TEX_CACHE |
967 ENABLE_DITHER |
968 ENABLE_COLOR_MASK |
969 /* set no color comps disabled */
970 ENABLE_COLOR_WRITE |
971 ENABLE_DEPTH_WRITE);
972 }
973
974 i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
975 ENABLE_COLR_BLND_FUNC |
976 BLENDFUNC_ADD |
977 ENABLE_SRC_BLND_FACTOR |
978 SRC_BLND_FACT(BLENDFACT_ONE) |
979 ENABLE_DST_BLND_FACTOR |
980 DST_BLND_FACT(BLENDFACT_ZERO));
981
982 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
983 ENABLE_GLOBAL_DEPTH_BIAS |
984 GLOBAL_DEPTH_BIAS(0) |
985 ENABLE_ALPHA_TEST_FUNC |
986 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
987 | ALPHA_REF_VALUE(0));
988
989 i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
990 ENABLE_DEPTH_TEST_FUNC |
991 DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
992 ENABLE_ALPHA_SHADE_MODE |
993 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
994 | ENABLE_FOG_SHADE_MODE |
995 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
996 ENABLE_SPEC_SHADE_MODE |
997 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
998 ENABLE_COLOR_SHADE_MODE |
999 COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
1000 | ENABLE_CULL_MODE | CULLMODE_NONE);
1001
1002 i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1003 ENABLE_LOGIC_OP_FUNC |
1004 LOGIC_OP_FUNC(LOGICOP_COPY) |
1005 ENABLE_STENCIL_TEST_MASK |
1006 STENCIL_TEST_MASK(0xff) |
1007 ENABLE_STENCIL_WRITE_MASK |
1008 STENCIL_WRITE_MASK(0xff));
1009
1010 i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
1011 ENABLE_STENCIL_PARMS |
1012 STENCIL_FAIL_OP(STENCILOP_KEEP)
1013 |
1014 STENCIL_PASS_DEPTH_FAIL_OP
1015 (STENCILOP_KEEP) |
1016 STENCIL_PASS_DEPTH_PASS_OP
1017 (STENCILOP_KEEP) |
1018 ENABLE_STENCIL_TEST_FUNC |
1019 STENCIL_TEST_FUNC
1020 (COMPAREFUNC_ALWAYS) |
1021 ENABLE_STENCIL_REF_VALUE |
1022 STENCIL_REF_VALUE(0));
1023
1024 i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1025 ENABLE_FIXED_POINT_WIDTH |
1026 FIXED_POINT_WIDTH(1));
1027
1028 i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1029 DISABLE_INDPT_ALPHA_BLEND |
1030 ENABLE_ALPHA_BLENDFUNC |
1031 ABLENDFUNC_ADD);
1032
1033 i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1034 FOG_COLOR_RED(0) |
1035 FOG_COLOR_GREEN(0) |
1036 FOG_COLOR_BLUE(0));
1037
1038 i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1039 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1040
1041 i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1042 i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1043 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1044 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1045 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1046
1047 i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD |
1048 ENABLE_POINT_RASTER_RULE |
1049 OGL_POINT_RASTER_RULE |
1050 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1051 ENABLE_TRI_FAN_PROVOKE_VRTX |
1052 ENABLE_TRI_STRIP_PROVOKE_VRTX |
1053 LINE_STRIP_PROVOKE_VRTX(1) |
1054 TRI_FAN_PROVOKE_VRTX(2) |
1055 TRI_STRIP_PROVOKE_VRTX(2));
1056
1057
1058 i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1059
1060 i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1061 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1062 DISABLE_SCISSOR_RECT);
1063 i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1064 i830->state.Buffer[I830_DESTREG_SR1] = 0;
1065 i830->state.Buffer[I830_DESTREG_SR2] = 0;
1066 }
1067
1068 void
1069 i830_update_provoking_vertex(struct gl_context * ctx)
1070 {
1071 struct i830_context *i830 = i830_context(ctx);
1072
1073 I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
1074 i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1075 TRI_FAN_PROVOKE_VRTX_MASK |
1076 TRI_STRIP_PROVOKE_VRTX_MASK);
1077
1078 /* _NEW_LIGHT */
1079 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1080 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1081 TRI_FAN_PROVOKE_VRTX(2) |
1082 TRI_STRIP_PROVOKE_VRTX(2));
1083 } else {
1084 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1085 TRI_FAN_PROVOKE_VRTX(1) |
1086 TRI_STRIP_PROVOKE_VRTX(0));
1087 }
1088 }
1089
1090 void
1091 i830InitStateFuncs(struct dd_function_table *functions)
1092 {
1093 functions->AlphaFunc = i830AlphaFunc;
1094 functions->BlendColor = i830BlendColor;
1095 functions->BlendEquationSeparate = i830BlendEquationSeparate;
1096 functions->BlendFuncSeparate = i830BlendFuncSeparate;
1097 functions->ColorMask = i830ColorMask;
1098 functions->CullFace = i830CullFaceFrontFace;
1099 functions->DepthFunc = i830DepthFunc;
1100 functions->DepthMask = i830DepthMask;
1101 functions->Enable = i830Enable;
1102 functions->Fogfv = i830Fogfv;
1103 functions->FrontFace = i830CullFaceFrontFace;
1104 functions->LightModelfv = i830LightModelfv;
1105 functions->LineWidth = i830LineWidth;
1106 functions->LogicOpcode = i830LogicOp;
1107 functions->PointSize = i830PointSize;
1108 functions->PolygonStipple = i830PolygonStipple;
1109 functions->Scissor = i830Scissor;
1110 functions->ShadeModel = i830ShadeModel;
1111 functions->StencilFuncSeparate = i830StencilFuncSeparate;
1112 functions->StencilMaskSeparate = i830StencilMaskSeparate;
1113 functions->StencilOpSeparate = i830StencilOpSeparate;
1114 functions->DepthRange = i830DepthRange;
1115 functions->Viewport = i830Viewport;
1116 }
1117
1118 void
1119 i830InitState(struct i830_context *i830)
1120 {
1121 struct gl_context *ctx = &i830->intel.ctx;
1122
1123 i830_init_packets(i830);
1124
1125 _mesa_init_driver_state(ctx);
1126
1127 i830->state.emitted = 0;
1128 i830->state.active = (I830_UPLOAD_INVARIENT |
1129 I830_UPLOAD_RASTER_RULES |
1130 I830_UPLOAD_TEXBLEND(0) |
1131 I830_UPLOAD_STIPPLE |
1132 I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1133 }