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[mesa.git] / src / mesa / drivers / dri / i915 / i830_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/dd.h"
34
35 #include "texmem.h"
36
37 #include "drivers/common/driverfuncs.h"
38
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_fbo.h"
42 #include "intel_buffers.h"
43
44 #include "i830_context.h"
45 #include "i830_reg.h"
46
47 #define FILE_DEBUG_FLAG DEBUG_STATE
48
49 static void
50 i830StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
51 GLuint mask)
52 {
53 struct i830_context *i830 = i830_context(ctx);
54 int test = intel_translate_compare_func(func);
55
56 mask = mask & 0xff;
57
58 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
59 _mesa_lookup_enum_by_nr(func), ref, mask);
60
61
62 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
63 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
64 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
65 STENCIL_TEST_MASK(mask));
66 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
67 ENABLE_STENCIL_TEST_FUNC_MASK);
68 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
69 ENABLE_STENCIL_TEST_FUNC |
70 STENCIL_REF_VALUE(ref) |
71 STENCIL_TEST_FUNC(test));
72 }
73
74 static void
75 i830StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
76 {
77 struct i830_context *i830 = i830_context(ctx);
78
79 DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
80
81 mask = mask & 0xff;
82
83 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
84 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
85 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
86 STENCIL_WRITE_MASK(mask));
87 }
88
89 static void
90 i830StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
91 GLenum zpass)
92 {
93 struct i830_context *i830 = i830_context(ctx);
94 int fop, dfop, dpop;
95
96 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
97 _mesa_lookup_enum_by_nr(fail),
98 _mesa_lookup_enum_by_nr(zfail),
99 _mesa_lookup_enum_by_nr(zpass));
100
101 fop = 0;
102 dfop = 0;
103 dpop = 0;
104
105 switch (fail) {
106 case GL_KEEP:
107 fop = STENCILOP_KEEP;
108 break;
109 case GL_ZERO:
110 fop = STENCILOP_ZERO;
111 break;
112 case GL_REPLACE:
113 fop = STENCILOP_REPLACE;
114 break;
115 case GL_INCR:
116 fop = STENCILOP_INCRSAT;
117 break;
118 case GL_DECR:
119 fop = STENCILOP_DECRSAT;
120 break;
121 case GL_INCR_WRAP:
122 fop = STENCILOP_INCR;
123 break;
124 case GL_DECR_WRAP:
125 fop = STENCILOP_DECR;
126 break;
127 case GL_INVERT:
128 fop = STENCILOP_INVERT;
129 break;
130 default:
131 break;
132 }
133 switch (zfail) {
134 case GL_KEEP:
135 dfop = STENCILOP_KEEP;
136 break;
137 case GL_ZERO:
138 dfop = STENCILOP_ZERO;
139 break;
140 case GL_REPLACE:
141 dfop = STENCILOP_REPLACE;
142 break;
143 case GL_INCR:
144 dfop = STENCILOP_INCRSAT;
145 break;
146 case GL_DECR:
147 dfop = STENCILOP_DECRSAT;
148 break;
149 case GL_INCR_WRAP:
150 dfop = STENCILOP_INCR;
151 break;
152 case GL_DECR_WRAP:
153 dfop = STENCILOP_DECR;
154 break;
155 case GL_INVERT:
156 dfop = STENCILOP_INVERT;
157 break;
158 default:
159 break;
160 }
161 switch (zpass) {
162 case GL_KEEP:
163 dpop = STENCILOP_KEEP;
164 break;
165 case GL_ZERO:
166 dpop = STENCILOP_ZERO;
167 break;
168 case GL_REPLACE:
169 dpop = STENCILOP_REPLACE;
170 break;
171 case GL_INCR:
172 dpop = STENCILOP_INCRSAT;
173 break;
174 case GL_DECR:
175 dpop = STENCILOP_DECRSAT;
176 break;
177 case GL_INCR_WRAP:
178 dpop = STENCILOP_INCR;
179 break;
180 case GL_DECR_WRAP:
181 dpop = STENCILOP_DECR;
182 break;
183 case GL_INVERT:
184 dpop = STENCILOP_INVERT;
185 break;
186 default:
187 break;
188 }
189
190
191 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
192 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
193 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
194 STENCIL_FAIL_OP(fop) |
195 STENCIL_PASS_DEPTH_FAIL_OP
196 (dfop) |
197 STENCIL_PASS_DEPTH_PASS_OP
198 (dpop));
199 }
200
201 static void
202 i830AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
203 {
204 struct i830_context *i830 = i830_context(ctx);
205 int test = intel_translate_compare_func(func);
206 GLubyte refByte;
207 GLuint refInt;
208
209 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
210 refInt = (GLuint) refByte;
211
212 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
213 i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
214 i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
215 ENABLE_ALPHA_REF_VALUE |
216 ALPHA_TEST_FUNC(test) |
217 ALPHA_REF_VALUE(refInt));
218 }
219
220 /**
221 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
222 * Blend, and Blending. It needs to be called from numerous places where we
223 * could change the LogicOp or Independant Alpha Blend without subsequent
224 * calls to glEnable.
225 *
226 * \todo
227 * This function is substantially different from the old i830-specific driver.
228 * I'm not sure which is correct.
229 */
230 static void
231 i830EvalLogicOpBlendState(struct gl_context * ctx)
232 {
233 struct i830_context *i830 = i830_context(ctx);
234
235 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
236
237 if (RGBA_LOGICOP_ENABLED(ctx)) {
238 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
239 ENABLE_LOGIC_OP_MASK);
240 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
241 ENABLE_LOGIC_OP);
242 }
243 else if (ctx->Color.BlendEnabled) {
244 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
245 ENABLE_LOGIC_OP_MASK);
246 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
247 DISABLE_LOGIC_OP);
248 }
249 else {
250 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
251 ENABLE_LOGIC_OP_MASK);
252 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
253 DISABLE_LOGIC_OP);
254 }
255 }
256
257 static void
258 i830BlendColor(struct gl_context * ctx, const GLfloat color[4])
259 {
260 struct i830_context *i830 = i830_context(ctx);
261 GLubyte r, g, b, a;
262
263 DBG("%s\n", __FUNCTION__);
264
265 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
266 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
267 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
268 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
269
270 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
271 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
272 (a << 24) | (r << 16) | (g << 8) | b;
273 }
274
275 /**
276 * Sets both the blend equation (called "function" in i830 docs) and the
277 * blend function (called "factor" in i830 docs). This is done in a single
278 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
279 * change the interpretation of the blend function.
280 */
281 static void
282 i830_set_blend_state(struct gl_context * ctx)
283 {
284 struct i830_context *i830 = i830_context(ctx);
285 int funcA;
286 int funcRGB;
287 int eqnA;
288 int eqnRGB;
289 int iab;
290 int s1;
291
292
293 funcRGB =
294 SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcRGB))
295 | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstRGB));
296
297 switch (ctx->Color.BlendEquationRGB) {
298 case GL_FUNC_ADD:
299 eqnRGB = BLENDFUNC_ADD;
300 break;
301 case GL_MIN:
302 eqnRGB = BLENDFUNC_MIN;
303 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
304 break;
305 case GL_MAX:
306 eqnRGB = BLENDFUNC_MAX;
307 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
308 break;
309 case GL_FUNC_SUBTRACT:
310 eqnRGB = BLENDFUNC_SUB;
311 break;
312 case GL_FUNC_REVERSE_SUBTRACT:
313 eqnRGB = BLENDFUNC_RVRSE_SUB;
314 break;
315 default:
316 fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
317 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
318 return;
319 }
320
321
322 funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcA))
323 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstA));
324
325 switch (ctx->Color.BlendEquationA) {
326 case GL_FUNC_ADD:
327 eqnA = BLENDFUNC_ADD;
328 break;
329 case GL_MIN:
330 eqnA = BLENDFUNC_MIN;
331 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
332 break;
333 case GL_MAX:
334 eqnA = BLENDFUNC_MAX;
335 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
336 break;
337 case GL_FUNC_SUBTRACT:
338 eqnA = BLENDFUNC_SUB;
339 break;
340 case GL_FUNC_REVERSE_SUBTRACT:
341 eqnA = BLENDFUNC_RVRSE_SUB;
342 break;
343 default:
344 fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
345 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
346 return;
347 }
348
349 iab = eqnA | funcA
350 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
351 | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
352 | ENABLE_ALPHA_BLENDFUNC;
353 s1 = eqnRGB | funcRGB
354 | _3DSTATE_MODES_1_CMD
355 | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
356 | ENABLE_COLR_BLND_FUNC;
357
358 if ((eqnA | funcA) != (eqnRGB | funcRGB))
359 iab |= ENABLE_INDPT_ALPHA_BLEND;
360 else
361 iab |= DISABLE_INDPT_ALPHA_BLEND;
362
363 if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
364 s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
365 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
366 i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
367 i830->state.Ctx[I830_CTXREG_STATE1] = s1;
368 }
369
370 /* This will catch a logicop blend equation. It will also ensure
371 * independant alpha blend is really in the correct state (either enabled
372 * or disabled) if blending is already enabled.
373 */
374
375 i830EvalLogicOpBlendState(ctx);
376
377 if (0) {
378 fprintf(stderr,
379 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
380 __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
381 i830->state.Ctx[I830_CTXREG_IALPHAB],
382 (ctx->Color.BlendEnabled) ? "en" : "dis");
383 }
384 }
385
386
387 static void
388 i830BlendEquationSeparate(struct gl_context * ctx, GLenum modeRGB, GLenum modeA)
389 {
390 DBG("%s -> %s, %s\n", __FUNCTION__,
391 _mesa_lookup_enum_by_nr(modeRGB),
392 _mesa_lookup_enum_by_nr(modeA));
393
394 (void) modeRGB;
395 (void) modeA;
396 i830_set_blend_state(ctx);
397 }
398
399
400 static void
401 i830BlendFuncSeparate(struct gl_context * ctx, GLenum sfactorRGB,
402 GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
403 {
404 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
405 _mesa_lookup_enum_by_nr(sfactorRGB),
406 _mesa_lookup_enum_by_nr(dfactorRGB),
407 _mesa_lookup_enum_by_nr(sfactorA),
408 _mesa_lookup_enum_by_nr(dfactorA));
409
410 (void) sfactorRGB;
411 (void) dfactorRGB;
412 (void) sfactorA;
413 (void) dfactorA;
414 i830_set_blend_state(ctx);
415 }
416
417
418
419 static void
420 i830DepthFunc(struct gl_context * ctx, GLenum func)
421 {
422 struct i830_context *i830 = i830_context(ctx);
423 int test = intel_translate_compare_func(func);
424
425 DBG("%s\n", __FUNCTION__);
426
427 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
428 i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
429 i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
430 DEPTH_TEST_FUNC(test));
431 }
432
433 static void
434 i830DepthMask(struct gl_context * ctx, GLboolean flag)
435 {
436 struct i830_context *i830 = i830_context(ctx);
437
438 DBG("%s flag (%d)\n", __FUNCTION__, flag);
439
440 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
441
442 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
443
444 if (flag && ctx->Depth.Test)
445 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
446 else
447 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
448 }
449
450 /** Called from ctx->Driver.Viewport() */
451 static void
452 i830Viewport(struct gl_context * ctx,
453 GLint x, GLint y, GLsizei width, GLsizei height)
454 {
455 intelCalcViewport(ctx);
456 }
457
458
459 /** Called from ctx->Driver.DepthRange() */
460 static void
461 i830DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
462 {
463 intelCalcViewport(ctx);
464 }
465
466 /* =============================================================
467 * Polygon stipple
468 *
469 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
470 * Fortunately stipple is usually a repeating pattern.
471 */
472 static void
473 i830PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
474 {
475 struct i830_context *i830 = i830_context(ctx);
476 const GLubyte *m = mask;
477 GLubyte p[4];
478 int i, j, k;
479 int active = (ctx->Polygon.StippleFlag &&
480 i830->intel.reduced_primitive == GL_TRIANGLES);
481 GLuint newMask;
482
483 if (active) {
484 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
485 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
486 }
487
488 p[0] = mask[12] & 0xf;
489 p[0] |= p[0] << 4;
490 p[1] = mask[8] & 0xf;
491 p[1] |= p[1] << 4;
492 p[2] = mask[4] & 0xf;
493 p[2] |= p[2] << 4;
494 p[3] = mask[0] & 0xf;
495 p[3] |= p[3] << 4;
496
497 for (k = 0; k < 8; k++)
498 for (j = 3; j >= 0; j--)
499 for (i = 0; i < 4; i++, m++)
500 if (*m != p[j]) {
501 i830->intel.hw_stipple = 0;
502 return;
503 }
504
505 newMask = (((p[0] & 0xf) << 0) |
506 ((p[1] & 0xf) << 4) |
507 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
508
509
510 if (newMask == 0xffff || newMask == 0x0) {
511 /* this is needed to make conform pass */
512 i830->intel.hw_stipple = 0;
513 return;
514 }
515
516 i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
517 i830->state.Stipple[I830_STPREG_ST1] |= newMask;
518 i830->intel.hw_stipple = 1;
519
520 if (active)
521 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
522 }
523
524
525 /* =============================================================
526 * Hardware clipping
527 */
528 static void
529 i830Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
530 {
531 struct i830_context *i830 = i830_context(ctx);
532 int x1, y1, x2, y2;
533
534 if (!ctx->DrawBuffer)
535 return;
536
537 DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
538
539 if (ctx->DrawBuffer->Name == 0) {
540 x1 = x;
541 y1 = ctx->DrawBuffer->Height - (y + h);
542 x2 = x + w - 1;
543 y2 = y1 + h - 1;
544 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
545 }
546 else {
547 /* FBO - not inverted
548 */
549 x1 = x;
550 y1 = y;
551 x2 = x + w - 1;
552 y2 = y + h - 1;
553 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
554 }
555
556 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
557 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
558 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
559 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
560
561 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
562
563 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
564 i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
565 i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
566 }
567
568 static void
569 i830LogicOp(struct gl_context * ctx, GLenum opcode)
570 {
571 struct i830_context *i830 = i830_context(ctx);
572 int tmp = intel_translate_logic_op(opcode);
573
574 DBG("%s\n", __FUNCTION__);
575
576 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
577 i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
578 i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
579 }
580
581
582
583 static void
584 i830CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
585 {
586 struct i830_context *i830 = i830_context(ctx);
587 GLuint mode;
588
589 DBG("%s\n", __FUNCTION__);
590
591 if (!ctx->Polygon.CullFlag) {
592 mode = CULLMODE_NONE;
593 }
594 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
595 mode = CULLMODE_CW;
596
597 if (ctx->Polygon.CullFaceMode == GL_FRONT)
598 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
599 if (ctx->Polygon.FrontFace != GL_CCW)
600 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
601 }
602 else {
603 mode = CULLMODE_BOTH;
604 }
605
606 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
607 i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
608 i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
609 }
610
611 static void
612 i830LineWidth(struct gl_context * ctx, GLfloat widthf)
613 {
614 struct i830_context *i830 = i830_context(ctx);
615 int width;
616 int state5;
617
618 DBG("%s\n", __FUNCTION__);
619
620 width = (int) (widthf * 2);
621 width = CLAMP(width, 1, 15);
622
623 state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
624 state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
625
626 if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
627 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
628 i830->state.Ctx[I830_CTXREG_STATE5] = state5;
629 }
630 }
631
632 static void
633 i830PointSize(struct gl_context * ctx, GLfloat size)
634 {
635 struct i830_context *i830 = i830_context(ctx);
636 GLint point_size = (int) size;
637
638 DBG("%s\n", __FUNCTION__);
639
640 point_size = CLAMP(point_size, 1, 256);
641 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
642 i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
643 i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
644 FIXED_POINT_WIDTH(point_size));
645 }
646
647
648 /* =============================================================
649 * Color masks
650 */
651
652 static void
653 i830ColorMask(struct gl_context * ctx,
654 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
655 {
656 struct i830_context *i830 = i830_context(ctx);
657 GLuint tmp = 0;
658
659 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
660
661 tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
662 ENABLE_COLOR_MASK |
663 ENABLE_COLOR_WRITE |
664 ((!r) << WRITEMASK_RED_SHIFT) |
665 ((!g) << WRITEMASK_GREEN_SHIFT) |
666 ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
667
668 if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
669 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
670 i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
671 }
672 }
673
674 static void
675 update_specular(struct gl_context * ctx)
676 {
677 struct i830_context *i830 = i830_context(ctx);
678
679 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
680 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
681
682 if (NEED_SECONDARY_COLOR(ctx))
683 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
684 else
685 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
686 }
687
688 static void
689 i830LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
690 {
691 DBG("%s\n", __FUNCTION__);
692
693 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
694 update_specular(ctx);
695 }
696 }
697
698 /* In Mesa 3.5 we can reliably do native flatshading.
699 */
700 static void
701 i830ShadeModel(struct gl_context * ctx, GLenum mode)
702 {
703 struct i830_context *i830 = i830_context(ctx);
704 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
705
706
707 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
708
709 i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
710
711 if (mode == GL_FLAT) {
712 i830->state.Ctx[I830_CTXREG_STATE3] |=
713 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
714 | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
715 COLOR_SHADE_MODE(SHADE_MODE_FLAT));
716 }
717 else {
718 i830->state.Ctx[I830_CTXREG_STATE3] |=
719 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
720 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
721 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
722 COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
723 }
724 }
725
726 /* =============================================================
727 * Fog
728 */
729 static void
730 i830Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
731 {
732 struct i830_context *i830 = i830_context(ctx);
733
734 DBG("%s\n", __FUNCTION__);
735
736 if (pname == GL_FOG_COLOR) {
737 GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
738 ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
739 ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
740
741 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
742 i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
743 (_3DSTATE_FOG_COLOR_CMD | color);
744 }
745 }
746
747 /* =============================================================
748 */
749
750 static void
751 i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
752 {
753 struct i830_context *i830 = i830_context(ctx);
754
755 switch (cap) {
756 case GL_LIGHTING:
757 case GL_COLOR_SUM:
758 update_specular(ctx);
759 break;
760
761 case GL_ALPHA_TEST:
762 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
763 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
764 if (state)
765 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
766 else
767 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
768
769 break;
770
771 case GL_BLEND:
772 i830EvalLogicOpBlendState(ctx);
773 break;
774
775 case GL_COLOR_LOGIC_OP:
776 i830EvalLogicOpBlendState(ctx);
777
778 /* Logicop doesn't seem to work at 16bpp:
779 */
780 if (i830->intel.ctx.Visual.rgbBits == 16)
781 FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
782 break;
783
784 case GL_DITHER:
785 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
786 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
787
788 if (state)
789 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
790 else
791 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
792 break;
793
794 case GL_DEPTH_TEST:
795 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
796 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
797
798 if (state)
799 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
800 else
801 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
802
803 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
804 */
805 i830DepthMask(ctx, ctx->Depth.Mask);
806 break;
807
808 case GL_SCISSOR_TEST:
809 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
810
811 if (state)
812 i830->state.Buffer[I830_DESTREG_SENABLE] =
813 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
814 else
815 i830->state.Buffer[I830_DESTREG_SENABLE] =
816 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
817
818 break;
819
820 case GL_LINE_SMOOTH:
821 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
822
823 i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
824 if (state)
825 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
826 else
827 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
828 break;
829
830 case GL_FOG:
831 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
832 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
833 if (state)
834 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
835 else
836 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
837 break;
838
839 case GL_CULL_FACE:
840 i830CullFaceFrontFace(ctx, 0);
841 break;
842
843 case GL_TEXTURE_2D:
844 break;
845
846 case GL_STENCIL_TEST:
847 {
848 GLboolean hw_stencil = GL_FALSE;
849 if (ctx->DrawBuffer) {
850 struct intel_renderbuffer *irbStencil
851 = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
852 hw_stencil = (irbStencil && irbStencil->region);
853 }
854 if (hw_stencil) {
855 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
856
857 if (state) {
858 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
859 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
860 }
861 else {
862 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
863 i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
864 ~ENABLE_STENCIL_WRITE;
865 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
866 i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
867 DISABLE_STENCIL_WRITE;
868 }
869 }
870 else {
871 FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
872 }
873 }
874 break;
875
876 case GL_POLYGON_STIPPLE:
877 /* The stipple command worked on my 855GM box, but not my 845G.
878 * I'll do more testing later to find out exactly which hardware
879 * supports it. Disabled for now.
880 */
881 if (i830->intel.hw_stipple &&
882 i830->intel.reduced_primitive == GL_TRIANGLES) {
883 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
884 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
885 if (state)
886 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
887 }
888 break;
889
890 default:
891 ;
892 }
893 }
894
895
896 static void
897 i830_init_packets(struct i830_context *i830)
898 {
899 /* Zero all state */
900 memset(&i830->state, 0, sizeof(i830->state));
901
902 /* Set default blend state */
903 i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
904 TEXPIPE_COLOR |
905 ENABLE_TEXOUTPUT_WRT_SEL |
906 TEXOP_OUTPUT_CURRENT |
907 DISABLE_TEX_CNTRL_STAGE |
908 TEXOP_SCALE_1X |
909 TEXOP_MODIFY_PARMS |
910 TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
911 i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
912 TEXPIPE_ALPHA |
913 ENABLE_TEXOUTPUT_WRT_SEL |
914 TEXOP_OUTPUT_CURRENT |
915 TEXOP_SCALE_1X |
916 TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
917 i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
918 TEXPIPE_COLOR |
919 TEXBLEND_ARG1 |
920 TEXBLENDARG_MODIFY_PARMS |
921 TEXBLENDARG_DIFFUSE);
922 i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
923 TEXPIPE_ALPHA |
924 TEXBLEND_ARG1 |
925 TEXBLENDARG_MODIFY_PARMS |
926 TEXBLENDARG_DIFFUSE);
927
928 i830->state.TexBlendWordsUsed[0] = 4;
929
930
931 i830->state.Ctx[I830_CTXREG_VF] = 0;
932 i830->state.Ctx[I830_CTXREG_VF2] = 0;
933
934 i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
935 AA_LINE_ECAAR_WIDTH_ENABLE |
936 AA_LINE_ECAAR_WIDTH_1_0 |
937 AA_LINE_REGION_WIDTH_ENABLE |
938 AA_LINE_REGION_WIDTH_1_0 |
939 AA_LINE_DISABLE);
940
941 i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
942 DISABLE_LOGIC_OP |
943 DISABLE_STENCIL_TEST |
944 DISABLE_DEPTH_BIAS |
945 DISABLE_SPEC_ADD |
946 DISABLE_FOG |
947 DISABLE_ALPHA_TEST |
948 DISABLE_COLOR_BLEND |
949 DISABLE_DEPTH_TEST);
950
951 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
952 if (i830->intel.hw_stencil) {
953 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
954 ENABLE_STENCIL_WRITE |
955 ENABLE_TEX_CACHE |
956 ENABLE_DITHER |
957 ENABLE_COLOR_MASK |
958 /* set no color comps disabled */
959 ENABLE_COLOR_WRITE |
960 ENABLE_DEPTH_WRITE);
961 }
962 else
963 #endif
964 {
965 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
966 DISABLE_STENCIL_WRITE |
967 ENABLE_TEX_CACHE |
968 ENABLE_DITHER |
969 ENABLE_COLOR_MASK |
970 /* set no color comps disabled */
971 ENABLE_COLOR_WRITE |
972 ENABLE_DEPTH_WRITE);
973 }
974
975 i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
976 ENABLE_COLR_BLND_FUNC |
977 BLENDFUNC_ADD |
978 ENABLE_SRC_BLND_FACTOR |
979 SRC_BLND_FACT(BLENDFACT_ONE) |
980 ENABLE_DST_BLND_FACTOR |
981 DST_BLND_FACT(BLENDFACT_ZERO));
982
983 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
984 ENABLE_GLOBAL_DEPTH_BIAS |
985 GLOBAL_DEPTH_BIAS(0) |
986 ENABLE_ALPHA_TEST_FUNC |
987 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
988 | ALPHA_REF_VALUE(0));
989
990 i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
991 ENABLE_DEPTH_TEST_FUNC |
992 DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
993 ENABLE_ALPHA_SHADE_MODE |
994 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
995 | ENABLE_FOG_SHADE_MODE |
996 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
997 ENABLE_SPEC_SHADE_MODE |
998 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
999 ENABLE_COLOR_SHADE_MODE |
1000 COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
1001 | ENABLE_CULL_MODE | CULLMODE_NONE);
1002
1003 i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1004 ENABLE_LOGIC_OP_FUNC |
1005 LOGIC_OP_FUNC(LOGICOP_COPY) |
1006 ENABLE_STENCIL_TEST_MASK |
1007 STENCIL_TEST_MASK(0xff) |
1008 ENABLE_STENCIL_WRITE_MASK |
1009 STENCIL_WRITE_MASK(0xff));
1010
1011 i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
1012 ENABLE_STENCIL_PARMS |
1013 STENCIL_FAIL_OP(STENCILOP_KEEP)
1014 |
1015 STENCIL_PASS_DEPTH_FAIL_OP
1016 (STENCILOP_KEEP) |
1017 STENCIL_PASS_DEPTH_PASS_OP
1018 (STENCILOP_KEEP) |
1019 ENABLE_STENCIL_TEST_FUNC |
1020 STENCIL_TEST_FUNC
1021 (COMPAREFUNC_ALWAYS) |
1022 ENABLE_STENCIL_REF_VALUE |
1023 STENCIL_REF_VALUE(0));
1024
1025 i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1026 ENABLE_FIXED_POINT_WIDTH |
1027 FIXED_POINT_WIDTH(1));
1028
1029 i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1030 DISABLE_INDPT_ALPHA_BLEND |
1031 ENABLE_ALPHA_BLENDFUNC |
1032 ABLENDFUNC_ADD);
1033
1034 i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1035 FOG_COLOR_RED(0) |
1036 FOG_COLOR_GREEN(0) |
1037 FOG_COLOR_BLUE(0));
1038
1039 i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1040 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1041
1042 i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1043 i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1044 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1045 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1046 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1047
1048 i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD |
1049 ENABLE_POINT_RASTER_RULE |
1050 OGL_POINT_RASTER_RULE |
1051 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1052 ENABLE_TRI_FAN_PROVOKE_VRTX |
1053 ENABLE_TRI_STRIP_PROVOKE_VRTX |
1054 LINE_STRIP_PROVOKE_VRTX(1) |
1055 TRI_FAN_PROVOKE_VRTX(2) |
1056 TRI_STRIP_PROVOKE_VRTX(2));
1057
1058
1059 i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1060
1061 i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1062 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1063 DISABLE_SCISSOR_RECT);
1064 i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1065 i830->state.Buffer[I830_DESTREG_SR1] = 0;
1066 i830->state.Buffer[I830_DESTREG_SR2] = 0;
1067 }
1068
1069 void
1070 i830_update_provoking_vertex(struct gl_context * ctx)
1071 {
1072 struct i830_context *i830 = i830_context(ctx);
1073
1074 I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
1075 i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1076 TRI_FAN_PROVOKE_VRTX_MASK |
1077 TRI_STRIP_PROVOKE_VRTX_MASK);
1078
1079 /* _NEW_LIGHT */
1080 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1081 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1082 TRI_FAN_PROVOKE_VRTX(2) |
1083 TRI_STRIP_PROVOKE_VRTX(2));
1084 } else {
1085 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1086 TRI_FAN_PROVOKE_VRTX(1) |
1087 TRI_STRIP_PROVOKE_VRTX(0));
1088 }
1089 }
1090
1091 void
1092 i830InitStateFuncs(struct dd_function_table *functions)
1093 {
1094 functions->AlphaFunc = i830AlphaFunc;
1095 functions->BlendColor = i830BlendColor;
1096 functions->BlendEquationSeparate = i830BlendEquationSeparate;
1097 functions->BlendFuncSeparate = i830BlendFuncSeparate;
1098 functions->ColorMask = i830ColorMask;
1099 functions->CullFace = i830CullFaceFrontFace;
1100 functions->DepthFunc = i830DepthFunc;
1101 functions->DepthMask = i830DepthMask;
1102 functions->Enable = i830Enable;
1103 functions->Fogfv = i830Fogfv;
1104 functions->FrontFace = i830CullFaceFrontFace;
1105 functions->LightModelfv = i830LightModelfv;
1106 functions->LineWidth = i830LineWidth;
1107 functions->LogicOpcode = i830LogicOp;
1108 functions->PointSize = i830PointSize;
1109 functions->PolygonStipple = i830PolygonStipple;
1110 functions->Scissor = i830Scissor;
1111 functions->ShadeModel = i830ShadeModel;
1112 functions->StencilFuncSeparate = i830StencilFuncSeparate;
1113 functions->StencilMaskSeparate = i830StencilMaskSeparate;
1114 functions->StencilOpSeparate = i830StencilOpSeparate;
1115 functions->DepthRange = i830DepthRange;
1116 functions->Viewport = i830Viewport;
1117 }
1118
1119 void
1120 i830InitState(struct i830_context *i830)
1121 {
1122 struct gl_context *ctx = &i830->intel.ctx;
1123
1124 i830_init_packets(i830);
1125
1126 _mesa_init_driver_state(ctx);
1127
1128 i830->state.emitted = 0;
1129 i830->state.active = (I830_UPLOAD_INVARIENT |
1130 I830_UPLOAD_RASTER_RULES |
1131 I830_UPLOAD_TEXBLEND(0) |
1132 I830_UPLOAD_STIPPLE |
1133 I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1134 }