1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
34 #include "main/state.h"
38 #include "drivers/common/driverfuncs.h"
40 #include "intel_screen.h"
41 #include "intel_batchbuffer.h"
42 #include "intel_fbo.h"
43 #include "intel_buffers.h"
45 #include "i830_context.h"
48 #define FILE_DEBUG_FLAG DEBUG_STATE
51 i830StencilFuncSeparate(struct gl_context
* ctx
, GLenum face
, GLenum func
, GLint ref
,
54 struct i830_context
*i830
= i830_context(ctx
);
55 int test
= intel_translate_compare_func(func
);
59 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__
,
60 _mesa_lookup_enum_by_nr(func
), ref
, mask
);
63 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
64 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_TEST_MASK
;
65 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_TEST_MASK
|
66 STENCIL_TEST_MASK(mask
));
67 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_REF_VALUE_MASK
|
68 ENABLE_STENCIL_TEST_FUNC_MASK
);
69 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_REF_VALUE
|
70 ENABLE_STENCIL_TEST_FUNC
|
71 STENCIL_REF_VALUE(ref
) |
72 STENCIL_TEST_FUNC(test
));
76 i830StencilMaskSeparate(struct gl_context
* ctx
, GLenum face
, GLuint mask
)
78 struct i830_context
*i830
= i830_context(ctx
);
80 DBG("%s : mask 0x%x\n", __FUNCTION__
, mask
);
84 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
85 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK
;
86 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_WRITE_MASK
|
87 STENCIL_WRITE_MASK(mask
));
91 i830StencilOpSeparate(struct gl_context
* ctx
, GLenum face
, GLenum fail
, GLenum zfail
,
94 struct i830_context
*i830
= i830_context(ctx
);
97 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__
,
98 _mesa_lookup_enum_by_nr(fail
),
99 _mesa_lookup_enum_by_nr(zfail
),
100 _mesa_lookup_enum_by_nr(zpass
));
108 fop
= STENCILOP_KEEP
;
111 fop
= STENCILOP_ZERO
;
114 fop
= STENCILOP_REPLACE
;
117 fop
= STENCILOP_INCRSAT
;
120 fop
= STENCILOP_DECRSAT
;
123 fop
= STENCILOP_INCR
;
126 fop
= STENCILOP_DECR
;
129 fop
= STENCILOP_INVERT
;
136 dfop
= STENCILOP_KEEP
;
139 dfop
= STENCILOP_ZERO
;
142 dfop
= STENCILOP_REPLACE
;
145 dfop
= STENCILOP_INCRSAT
;
148 dfop
= STENCILOP_DECRSAT
;
151 dfop
= STENCILOP_INCR
;
154 dfop
= STENCILOP_DECR
;
157 dfop
= STENCILOP_INVERT
;
164 dpop
= STENCILOP_KEEP
;
167 dpop
= STENCILOP_ZERO
;
170 dpop
= STENCILOP_REPLACE
;
173 dpop
= STENCILOP_INCRSAT
;
176 dpop
= STENCILOP_DECRSAT
;
179 dpop
= STENCILOP_INCR
;
182 dpop
= STENCILOP_DECR
;
185 dpop
= STENCILOP_INVERT
;
192 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
193 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_OPS_MASK
);
194 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_PARMS
|
195 STENCIL_FAIL_OP(fop
) |
196 STENCIL_PASS_DEPTH_FAIL_OP
198 STENCIL_PASS_DEPTH_PASS_OP
203 i830AlphaFunc(struct gl_context
* ctx
, GLenum func
, GLfloat ref
)
205 struct i830_context
*i830
= i830_context(ctx
);
206 int test
= intel_translate_compare_func(func
);
210 UNCLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
211 refInt
= (GLuint
) refByte
;
213 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
214 i830
->state
.Ctx
[I830_CTXREG_STATE2
] &= ~ALPHA_TEST_REF_MASK
;
215 i830
->state
.Ctx
[I830_CTXREG_STATE2
] |= (ENABLE_ALPHA_TEST_FUNC
|
216 ENABLE_ALPHA_REF_VALUE
|
217 ALPHA_TEST_FUNC(test
) |
218 ALPHA_REF_VALUE(refInt
));
222 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
223 * Blend, and Blending. It needs to be called from numerous places where we
224 * could change the LogicOp or Independant Alpha Blend without subsequent
228 * This function is substantially different from the old i830-specific driver.
229 * I'm not sure which is correct.
232 i830EvalLogicOpBlendState(struct gl_context
* ctx
)
234 struct i830_context
*i830
= i830_context(ctx
);
236 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
238 if (_mesa_rgba_logicop_enabled(ctx
)) {
239 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
240 ENABLE_LOGIC_OP_MASK
);
241 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
244 else if (ctx
->Color
.BlendEnabled
) {
245 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
246 ENABLE_LOGIC_OP_MASK
);
247 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (ENABLE_COLOR_BLEND
|
251 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
252 ENABLE_LOGIC_OP_MASK
);
253 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
259 i830BlendColor(struct gl_context
* ctx
, const GLfloat color
[4])
261 struct i830_context
*i830
= i830_context(ctx
);
264 DBG("%s\n", __FUNCTION__
);
266 UNCLAMPED_FLOAT_TO_UBYTE(r
, color
[RCOMP
]);
267 UNCLAMPED_FLOAT_TO_UBYTE(g
, color
[GCOMP
]);
268 UNCLAMPED_FLOAT_TO_UBYTE(b
, color
[BCOMP
]);
269 UNCLAMPED_FLOAT_TO_UBYTE(a
, color
[ACOMP
]);
271 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
272 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] =
273 (a
<< 24) | (r
<< 16) | (g
<< 8) | b
;
277 * Sets both the blend equation (called "function" in i830 docs) and the
278 * blend function (called "factor" in i830 docs). This is done in a single
279 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
280 * change the interpretation of the blend function.
283 i830_set_blend_state(struct gl_context
* ctx
)
285 struct i830_context
*i830
= i830_context(ctx
);
295 SRC_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.Blend
[0].SrcRGB
))
296 | DST_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.Blend
[0].DstRGB
));
298 switch (ctx
->Color
.Blend
[0].EquationRGB
) {
300 eqnRGB
= BLENDFUNC_ADD
;
303 eqnRGB
= BLENDFUNC_MIN
;
304 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
307 eqnRGB
= BLENDFUNC_MAX
;
308 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
310 case GL_FUNC_SUBTRACT
:
311 eqnRGB
= BLENDFUNC_SUB
;
313 case GL_FUNC_REVERSE_SUBTRACT
:
314 eqnRGB
= BLENDFUNC_RVRSE_SUB
;
317 fprintf(stderr
, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
318 __FUNCTION__
, __LINE__
, ctx
->Color
.Blend
[0].EquationRGB
);
323 funcA
= SRC_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.Blend
[0].SrcA
))
324 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.Blend
[0].DstA
));
326 switch (ctx
->Color
.Blend
[0].EquationA
) {
328 eqnA
= BLENDFUNC_ADD
;
331 eqnA
= BLENDFUNC_MIN
;
332 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
335 eqnA
= BLENDFUNC_MAX
;
336 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
338 case GL_FUNC_SUBTRACT
:
339 eqnA
= BLENDFUNC_SUB
;
341 case GL_FUNC_REVERSE_SUBTRACT
:
342 eqnA
= BLENDFUNC_RVRSE_SUB
;
345 fprintf(stderr
, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
346 __FUNCTION__
, __LINE__
, ctx
->Color
.Blend
[0].EquationA
);
351 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
352 | ENABLE_SRC_ABLEND_FACTOR
| ENABLE_DST_ABLEND_FACTOR
353 | ENABLE_ALPHA_BLENDFUNC
;
354 s1
= eqnRGB
| funcRGB
355 | _3DSTATE_MODES_1_CMD
356 | ENABLE_SRC_BLND_FACTOR
| ENABLE_DST_BLND_FACTOR
357 | ENABLE_COLR_BLND_FUNC
;
359 if ((eqnA
| funcA
) != (eqnRGB
| funcRGB
))
360 iab
|= ENABLE_INDPT_ALPHA_BLEND
;
362 iab
|= DISABLE_INDPT_ALPHA_BLEND
;
364 if (iab
!= i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] ||
365 s1
!= i830
->state
.Ctx
[I830_CTXREG_STATE1
]) {
366 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
367 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = iab
;
368 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = s1
;
371 /* This will catch a logicop blend equation. It will also ensure
372 * independant alpha blend is really in the correct state (either enabled
373 * or disabled) if blending is already enabled.
376 i830EvalLogicOpBlendState(ctx
);
380 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
381 __FUNCTION__
, __LINE__
, i830
->state
.Ctx
[I830_CTXREG_STATE1
],
382 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
],
383 (ctx
->Color
.BlendEnabled
) ? "en" : "dis");
389 i830BlendEquationSeparate(struct gl_context
* ctx
, GLenum modeRGB
, GLenum modeA
)
391 DBG("%s -> %s, %s\n", __FUNCTION__
,
392 _mesa_lookup_enum_by_nr(modeRGB
),
393 _mesa_lookup_enum_by_nr(modeA
));
397 i830_set_blend_state(ctx
);
402 i830BlendFuncSeparate(struct gl_context
* ctx
, GLenum sfactorRGB
,
403 GLenum dfactorRGB
, GLenum sfactorA
, GLenum dfactorA
)
405 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__
,
406 _mesa_lookup_enum_by_nr(sfactorRGB
),
407 _mesa_lookup_enum_by_nr(dfactorRGB
),
408 _mesa_lookup_enum_by_nr(sfactorA
),
409 _mesa_lookup_enum_by_nr(dfactorA
));
415 i830_set_blend_state(ctx
);
421 i830DepthFunc(struct gl_context
* ctx
, GLenum func
)
423 struct i830_context
*i830
= i830_context(ctx
);
424 int test
= intel_translate_compare_func(func
);
426 DBG("%s\n", __FUNCTION__
);
428 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
429 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~DEPTH_TEST_FUNC_MASK
;
430 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= (ENABLE_DEPTH_TEST_FUNC
|
431 DEPTH_TEST_FUNC(test
));
435 i830DepthMask(struct gl_context
* ctx
, GLboolean flag
)
437 struct i830_context
*i830
= i830_context(ctx
);
439 DBG("%s flag (%d)\n", __FUNCTION__
, flag
);
441 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
443 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DIS_DEPTH_WRITE_MASK
;
445 if (flag
&& ctx
->Depth
.Test
)
446 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DEPTH_WRITE
;
448 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DEPTH_WRITE
;
451 /** Called from ctx->Driver.Viewport() */
453 i830Viewport(struct gl_context
* ctx
,
454 GLint x
, GLint y
, GLsizei width
, GLsizei height
)
456 intelCalcViewport(ctx
);
460 /** Called from ctx->Driver.DepthRange() */
462 i830DepthRange(struct gl_context
* ctx
, GLclampd nearval
, GLclampd farval
)
464 intelCalcViewport(ctx
);
467 /* =============================================================
470 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
471 * Fortunately stipple is usually a repeating pattern.
474 i830PolygonStipple(struct gl_context
* ctx
, const GLubyte
* mask
)
476 struct i830_context
*i830
= i830_context(ctx
);
477 const GLubyte
*m
= mask
;
480 int active
= (ctx
->Polygon
.StippleFlag
&&
481 i830
->intel
.reduced_primitive
== GL_TRIANGLES
);
485 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
486 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
489 p
[0] = mask
[12] & 0xf;
491 p
[1] = mask
[8] & 0xf;
493 p
[2] = mask
[4] & 0xf;
495 p
[3] = mask
[0] & 0xf;
498 for (k
= 0; k
< 8; k
++)
499 for (j
= 3; j
>= 0; j
--)
500 for (i
= 0; i
< 4; i
++, m
++)
502 i830
->intel
.hw_stipple
= 0;
506 newMask
= (((p
[0] & 0xf) << 0) |
507 ((p
[1] & 0xf) << 4) |
508 ((p
[2] & 0xf) << 8) | ((p
[3] & 0xf) << 12));
511 if (newMask
== 0xffff || newMask
== 0x0) {
512 /* this is needed to make conform pass */
513 i830
->intel
.hw_stipple
= 0;
517 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~0xffff;
518 i830
->state
.Stipple
[I830_STPREG_ST1
] |= newMask
;
519 i830
->intel
.hw_stipple
= 1;
522 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
526 /* =============================================================
530 i830Scissor(struct gl_context
* ctx
, GLint x
, GLint y
, GLsizei w
, GLsizei h
)
532 struct i830_context
*i830
= i830_context(ctx
);
535 if (!ctx
->DrawBuffer
)
538 DBG("%s %d,%d %dx%d\n", __FUNCTION__
, x
, y
, w
, h
);
540 if (ctx
->DrawBuffer
->Name
== 0) {
542 y1
= ctx
->DrawBuffer
->Height
- (y
+ h
);
545 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
548 /* FBO - not inverted
554 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
557 x1
= CLAMP(x1
, 0, ctx
->DrawBuffer
->Width
- 1);
558 y1
= CLAMP(y1
, 0, ctx
->DrawBuffer
->Height
- 1);
559 x2
= CLAMP(x2
, 0, ctx
->DrawBuffer
->Width
- 1);
560 y2
= CLAMP(y2
, 0, ctx
->DrawBuffer
->Height
- 1);
562 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
564 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
565 i830
->state
.Buffer
[I830_DESTREG_SR1
] = (y1
<< 16) | (x1
& 0xffff);
566 i830
->state
.Buffer
[I830_DESTREG_SR2
] = (y2
<< 16) | (x2
& 0xffff);
570 i830LogicOp(struct gl_context
* ctx
, GLenum opcode
)
572 struct i830_context
*i830
= i830_context(ctx
);
573 int tmp
= intel_translate_logic_op(opcode
);
575 DBG("%s\n", __FUNCTION__
);
577 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
578 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~LOGICOP_MASK
;
579 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= LOGIC_OP_FUNC(tmp
);
585 i830CullFaceFrontFace(struct gl_context
* ctx
, GLenum unused
)
587 struct i830_context
*i830
= i830_context(ctx
);
590 DBG("%s\n", __FUNCTION__
);
592 if (!ctx
->Polygon
.CullFlag
) {
593 mode
= CULLMODE_NONE
;
595 else if (ctx
->Polygon
.CullFaceMode
!= GL_FRONT_AND_BACK
) {
598 if (ctx
->Polygon
.CullFaceMode
== GL_FRONT
)
599 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
600 if (ctx
->Polygon
.FrontFace
!= GL_CCW
)
601 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
604 mode
= CULLMODE_BOTH
;
607 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
608 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~CULLMODE_MASK
;
609 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= ENABLE_CULL_MODE
| mode
;
613 i830LineWidth(struct gl_context
* ctx
, GLfloat widthf
)
615 struct i830_context
*i830
= i830_context(ctx
);
619 DBG("%s\n", __FUNCTION__
);
621 width
= (int) (widthf
* 2);
622 width
= CLAMP(width
, 1, 15);
624 state5
= i830
->state
.Ctx
[I830_CTXREG_STATE5
] & ~FIXED_LINE_WIDTH_MASK
;
625 state5
|= (ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(width
));
627 if (state5
!= i830
->state
.Ctx
[I830_CTXREG_STATE5
]) {
628 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
629 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = state5
;
634 i830PointSize(struct gl_context
* ctx
, GLfloat size
)
636 struct i830_context
*i830
= i830_context(ctx
);
637 GLint point_size
= (int) size
;
639 DBG("%s\n", __FUNCTION__
);
641 point_size
= CLAMP(point_size
, 1, 256);
642 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
643 i830
->state
.Ctx
[I830_CTXREG_STATE5
] &= ~FIXED_POINT_WIDTH_MASK
;
644 i830
->state
.Ctx
[I830_CTXREG_STATE5
] |= (ENABLE_FIXED_POINT_WIDTH
|
645 FIXED_POINT_WIDTH(point_size
));
649 /* =============================================================
654 i830ColorMask(struct gl_context
* ctx
,
655 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
657 struct i830_context
*i830
= i830_context(ctx
);
660 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__
, r
, g
, b
, a
);
662 tmp
= ((i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] & ~WRITEMASK_MASK
) |
665 ((!r
) << WRITEMASK_RED_SHIFT
) |
666 ((!g
) << WRITEMASK_GREEN_SHIFT
) |
667 ((!b
) << WRITEMASK_BLUE_SHIFT
) | ((!a
) << WRITEMASK_ALPHA_SHIFT
));
669 if (tmp
!= i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
]) {
670 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
671 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = tmp
;
676 update_specular(struct gl_context
* ctx
)
678 struct i830_context
*i830
= i830_context(ctx
);
680 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
681 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_SPEC_ADD_MASK
;
683 if (_mesa_need_secondary_color(ctx
))
684 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_SPEC_ADD
;
686 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_SPEC_ADD
;
690 i830LightModelfv(struct gl_context
* ctx
, GLenum pname
, const GLfloat
* param
)
692 DBG("%s\n", __FUNCTION__
);
694 if (pname
== GL_LIGHT_MODEL_COLOR_CONTROL
) {
695 update_specular(ctx
);
699 /* In Mesa 3.5 we can reliably do native flatshading.
702 i830ShadeModel(struct gl_context
* ctx
, GLenum mode
)
704 struct i830_context
*i830
= i830_context(ctx
);
705 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
708 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
710 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~SHADE_MODE_MASK
;
712 if (mode
== GL_FLAT
) {
713 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
714 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT
) | FOG_SHADE_MODE(SHADE_MODE_FLAT
)
715 | SPEC_SHADE_MODE(SHADE_MODE_FLAT
) |
716 COLOR_SHADE_MODE(SHADE_MODE_FLAT
));
719 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
720 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
) |
721 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
722 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
723 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
));
727 /* =============================================================
731 i830Fogfv(struct gl_context
* ctx
, GLenum pname
, const GLfloat
* param
)
733 struct i830_context
*i830
= i830_context(ctx
);
735 DBG("%s\n", __FUNCTION__
);
737 if (pname
== GL_FOG_COLOR
) {
738 GLuint color
= (((GLubyte
) (ctx
->Fog
.Color
[0] * 255.0F
) << 16) |
739 ((GLubyte
) (ctx
->Fog
.Color
[1] * 255.0F
) << 8) |
740 ((GLubyte
) (ctx
->Fog
.Color
[2] * 255.0F
) << 0));
742 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
743 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] =
744 (_3DSTATE_FOG_COLOR_CMD
| color
);
748 /* =============================================================
752 i830Enable(struct gl_context
* ctx
, GLenum cap
, GLboolean state
)
754 struct i830_context
*i830
= i830_context(ctx
);
759 update_specular(ctx
);
763 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
764 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_ALPHA_TEST_MASK
;
766 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_ALPHA_TEST
;
768 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_ALPHA_TEST
;
773 i830EvalLogicOpBlendState(ctx
);
776 case GL_COLOR_LOGIC_OP
:
777 i830EvalLogicOpBlendState(ctx
);
779 /* Logicop doesn't seem to work at 16bpp:
781 if (i830
->intel
.ctx
.Visual
.rgbBits
== 16)
782 FALLBACK(&i830
->intel
, I830_FALLBACK_LOGICOP
, state
);
786 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
787 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DITHER
;
790 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DITHER
;
792 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DITHER
;
796 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
797 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_DEPTH_TEST_MASK
;
800 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_DEPTH_TEST
;
802 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_DEPTH_TEST
;
804 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
806 i830DepthMask(ctx
, ctx
->Depth
.Mask
);
809 case GL_SCISSOR_TEST
:
810 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
813 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
814 (_3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
);
816 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
817 (_3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
);
822 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
824 i830
->state
.Ctx
[I830_CTXREG_AA
] &= ~AA_LINE_ENABLE
;
826 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_ENABLE
;
828 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_DISABLE
;
832 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
833 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_FOG_MASK
;
835 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_FOG
;
837 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_FOG
;
841 i830CullFaceFrontFace(ctx
, 0);
847 case GL_STENCIL_TEST
:
849 GLboolean hw_stencil
= GL_FALSE
;
850 if (ctx
->DrawBuffer
) {
851 struct intel_renderbuffer
*irbStencil
852 = intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
853 hw_stencil
= (irbStencil
&& irbStencil
->region
);
856 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
859 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_STENCIL_TEST
;
860 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_STENCIL_WRITE
;
863 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_STENCIL_TEST
;
864 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &=
865 ~ENABLE_STENCIL_WRITE
;
866 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_STENCIL_TEST
;
867 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |=
868 DISABLE_STENCIL_WRITE
;
872 FALLBACK(&i830
->intel
, I830_FALLBACK_STENCIL
, state
);
877 case GL_POLYGON_STIPPLE
:
878 /* The stipple command worked on my 855GM box, but not my 845G.
879 * I'll do more testing later to find out exactly which hardware
880 * supports it. Disabled for now.
882 if (i830
->intel
.hw_stipple
&&
883 i830
->intel
.reduced_primitive
== GL_TRIANGLES
) {
884 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
885 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
887 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
898 i830_init_packets(struct i830_context
*i830
)
901 memset(&i830
->state
, 0, sizeof(i830
->state
));
903 /* Set default blend state */
904 i830
->state
.TexBlend
[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
906 ENABLE_TEXOUTPUT_WRT_SEL
|
907 TEXOP_OUTPUT_CURRENT
|
908 DISABLE_TEX_CNTRL_STAGE
|
911 TEXOP_LAST_STAGE
| TEXBLENDOP_ARG1
);
912 i830
->state
.TexBlend
[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
914 ENABLE_TEXOUTPUT_WRT_SEL
|
915 TEXOP_OUTPUT_CURRENT
|
917 TEXOP_MODIFY_PARMS
| TEXBLENDOP_ARG1
);
918 i830
->state
.TexBlend
[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
921 TEXBLENDARG_MODIFY_PARMS
|
922 TEXBLENDARG_DIFFUSE
);
923 i830
->state
.TexBlend
[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
926 TEXBLENDARG_MODIFY_PARMS
|
927 TEXBLENDARG_DIFFUSE
);
929 i830
->state
.TexBlendWordsUsed
[0] = 4;
932 i830
->state
.Ctx
[I830_CTXREG_VF
] = 0;
933 i830
->state
.Ctx
[I830_CTXREG_VF2
] = 0;
935 i830
->state
.Ctx
[I830_CTXREG_AA
] = (_3DSTATE_AA_CMD
|
936 AA_LINE_ECAAR_WIDTH_ENABLE
|
937 AA_LINE_ECAAR_WIDTH_1_0
|
938 AA_LINE_REGION_WIDTH_ENABLE
|
939 AA_LINE_REGION_WIDTH_1_0
|
942 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] = (_3DSTATE_ENABLES_1_CMD
|
944 DISABLE_STENCIL_TEST
|
949 DISABLE_COLOR_BLEND
|
952 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
953 if (i830
->intel
.hw_stencil
) {
954 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
955 ENABLE_STENCIL_WRITE
|
959 /* set no color comps disabled */
966 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
967 DISABLE_STENCIL_WRITE
|
971 /* set no color comps disabled */
976 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = (_3DSTATE_MODES_1_CMD
|
977 ENABLE_COLR_BLND_FUNC
|
979 ENABLE_SRC_BLND_FACTOR
|
980 SRC_BLND_FACT(BLENDFACT_ONE
) |
981 ENABLE_DST_BLND_FACTOR
|
982 DST_BLND_FACT(BLENDFACT_ZERO
));
984 i830
->state
.Ctx
[I830_CTXREG_STATE2
] = (_3DSTATE_MODES_2_CMD
|
985 ENABLE_GLOBAL_DEPTH_BIAS
|
986 GLOBAL_DEPTH_BIAS(0) |
987 ENABLE_ALPHA_TEST_FUNC
|
988 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS
)
989 | ALPHA_REF_VALUE(0));
991 i830
->state
.Ctx
[I830_CTXREG_STATE3
] = (_3DSTATE_MODES_3_CMD
|
992 ENABLE_DEPTH_TEST_FUNC
|
993 DEPTH_TEST_FUNC(COMPAREFUNC_LESS
) |
994 ENABLE_ALPHA_SHADE_MODE
|
995 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
)
996 | ENABLE_FOG_SHADE_MODE
|
997 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
998 ENABLE_SPEC_SHADE_MODE
|
999 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
1000 ENABLE_COLOR_SHADE_MODE
|
1001 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
)
1002 | ENABLE_CULL_MODE
| CULLMODE_NONE
);
1004 i830
->state
.Ctx
[I830_CTXREG_STATE4
] = (_3DSTATE_MODES_4_CMD
|
1005 ENABLE_LOGIC_OP_FUNC
|
1006 LOGIC_OP_FUNC(LOGICOP_COPY
) |
1007 ENABLE_STENCIL_TEST_MASK
|
1008 STENCIL_TEST_MASK(0xff) |
1009 ENABLE_STENCIL_WRITE_MASK
|
1010 STENCIL_WRITE_MASK(0xff));
1012 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] = (_3DSTATE_STENCIL_TEST_CMD
|
1013 ENABLE_STENCIL_PARMS
|
1014 STENCIL_FAIL_OP(STENCILOP_KEEP
)
1016 STENCIL_PASS_DEPTH_FAIL_OP
1018 STENCIL_PASS_DEPTH_PASS_OP
1020 ENABLE_STENCIL_TEST_FUNC
|
1022 (COMPAREFUNC_ALWAYS
) |
1023 ENABLE_STENCIL_REF_VALUE
|
1024 STENCIL_REF_VALUE(0));
1026 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = (_3DSTATE_MODES_5_CMD
| FLUSH_TEXTURE_CACHE
| ENABLE_SPRITE_POINT_TEX
| SPRITE_POINT_TEX_OFF
| ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1027 ENABLE_FIXED_POINT_WIDTH
|
1028 FIXED_POINT_WIDTH(1));
1030 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD
|
1031 DISABLE_INDPT_ALPHA_BLEND
|
1032 ENABLE_ALPHA_BLENDFUNC
|
1035 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] = (_3DSTATE_FOG_COLOR_CMD
|
1037 FOG_COLOR_GREEN(0) |
1040 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR0
] = _3DSTATE_CONST_BLEND_COLOR_CMD
;
1041 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] = 0;
1043 i830
->state
.Ctx
[I830_CTXREG_MCSB0
] = _3DSTATE_MAP_COORD_SETBIND_CMD
;
1044 i830
->state
.Ctx
[I830_CTXREG_MCSB1
] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3
) |
1045 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2
) |
1046 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1
) |
1047 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0
));
1049 i830
->state
.RasterRules
[I830_RASTER_RULES
] = (_3DSTATE_RASTER_RULES_CMD
|
1050 ENABLE_POINT_RASTER_RULE
|
1051 OGL_POINT_RASTER_RULE
|
1052 ENABLE_LINE_STRIP_PROVOKE_VRTX
|
1053 ENABLE_TRI_FAN_PROVOKE_VRTX
|
1054 ENABLE_TRI_STRIP_PROVOKE_VRTX
|
1055 LINE_STRIP_PROVOKE_VRTX(1) |
1056 TRI_FAN_PROVOKE_VRTX(2) |
1057 TRI_STRIP_PROVOKE_VRTX(2));
1060 i830
->state
.Stipple
[I830_STPREG_ST0
] = _3DSTATE_STIPPLE
;
1062 i830
->state
.Buffer
[I830_DESTREG_DV0
] = _3DSTATE_DST_BUF_VARS_CMD
;
1063 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] = (_3DSTATE_SCISSOR_ENABLE_CMD
|
1064 DISABLE_SCISSOR_RECT
);
1065 i830
->state
.Buffer
[I830_DESTREG_SR0
] = _3DSTATE_SCISSOR_RECT_0_CMD
;
1066 i830
->state
.Buffer
[I830_DESTREG_SR1
] = 0;
1067 i830
->state
.Buffer
[I830_DESTREG_SR2
] = 0;
1071 i830_update_provoking_vertex(struct gl_context
* ctx
)
1073 struct i830_context
*i830
= i830_context(ctx
);
1075 I830_STATECHANGE(i830
, I830_UPLOAD_RASTER_RULES
);
1076 i830
->state
.RasterRules
[I830_RASTER_RULES
] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK
|
1077 TRI_FAN_PROVOKE_VRTX_MASK
|
1078 TRI_STRIP_PROVOKE_VRTX_MASK
);
1081 if (ctx
->Light
.ProvokingVertex
== GL_LAST_VERTEX_CONVENTION
) {
1082 i830
->state
.RasterRules
[I830_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1083 TRI_FAN_PROVOKE_VRTX(2) |
1084 TRI_STRIP_PROVOKE_VRTX(2));
1086 i830
->state
.RasterRules
[I830_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1087 TRI_FAN_PROVOKE_VRTX(1) |
1088 TRI_STRIP_PROVOKE_VRTX(0));
1093 i830InitStateFuncs(struct dd_function_table
*functions
)
1095 functions
->AlphaFunc
= i830AlphaFunc
;
1096 functions
->BlendColor
= i830BlendColor
;
1097 functions
->BlendEquationSeparate
= i830BlendEquationSeparate
;
1098 functions
->BlendFuncSeparate
= i830BlendFuncSeparate
;
1099 functions
->ColorMask
= i830ColorMask
;
1100 functions
->CullFace
= i830CullFaceFrontFace
;
1101 functions
->DepthFunc
= i830DepthFunc
;
1102 functions
->DepthMask
= i830DepthMask
;
1103 functions
->Enable
= i830Enable
;
1104 functions
->Fogfv
= i830Fogfv
;
1105 functions
->FrontFace
= i830CullFaceFrontFace
;
1106 functions
->LightModelfv
= i830LightModelfv
;
1107 functions
->LineWidth
= i830LineWidth
;
1108 functions
->LogicOpcode
= i830LogicOp
;
1109 functions
->PointSize
= i830PointSize
;
1110 functions
->PolygonStipple
= i830PolygonStipple
;
1111 functions
->Scissor
= i830Scissor
;
1112 functions
->ShadeModel
= i830ShadeModel
;
1113 functions
->StencilFuncSeparate
= i830StencilFuncSeparate
;
1114 functions
->StencilMaskSeparate
= i830StencilMaskSeparate
;
1115 functions
->StencilOpSeparate
= i830StencilOpSeparate
;
1116 functions
->DepthRange
= i830DepthRange
;
1117 functions
->Viewport
= i830Viewport
;
1121 i830InitState(struct i830_context
*i830
)
1123 struct gl_context
*ctx
= &i830
->intel
.ctx
;
1125 i830_init_packets(i830
);
1127 _mesa_init_driver_state(ctx
);
1129 i830
->state
.emitted
= 0;
1130 i830
->state
.active
= (I830_UPLOAD_INVARIENT
|
1131 I830_UPLOAD_RASTER_RULES
|
1132 I830_UPLOAD_TEXBLEND(0) |
1133 I830_UPLOAD_STIPPLE
|
1134 I830_UPLOAD_CTX
| I830_UPLOAD_BUFFERS
);