1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
37 #include "drivers/common/driverfuncs.h"
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_fbo.h"
43 #include "i830_context.h"
46 #define FILE_DEBUG_FLAG DEBUG_STATE
49 i830StencilFuncSeparate(GLcontext
* ctx
, GLenum face
, GLenum func
, GLint ref
,
52 struct i830_context
*i830
= i830_context(ctx
);
53 int test
= intel_translate_compare_func(func
);
57 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__
,
58 _mesa_lookup_enum_by_nr(func
), ref
, mask
);
61 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
62 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_TEST_MASK
;
63 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_TEST_MASK
|
64 STENCIL_TEST_MASK(mask
));
65 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_REF_VALUE_MASK
|
66 ENABLE_STENCIL_TEST_FUNC_MASK
);
67 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_REF_VALUE
|
68 ENABLE_STENCIL_TEST_FUNC
|
69 STENCIL_REF_VALUE(ref
) |
70 STENCIL_TEST_FUNC(test
));
74 i830StencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
)
76 struct i830_context
*i830
= i830_context(ctx
);
78 DBG("%s : mask 0x%x\n", __FUNCTION__
, mask
);
82 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
83 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK
;
84 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_WRITE_MASK
|
85 STENCIL_WRITE_MASK(mask
));
89 i830StencilOpSeparate(GLcontext
* ctx
, GLenum face
, GLenum fail
, GLenum zfail
,
92 struct i830_context
*i830
= i830_context(ctx
);
95 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__
,
96 _mesa_lookup_enum_by_nr(fail
),
97 _mesa_lookup_enum_by_nr(zfail
),
98 _mesa_lookup_enum_by_nr(zpass
));
106 fop
= STENCILOP_KEEP
;
109 fop
= STENCILOP_ZERO
;
112 fop
= STENCILOP_REPLACE
;
115 fop
= STENCILOP_INCRSAT
;
118 fop
= STENCILOP_DECRSAT
;
121 fop
= STENCILOP_INCR
;
124 fop
= STENCILOP_DECR
;
127 fop
= STENCILOP_INVERT
;
134 dfop
= STENCILOP_KEEP
;
137 dfop
= STENCILOP_ZERO
;
140 dfop
= STENCILOP_REPLACE
;
143 dfop
= STENCILOP_INCRSAT
;
146 dfop
= STENCILOP_DECRSAT
;
149 dfop
= STENCILOP_INCR
;
152 dfop
= STENCILOP_DECR
;
155 dfop
= STENCILOP_INVERT
;
162 dpop
= STENCILOP_KEEP
;
165 dpop
= STENCILOP_ZERO
;
168 dpop
= STENCILOP_REPLACE
;
171 dpop
= STENCILOP_INCRSAT
;
174 dpop
= STENCILOP_DECRSAT
;
177 dpop
= STENCILOP_INCR
;
180 dpop
= STENCILOP_DECR
;
183 dpop
= STENCILOP_INVERT
;
190 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
191 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_OPS_MASK
);
192 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_PARMS
|
193 STENCIL_FAIL_OP(fop
) |
194 STENCIL_PASS_DEPTH_FAIL_OP
196 STENCIL_PASS_DEPTH_PASS_OP
201 i830AlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
)
203 struct i830_context
*i830
= i830_context(ctx
);
204 int test
= intel_translate_compare_func(func
);
208 UNCLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
209 refInt
= (GLuint
) refByte
;
211 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
212 i830
->state
.Ctx
[I830_CTXREG_STATE2
] &= ~ALPHA_TEST_REF_MASK
;
213 i830
->state
.Ctx
[I830_CTXREG_STATE2
] |= (ENABLE_ALPHA_TEST_FUNC
|
214 ENABLE_ALPHA_REF_VALUE
|
215 ALPHA_TEST_FUNC(test
) |
216 ALPHA_REF_VALUE(refInt
));
220 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
221 * Blend, and Blending. It needs to be called from numerous places where we
222 * could change the LogicOp or Independant Alpha Blend without subsequent
226 * This function is substantially different from the old i830-specific driver.
227 * I'm not sure which is correct.
230 i830EvalLogicOpBlendState(GLcontext
* ctx
)
232 struct i830_context
*i830
= i830_context(ctx
);
234 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
236 if (RGBA_LOGICOP_ENABLED(ctx
)) {
237 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
238 ENABLE_LOGIC_OP_MASK
);
239 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
242 else if (ctx
->Color
.BlendEnabled
) {
243 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
244 ENABLE_LOGIC_OP_MASK
);
245 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (ENABLE_COLOR_BLEND
|
249 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
250 ENABLE_LOGIC_OP_MASK
);
251 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
257 i830BlendColor(GLcontext
* ctx
, const GLfloat color
[4])
259 struct i830_context
*i830
= i830_context(ctx
);
262 DBG("%s\n", __FUNCTION__
);
264 UNCLAMPED_FLOAT_TO_UBYTE(r
, color
[RCOMP
]);
265 UNCLAMPED_FLOAT_TO_UBYTE(g
, color
[GCOMP
]);
266 UNCLAMPED_FLOAT_TO_UBYTE(b
, color
[BCOMP
]);
267 UNCLAMPED_FLOAT_TO_UBYTE(a
, color
[ACOMP
]);
269 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
270 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] =
271 (a
<< 24) | (r
<< 16) | (g
<< 8) | b
;
275 * Sets both the blend equation (called "function" in i830 docs) and the
276 * blend function (called "factor" in i830 docs). This is done in a single
277 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
278 * change the interpretation of the blend function.
281 i830_set_blend_state(GLcontext
* ctx
)
283 struct i830_context
*i830
= i830_context(ctx
);
293 SRC_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendSrcRGB
))
294 | DST_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendDstRGB
));
296 switch (ctx
->Color
.BlendEquationRGB
) {
298 eqnRGB
= BLENDFUNC_ADD
;
301 eqnRGB
= BLENDFUNC_MIN
;
302 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
305 eqnRGB
= BLENDFUNC_MAX
;
306 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
308 case GL_FUNC_SUBTRACT
:
309 eqnRGB
= BLENDFUNC_SUB
;
311 case GL_FUNC_REVERSE_SUBTRACT
:
312 eqnRGB
= BLENDFUNC_RVRSE_SUB
;
315 fprintf(stderr
, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
316 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
321 funcA
= SRC_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendSrcA
))
322 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendDstA
));
324 switch (ctx
->Color
.BlendEquationA
) {
326 eqnA
= BLENDFUNC_ADD
;
329 eqnA
= BLENDFUNC_MIN
;
330 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
333 eqnA
= BLENDFUNC_MAX
;
334 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
336 case GL_FUNC_SUBTRACT
:
337 eqnA
= BLENDFUNC_SUB
;
339 case GL_FUNC_REVERSE_SUBTRACT
:
340 eqnA
= BLENDFUNC_RVRSE_SUB
;
343 fprintf(stderr
, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
344 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
349 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
350 | ENABLE_SRC_ABLEND_FACTOR
| ENABLE_DST_ABLEND_FACTOR
351 | ENABLE_ALPHA_BLENDFUNC
;
352 s1
= eqnRGB
| funcRGB
353 | _3DSTATE_MODES_1_CMD
354 | ENABLE_SRC_BLND_FACTOR
| ENABLE_DST_BLND_FACTOR
355 | ENABLE_COLR_BLND_FUNC
;
357 if ((eqnA
| funcA
) != (eqnRGB
| funcRGB
))
358 iab
|= ENABLE_INDPT_ALPHA_BLEND
;
360 iab
|= DISABLE_INDPT_ALPHA_BLEND
;
362 if (iab
!= i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] ||
363 s1
!= i830
->state
.Ctx
[I830_CTXREG_STATE1
]) {
364 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
365 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = iab
;
366 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = s1
;
369 /* This will catch a logicop blend equation. It will also ensure
370 * independant alpha blend is really in the correct state (either enabled
371 * or disabled) if blending is already enabled.
374 i830EvalLogicOpBlendState(ctx
);
378 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
379 __FUNCTION__
, __LINE__
, i830
->state
.Ctx
[I830_CTXREG_STATE1
],
380 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
],
381 (ctx
->Color
.BlendEnabled
) ? "en" : "dis");
387 i830BlendEquationSeparate(GLcontext
* ctx
, GLenum modeRGB
, GLenum modeA
)
389 DBG("%s -> %s, %s\n", __FUNCTION__
,
390 _mesa_lookup_enum_by_nr(modeRGB
),
391 _mesa_lookup_enum_by_nr(modeA
));
395 i830_set_blend_state(ctx
);
400 i830BlendFuncSeparate(GLcontext
* ctx
, GLenum sfactorRGB
,
401 GLenum dfactorRGB
, GLenum sfactorA
, GLenum dfactorA
)
403 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__
,
404 _mesa_lookup_enum_by_nr(sfactorRGB
),
405 _mesa_lookup_enum_by_nr(dfactorRGB
),
406 _mesa_lookup_enum_by_nr(sfactorA
),
407 _mesa_lookup_enum_by_nr(dfactorA
));
413 i830_set_blend_state(ctx
);
419 i830DepthFunc(GLcontext
* ctx
, GLenum func
)
421 struct i830_context
*i830
= i830_context(ctx
);
422 int test
= intel_translate_compare_func(func
);
424 DBG("%s\n", __FUNCTION__
);
426 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
427 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~DEPTH_TEST_FUNC_MASK
;
428 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= (ENABLE_DEPTH_TEST_FUNC
|
429 DEPTH_TEST_FUNC(test
));
433 i830DepthMask(GLcontext
* ctx
, GLboolean flag
)
435 struct i830_context
*i830
= i830_context(ctx
);
437 DBG("%s flag (%d)\n", __FUNCTION__
, flag
);
439 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
441 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DIS_DEPTH_WRITE_MASK
;
443 if (flag
&& ctx
->Depth
.Test
)
444 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DEPTH_WRITE
;
446 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DEPTH_WRITE
;
449 /* =============================================================
452 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
453 * Fortunately stipple is usually a repeating pattern.
456 i830PolygonStipple(GLcontext
* ctx
, const GLubyte
* mask
)
458 struct i830_context
*i830
= i830_context(ctx
);
459 const GLubyte
*m
= mask
;
462 int active
= (ctx
->Polygon
.StippleFlag
&&
463 i830
->intel
.reduced_primitive
== GL_TRIANGLES
);
467 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
468 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
471 p
[0] = mask
[12] & 0xf;
473 p
[1] = mask
[8] & 0xf;
475 p
[2] = mask
[4] & 0xf;
477 p
[3] = mask
[0] & 0xf;
480 for (k
= 0; k
< 8; k
++)
481 for (j
= 3; j
>= 0; j
--)
482 for (i
= 0; i
< 4; i
++, m
++)
484 i830
->intel
.hw_stipple
= 0;
488 newMask
= (((p
[0] & 0xf) << 0) |
489 ((p
[1] & 0xf) << 4) |
490 ((p
[2] & 0xf) << 8) | ((p
[3] & 0xf) << 12));
493 if (newMask
== 0xffff || newMask
== 0x0) {
494 /* this is needed to make conform pass */
495 i830
->intel
.hw_stipple
= 0;
499 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~0xffff;
500 i830
->state
.Stipple
[I830_STPREG_ST1
] |= newMask
;
501 i830
->intel
.hw_stipple
= 1;
504 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
508 /* =============================================================
512 i830Scissor(GLcontext
* ctx
, GLint x
, GLint y
, GLsizei w
, GLsizei h
)
514 struct i830_context
*i830
= i830_context(ctx
);
517 if (!ctx
->DrawBuffer
)
520 DBG("%s %d,%d %dx%d\n", __FUNCTION__
, x
, y
, w
, h
);
522 if (ctx
->DrawBuffer
->Name
== 0) {
524 y1
= ctx
->DrawBuffer
->Height
- (y
+ h
);
527 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
530 /* FBO - not inverted
536 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
539 x1
= CLAMP(x1
, 0, ctx
->DrawBuffer
->Width
- 1);
540 y1
= CLAMP(y1
, 0, ctx
->DrawBuffer
->Height
- 1);
541 x2
= CLAMP(x2
, 0, ctx
->DrawBuffer
->Width
- 1);
542 y2
= CLAMP(y2
, 0, ctx
->DrawBuffer
->Height
- 1);
544 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
546 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
547 i830
->state
.Buffer
[I830_DESTREG_SR1
] = (y1
<< 16) | (x1
& 0xffff);
548 i830
->state
.Buffer
[I830_DESTREG_SR2
] = (y2
<< 16) | (x2
& 0xffff);
552 i830LogicOp(GLcontext
* ctx
, GLenum opcode
)
554 struct i830_context
*i830
= i830_context(ctx
);
555 int tmp
= intel_translate_logic_op(opcode
);
557 DBG("%s\n", __FUNCTION__
);
559 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
560 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~LOGICOP_MASK
;
561 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= LOGIC_OP_FUNC(tmp
);
567 i830CullFaceFrontFace(GLcontext
* ctx
, GLenum unused
)
569 struct i830_context
*i830
= i830_context(ctx
);
572 DBG("%s\n", __FUNCTION__
);
574 if (!ctx
->Polygon
.CullFlag
) {
575 mode
= CULLMODE_NONE
;
577 else if (ctx
->Polygon
.CullFaceMode
!= GL_FRONT_AND_BACK
) {
580 if (ctx
->Polygon
.CullFaceMode
== GL_FRONT
)
581 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
582 if (ctx
->Polygon
.FrontFace
!= GL_CCW
)
583 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
586 mode
= CULLMODE_BOTH
;
589 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
590 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~CULLMODE_MASK
;
591 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= ENABLE_CULL_MODE
| mode
;
595 i830LineWidth(GLcontext
* ctx
, GLfloat widthf
)
597 struct i830_context
*i830
= i830_context(ctx
);
601 DBG("%s\n", __FUNCTION__
);
603 width
= (int) (widthf
* 2);
604 CLAMP_SELF(width
, 1, 15);
606 state5
= i830
->state
.Ctx
[I830_CTXREG_STATE5
] & ~FIXED_LINE_WIDTH_MASK
;
607 state5
|= (ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(width
));
609 if (state5
!= i830
->state
.Ctx
[I830_CTXREG_STATE5
]) {
610 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
611 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = state5
;
616 i830PointSize(GLcontext
* ctx
, GLfloat size
)
618 struct i830_context
*i830
= i830_context(ctx
);
619 GLint point_size
= (int) size
;
621 DBG("%s\n", __FUNCTION__
);
623 CLAMP_SELF(point_size
, 1, 256);
624 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
625 i830
->state
.Ctx
[I830_CTXREG_STATE5
] &= ~FIXED_POINT_WIDTH_MASK
;
626 i830
->state
.Ctx
[I830_CTXREG_STATE5
] |= (ENABLE_FIXED_POINT_WIDTH
|
627 FIXED_POINT_WIDTH(point_size
));
631 /* =============================================================
636 i830ColorMask(GLcontext
* ctx
,
637 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
639 struct i830_context
*i830
= i830_context(ctx
);
642 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__
, r
, g
, b
, a
);
644 tmp
= ((i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] & ~WRITEMASK_MASK
) |
647 ((!r
) << WRITEMASK_RED_SHIFT
) |
648 ((!g
) << WRITEMASK_GREEN_SHIFT
) |
649 ((!b
) << WRITEMASK_BLUE_SHIFT
) | ((!a
) << WRITEMASK_ALPHA_SHIFT
));
651 if (tmp
!= i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
]) {
652 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
653 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = tmp
;
658 update_specular(GLcontext
* ctx
)
660 struct i830_context
*i830
= i830_context(ctx
);
662 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
663 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_SPEC_ADD_MASK
;
665 if (NEED_SECONDARY_COLOR(ctx
))
666 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_SPEC_ADD
;
668 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_SPEC_ADD
;
672 i830LightModelfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
674 DBG("%s\n", __FUNCTION__
);
676 if (pname
== GL_LIGHT_MODEL_COLOR_CONTROL
) {
677 update_specular(ctx
);
681 /* In Mesa 3.5 we can reliably do native flatshading.
684 i830ShadeModel(GLcontext
* ctx
, GLenum mode
)
686 struct i830_context
*i830
= i830_context(ctx
);
687 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
690 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
692 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~SHADE_MODE_MASK
;
694 if (mode
== GL_FLAT
) {
695 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
696 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT
) | FOG_SHADE_MODE(SHADE_MODE_FLAT
)
697 | SPEC_SHADE_MODE(SHADE_MODE_FLAT
) |
698 COLOR_SHADE_MODE(SHADE_MODE_FLAT
));
701 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
702 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
) |
703 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
704 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
705 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
));
709 /* =============================================================
713 i830Fogfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
715 struct i830_context
*i830
= i830_context(ctx
);
717 DBG("%s\n", __FUNCTION__
);
719 if (pname
== GL_FOG_COLOR
) {
720 GLuint color
= (((GLubyte
) (ctx
->Fog
.Color
[0] * 255.0F
) << 16) |
721 ((GLubyte
) (ctx
->Fog
.Color
[1] * 255.0F
) << 8) |
722 ((GLubyte
) (ctx
->Fog
.Color
[2] * 255.0F
) << 0));
724 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
725 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] =
726 (_3DSTATE_FOG_COLOR_CMD
| color
);
730 /* =============================================================
734 i830Enable(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
736 struct i830_context
*i830
= i830_context(ctx
);
741 update_specular(ctx
);
745 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
746 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_ALPHA_TEST_MASK
;
748 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_ALPHA_TEST
;
750 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_ALPHA_TEST
;
755 i830EvalLogicOpBlendState(ctx
);
758 case GL_COLOR_LOGIC_OP
:
759 i830EvalLogicOpBlendState(ctx
);
761 /* Logicop doesn't seem to work at 16bpp:
763 if (i830
->intel
.intelScreen
->cpp
== 2)
764 FALLBACK(&i830
->intel
, I830_FALLBACK_LOGICOP
, state
);
768 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
769 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DITHER
;
772 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DITHER
;
774 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DITHER
;
778 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
779 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_DEPTH_TEST_MASK
;
782 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_DEPTH_TEST
;
784 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_DEPTH_TEST
;
786 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
788 i830DepthMask(ctx
, ctx
->Depth
.Mask
);
791 case GL_SCISSOR_TEST
:
792 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
795 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
796 (_3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
);
798 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
799 (_3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
);
804 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
806 i830
->state
.Ctx
[I830_CTXREG_AA
] &= ~AA_LINE_ENABLE
;
808 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_ENABLE
;
810 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_DISABLE
;
814 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
815 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_FOG_MASK
;
817 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_FOG
;
819 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_FOG
;
823 i830CullFaceFrontFace(ctx
, 0);
829 case GL_STENCIL_TEST
:
831 GLboolean hw_stencil
= GL_FALSE
;
832 if (ctx
->DrawBuffer
) {
833 struct intel_renderbuffer
*irbStencil
834 = intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
835 hw_stencil
= (irbStencil
&& irbStencil
->region
);
838 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
841 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_STENCIL_TEST
;
842 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_STENCIL_WRITE
;
845 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_STENCIL_TEST
;
846 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &=
847 ~ENABLE_STENCIL_WRITE
;
848 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_STENCIL_TEST
;
849 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |=
850 DISABLE_STENCIL_WRITE
;
854 FALLBACK(&i830
->intel
, I830_FALLBACK_STENCIL
, state
);
859 case GL_POLYGON_STIPPLE
:
860 /* The stipple command worked on my 855GM box, but not my 845G.
861 * I'll do more testing later to find out exactly which hardware
862 * supports it. Disabled for now.
864 if (i830
->intel
.hw_stipple
&&
865 i830
->intel
.reduced_primitive
== GL_TRIANGLES
) {
866 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
867 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
869 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
880 i830_init_packets(struct i830_context
*i830
)
882 intelScreenPrivate
*screen
= i830
->intel
.intelScreen
;
885 memset(&i830
->state
, 0, sizeof(i830
->state
));
887 /* Set default blend state */
888 i830
->state
.TexBlend
[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
890 ENABLE_TEXOUTPUT_WRT_SEL
|
891 TEXOP_OUTPUT_CURRENT
|
892 DISABLE_TEX_CNTRL_STAGE
|
895 TEXOP_LAST_STAGE
| TEXBLENDOP_ARG1
);
896 i830
->state
.TexBlend
[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
898 ENABLE_TEXOUTPUT_WRT_SEL
|
899 TEXOP_OUTPUT_CURRENT
|
901 TEXOP_MODIFY_PARMS
| TEXBLENDOP_ARG1
);
902 i830
->state
.TexBlend
[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
905 TEXBLENDARG_MODIFY_PARMS
|
906 TEXBLENDARG_DIFFUSE
);
907 i830
->state
.TexBlend
[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
910 TEXBLENDARG_MODIFY_PARMS
|
911 TEXBLENDARG_DIFFUSE
);
913 i830
->state
.TexBlendWordsUsed
[0] = 4;
916 i830
->state
.Ctx
[I830_CTXREG_VF
] = 0;
917 i830
->state
.Ctx
[I830_CTXREG_VF2
] = 0;
919 i830
->state
.Ctx
[I830_CTXREG_AA
] = (_3DSTATE_AA_CMD
|
920 AA_LINE_ECAAR_WIDTH_ENABLE
|
921 AA_LINE_ECAAR_WIDTH_1_0
|
922 AA_LINE_REGION_WIDTH_ENABLE
|
923 AA_LINE_REGION_WIDTH_1_0
|
926 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] = (_3DSTATE_ENABLES_1_CMD
|
928 DISABLE_STENCIL_TEST
|
933 DISABLE_COLOR_BLEND
|
936 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
937 if (i830
->intel
.hw_stencil
) {
938 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
939 ENABLE_STENCIL_WRITE
|
943 /* set no color comps disabled */
950 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
951 DISABLE_STENCIL_WRITE
|
955 /* set no color comps disabled */
960 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = (_3DSTATE_MODES_1_CMD
|
961 ENABLE_COLR_BLND_FUNC
|
963 ENABLE_SRC_BLND_FACTOR
|
964 SRC_BLND_FACT(BLENDFACT_ONE
) |
965 ENABLE_DST_BLND_FACTOR
|
966 DST_BLND_FACT(BLENDFACT_ZERO
));
968 i830
->state
.Ctx
[I830_CTXREG_STATE2
] = (_3DSTATE_MODES_2_CMD
|
969 ENABLE_GLOBAL_DEPTH_BIAS
|
970 GLOBAL_DEPTH_BIAS(0) |
971 ENABLE_ALPHA_TEST_FUNC
|
972 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS
)
973 | ALPHA_REF_VALUE(0));
975 i830
->state
.Ctx
[I830_CTXREG_STATE3
] = (_3DSTATE_MODES_3_CMD
|
976 ENABLE_DEPTH_TEST_FUNC
|
977 DEPTH_TEST_FUNC(COMPAREFUNC_LESS
) |
978 ENABLE_ALPHA_SHADE_MODE
|
979 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
)
980 | ENABLE_FOG_SHADE_MODE
|
981 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
982 ENABLE_SPEC_SHADE_MODE
|
983 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
984 ENABLE_COLOR_SHADE_MODE
|
985 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
)
986 | ENABLE_CULL_MODE
| CULLMODE_NONE
);
988 i830
->state
.Ctx
[I830_CTXREG_STATE4
] = (_3DSTATE_MODES_4_CMD
|
989 ENABLE_LOGIC_OP_FUNC
|
990 LOGIC_OP_FUNC(LOGICOP_COPY
) |
991 ENABLE_STENCIL_TEST_MASK
|
992 STENCIL_TEST_MASK(0xff) |
993 ENABLE_STENCIL_WRITE_MASK
|
994 STENCIL_WRITE_MASK(0xff));
996 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] = (_3DSTATE_STENCIL_TEST_CMD
|
997 ENABLE_STENCIL_PARMS
|
998 STENCIL_FAIL_OP(STENCILOP_KEEP
)
1000 STENCIL_PASS_DEPTH_FAIL_OP
1002 STENCIL_PASS_DEPTH_PASS_OP
1004 ENABLE_STENCIL_TEST_FUNC
|
1006 (COMPAREFUNC_ALWAYS
) |
1007 ENABLE_STENCIL_REF_VALUE
|
1008 STENCIL_REF_VALUE(0));
1010 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = (_3DSTATE_MODES_5_CMD
| FLUSH_TEXTURE_CACHE
| ENABLE_SPRITE_POINT_TEX
| SPRITE_POINT_TEX_OFF
| ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1011 ENABLE_FIXED_POINT_WIDTH
|
1012 FIXED_POINT_WIDTH(1));
1014 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD
|
1015 DISABLE_INDPT_ALPHA_BLEND
|
1016 ENABLE_ALPHA_BLENDFUNC
|
1019 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] = (_3DSTATE_FOG_COLOR_CMD
|
1021 FOG_COLOR_GREEN(0) |
1024 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR0
] = _3DSTATE_CONST_BLEND_COLOR_CMD
;
1025 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] = 0;
1027 i830
->state
.Ctx
[I830_CTXREG_MCSB0
] = _3DSTATE_MAP_COORD_SETBIND_CMD
;
1028 i830
->state
.Ctx
[I830_CTXREG_MCSB1
] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3
) |
1029 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2
) |
1030 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1
) |
1031 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0
));
1034 i830
->state
.Stipple
[I830_STPREG_ST0
] = _3DSTATE_STIPPLE
;
1036 i830
->state
.Buffer
[I830_DESTREG_CBUFADDR0
] = _3DSTATE_BUF_INFO_CMD
;
1037 i830
->state
.Buffer
[I830_DESTREG_CBUFADDR1
] = (BUF_3D_ID_COLOR_BACK
| BUF_3D_PITCH(screen
->front
.pitch
) | /* pitch in bytes */
1041 i830
->state
.Buffer
[I830_DESTREG_DBUFADDR0
] = _3DSTATE_BUF_INFO_CMD
;
1042 i830
->state
.Buffer
[I830_DESTREG_DBUFADDR1
] = (BUF_3D_ID_DEPTH
| BUF_3D_PITCH(screen
->depth
.pitch
) | /* pitch in bytes */
1045 i830
->state
.Buffer
[I830_DESTREG_DV0
] = _3DSTATE_DST_BUF_VARS_CMD
;
1048 switch (screen
->fbFormat
) {
1050 i830
->state
.Buffer
[I830_DESTREG_DV1
] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
1051 DSTORG_VERT_BIAS(0x8) | /* .5 */
1054 DEPTH_FRMT_16_FIXED
);
1057 i830
->state
.Buffer
[I830_DESTREG_DV1
] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
1058 DSTORG_VERT_BIAS(0x8) | /* .5 */
1061 DEPTH_FRMT_24_FIXED_8_OTHER
);
1065 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] = (_3DSTATE_SCISSOR_ENABLE_CMD
|
1066 DISABLE_SCISSOR_RECT
);
1067 i830
->state
.Buffer
[I830_DESTREG_SR0
] = _3DSTATE_SCISSOR_RECT_0_CMD
;
1068 i830
->state
.Buffer
[I830_DESTREG_SR1
] = 0;
1069 i830
->state
.Buffer
[I830_DESTREG_SR2
] = 0;
1074 i830InitStateFuncs(struct dd_function_table
*functions
)
1076 functions
->AlphaFunc
= i830AlphaFunc
;
1077 functions
->BlendColor
= i830BlendColor
;
1078 functions
->BlendEquationSeparate
= i830BlendEquationSeparate
;
1079 functions
->BlendFuncSeparate
= i830BlendFuncSeparate
;
1080 functions
->ColorMask
= i830ColorMask
;
1081 functions
->CullFace
= i830CullFaceFrontFace
;
1082 functions
->DepthFunc
= i830DepthFunc
;
1083 functions
->DepthMask
= i830DepthMask
;
1084 functions
->Enable
= i830Enable
;
1085 functions
->Fogfv
= i830Fogfv
;
1086 functions
->FrontFace
= i830CullFaceFrontFace
;
1087 functions
->LightModelfv
= i830LightModelfv
;
1088 functions
->LineWidth
= i830LineWidth
;
1089 functions
->LogicOpcode
= i830LogicOp
;
1090 functions
->PointSize
= i830PointSize
;
1091 functions
->PolygonStipple
= i830PolygonStipple
;
1092 functions
->Scissor
= i830Scissor
;
1093 functions
->ShadeModel
= i830ShadeModel
;
1094 functions
->StencilFuncSeparate
= i830StencilFuncSeparate
;
1095 functions
->StencilMaskSeparate
= i830StencilMaskSeparate
;
1096 functions
->StencilOpSeparate
= i830StencilOpSeparate
;
1100 i830InitState(struct i830_context
*i830
)
1102 GLcontext
*ctx
= &i830
->intel
.ctx
;
1104 i830_init_packets(i830
);
1106 _mesa_init_driver_state(ctx
);
1108 memcpy(&i830
->initial
, &i830
->state
, sizeof(i830
->state
));
1110 i830
->current
= &i830
->state
;
1111 i830
->state
.emitted
= 0;
1112 i830
->state
.active
= (I830_UPLOAD_INVARIENT
|
1113 I830_UPLOAD_TEXBLEND(0) |
1114 I830_UPLOAD_STIPPLE
|
1115 I830_UPLOAD_CTX
| I830_UPLOAD_BUFFERS
);