1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
37 #include "drivers/common/driverfuncs.h"
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_fbo.h"
42 #include "intel_buffers.h"
44 #include "i830_context.h"
47 #define FILE_DEBUG_FLAG DEBUG_STATE
50 i830StencilFuncSeparate(GLcontext
* ctx
, GLenum face
, GLenum func
, GLint ref
,
53 struct i830_context
*i830
= i830_context(ctx
);
54 int test
= intel_translate_compare_func(func
);
58 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__
,
59 _mesa_lookup_enum_by_nr(func
), ref
, mask
);
62 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
63 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_TEST_MASK
;
64 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_TEST_MASK
|
65 STENCIL_TEST_MASK(mask
));
66 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_REF_VALUE_MASK
|
67 ENABLE_STENCIL_TEST_FUNC_MASK
);
68 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_REF_VALUE
|
69 ENABLE_STENCIL_TEST_FUNC
|
70 STENCIL_REF_VALUE(ref
) |
71 STENCIL_TEST_FUNC(test
));
75 i830StencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
)
77 struct i830_context
*i830
= i830_context(ctx
);
79 DBG("%s : mask 0x%x\n", __FUNCTION__
, mask
);
83 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
84 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK
;
85 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= (ENABLE_STENCIL_WRITE_MASK
|
86 STENCIL_WRITE_MASK(mask
));
90 i830StencilOpSeparate(GLcontext
* ctx
, GLenum face
, GLenum fail
, GLenum zfail
,
93 struct i830_context
*i830
= i830_context(ctx
);
96 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__
,
97 _mesa_lookup_enum_by_nr(fail
),
98 _mesa_lookup_enum_by_nr(zfail
),
99 _mesa_lookup_enum_by_nr(zpass
));
107 fop
= STENCILOP_KEEP
;
110 fop
= STENCILOP_ZERO
;
113 fop
= STENCILOP_REPLACE
;
116 fop
= STENCILOP_INCRSAT
;
119 fop
= STENCILOP_DECRSAT
;
122 fop
= STENCILOP_INCR
;
125 fop
= STENCILOP_DECR
;
128 fop
= STENCILOP_INVERT
;
135 dfop
= STENCILOP_KEEP
;
138 dfop
= STENCILOP_ZERO
;
141 dfop
= STENCILOP_REPLACE
;
144 dfop
= STENCILOP_INCRSAT
;
147 dfop
= STENCILOP_DECRSAT
;
150 dfop
= STENCILOP_INCR
;
153 dfop
= STENCILOP_DECR
;
156 dfop
= STENCILOP_INVERT
;
163 dpop
= STENCILOP_KEEP
;
166 dpop
= STENCILOP_ZERO
;
169 dpop
= STENCILOP_REPLACE
;
172 dpop
= STENCILOP_INCRSAT
;
175 dpop
= STENCILOP_DECRSAT
;
178 dpop
= STENCILOP_INCR
;
181 dpop
= STENCILOP_DECR
;
184 dpop
= STENCILOP_INVERT
;
191 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
192 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] &= ~(STENCIL_OPS_MASK
);
193 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] |= (ENABLE_STENCIL_PARMS
|
194 STENCIL_FAIL_OP(fop
) |
195 STENCIL_PASS_DEPTH_FAIL_OP
197 STENCIL_PASS_DEPTH_PASS_OP
202 i830AlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
)
204 struct i830_context
*i830
= i830_context(ctx
);
205 int test
= intel_translate_compare_func(func
);
209 UNCLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
210 refInt
= (GLuint
) refByte
;
212 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
213 i830
->state
.Ctx
[I830_CTXREG_STATE2
] &= ~ALPHA_TEST_REF_MASK
;
214 i830
->state
.Ctx
[I830_CTXREG_STATE2
] |= (ENABLE_ALPHA_TEST_FUNC
|
215 ENABLE_ALPHA_REF_VALUE
|
216 ALPHA_TEST_FUNC(test
) |
217 ALPHA_REF_VALUE(refInt
));
221 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
222 * Blend, and Blending. It needs to be called from numerous places where we
223 * could change the LogicOp or Independant Alpha Blend without subsequent
227 * This function is substantially different from the old i830-specific driver.
228 * I'm not sure which is correct.
231 i830EvalLogicOpBlendState(GLcontext
* ctx
)
233 struct i830_context
*i830
= i830_context(ctx
);
235 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
237 if (RGBA_LOGICOP_ENABLED(ctx
)) {
238 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
239 ENABLE_LOGIC_OP_MASK
);
240 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
243 else if (ctx
->Color
.BlendEnabled
) {
244 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
245 ENABLE_LOGIC_OP_MASK
);
246 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (ENABLE_COLOR_BLEND
|
250 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~(ENABLE_COLOR_BLEND
|
251 ENABLE_LOGIC_OP_MASK
);
252 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= (DISABLE_COLOR_BLEND
|
258 i830BlendColor(GLcontext
* ctx
, const GLfloat color
[4])
260 struct i830_context
*i830
= i830_context(ctx
);
263 DBG("%s\n", __FUNCTION__
);
265 UNCLAMPED_FLOAT_TO_UBYTE(r
, color
[RCOMP
]);
266 UNCLAMPED_FLOAT_TO_UBYTE(g
, color
[GCOMP
]);
267 UNCLAMPED_FLOAT_TO_UBYTE(b
, color
[BCOMP
]);
268 UNCLAMPED_FLOAT_TO_UBYTE(a
, color
[ACOMP
]);
270 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
271 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] =
272 (a
<< 24) | (r
<< 16) | (g
<< 8) | b
;
276 * Sets both the blend equation (called "function" in i830 docs) and the
277 * blend function (called "factor" in i830 docs). This is done in a single
278 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
279 * change the interpretation of the blend function.
282 i830_set_blend_state(GLcontext
* ctx
)
284 struct i830_context
*i830
= i830_context(ctx
);
294 SRC_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendSrcRGB
))
295 | DST_BLND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendDstRGB
));
297 switch (ctx
->Color
.BlendEquationRGB
) {
299 eqnRGB
= BLENDFUNC_ADD
;
302 eqnRGB
= BLENDFUNC_MIN
;
303 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
306 eqnRGB
= BLENDFUNC_MAX
;
307 funcRGB
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
309 case GL_FUNC_SUBTRACT
:
310 eqnRGB
= BLENDFUNC_SUB
;
312 case GL_FUNC_REVERSE_SUBTRACT
:
313 eqnRGB
= BLENDFUNC_RVRSE_SUB
;
316 fprintf(stderr
, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
317 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
322 funcA
= SRC_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendSrcA
))
323 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx
->Color
.BlendDstA
));
325 switch (ctx
->Color
.BlendEquationA
) {
327 eqnA
= BLENDFUNC_ADD
;
330 eqnA
= BLENDFUNC_MIN
;
331 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
334 eqnA
= BLENDFUNC_MAX
;
335 funcA
= SRC_BLND_FACT(BLENDFACT_ONE
) | DST_BLND_FACT(BLENDFACT_ONE
);
337 case GL_FUNC_SUBTRACT
:
338 eqnA
= BLENDFUNC_SUB
;
340 case GL_FUNC_REVERSE_SUBTRACT
:
341 eqnA
= BLENDFUNC_RVRSE_SUB
;
344 fprintf(stderr
, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
345 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
350 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
351 | ENABLE_SRC_ABLEND_FACTOR
| ENABLE_DST_ABLEND_FACTOR
352 | ENABLE_ALPHA_BLENDFUNC
;
353 s1
= eqnRGB
| funcRGB
354 | _3DSTATE_MODES_1_CMD
355 | ENABLE_SRC_BLND_FACTOR
| ENABLE_DST_BLND_FACTOR
356 | ENABLE_COLR_BLND_FUNC
;
358 if ((eqnA
| funcA
) != (eqnRGB
| funcRGB
))
359 iab
|= ENABLE_INDPT_ALPHA_BLEND
;
361 iab
|= DISABLE_INDPT_ALPHA_BLEND
;
363 if (iab
!= i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] ||
364 s1
!= i830
->state
.Ctx
[I830_CTXREG_STATE1
]) {
365 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
366 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = iab
;
367 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = s1
;
370 /* This will catch a logicop blend equation. It will also ensure
371 * independant alpha blend is really in the correct state (either enabled
372 * or disabled) if blending is already enabled.
375 i830EvalLogicOpBlendState(ctx
);
379 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
380 __FUNCTION__
, __LINE__
, i830
->state
.Ctx
[I830_CTXREG_STATE1
],
381 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
],
382 (ctx
->Color
.BlendEnabled
) ? "en" : "dis");
388 i830BlendEquationSeparate(GLcontext
* ctx
, GLenum modeRGB
, GLenum modeA
)
390 DBG("%s -> %s, %s\n", __FUNCTION__
,
391 _mesa_lookup_enum_by_nr(modeRGB
),
392 _mesa_lookup_enum_by_nr(modeA
));
396 i830_set_blend_state(ctx
);
401 i830BlendFuncSeparate(GLcontext
* ctx
, GLenum sfactorRGB
,
402 GLenum dfactorRGB
, GLenum sfactorA
, GLenum dfactorA
)
404 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__
,
405 _mesa_lookup_enum_by_nr(sfactorRGB
),
406 _mesa_lookup_enum_by_nr(dfactorRGB
),
407 _mesa_lookup_enum_by_nr(sfactorA
),
408 _mesa_lookup_enum_by_nr(dfactorA
));
414 i830_set_blend_state(ctx
);
420 i830DepthFunc(GLcontext
* ctx
, GLenum func
)
422 struct i830_context
*i830
= i830_context(ctx
);
423 int test
= intel_translate_compare_func(func
);
425 DBG("%s\n", __FUNCTION__
);
427 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
428 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~DEPTH_TEST_FUNC_MASK
;
429 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= (ENABLE_DEPTH_TEST_FUNC
|
430 DEPTH_TEST_FUNC(test
));
434 i830DepthMask(GLcontext
* ctx
, GLboolean flag
)
436 struct i830_context
*i830
= i830_context(ctx
);
438 DBG("%s flag (%d)\n", __FUNCTION__
, flag
);
440 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
442 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DIS_DEPTH_WRITE_MASK
;
444 if (flag
&& ctx
->Depth
.Test
)
445 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DEPTH_WRITE
;
447 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DEPTH_WRITE
;
450 /** Called from ctx->Driver.Viewport() */
452 i830Viewport(GLcontext
* ctx
,
453 GLint x
, GLint y
, GLsizei width
, GLsizei height
)
455 intelCalcViewport(ctx
);
457 intel_viewport(ctx
, x
, y
, width
, height
);
461 /** Called from ctx->Driver.DepthRange() */
463 i830DepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
)
465 intelCalcViewport(ctx
);
468 /* =============================================================
471 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
472 * Fortunately stipple is usually a repeating pattern.
475 i830PolygonStipple(GLcontext
* ctx
, const GLubyte
* mask
)
477 struct i830_context
*i830
= i830_context(ctx
);
478 const GLubyte
*m
= mask
;
481 int active
= (ctx
->Polygon
.StippleFlag
&&
482 i830
->intel
.reduced_primitive
== GL_TRIANGLES
);
486 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
487 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
490 p
[0] = mask
[12] & 0xf;
492 p
[1] = mask
[8] & 0xf;
494 p
[2] = mask
[4] & 0xf;
496 p
[3] = mask
[0] & 0xf;
499 for (k
= 0; k
< 8; k
++)
500 for (j
= 3; j
>= 0; j
--)
501 for (i
= 0; i
< 4; i
++, m
++)
503 i830
->intel
.hw_stipple
= 0;
507 newMask
= (((p
[0] & 0xf) << 0) |
508 ((p
[1] & 0xf) << 4) |
509 ((p
[2] & 0xf) << 8) | ((p
[3] & 0xf) << 12));
512 if (newMask
== 0xffff || newMask
== 0x0) {
513 /* this is needed to make conform pass */
514 i830
->intel
.hw_stipple
= 0;
518 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~0xffff;
519 i830
->state
.Stipple
[I830_STPREG_ST1
] |= newMask
;
520 i830
->intel
.hw_stipple
= 1;
523 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
527 /* =============================================================
531 i830Scissor(GLcontext
* ctx
, GLint x
, GLint y
, GLsizei w
, GLsizei h
)
533 struct i830_context
*i830
= i830_context(ctx
);
536 if (!ctx
->DrawBuffer
)
539 DBG("%s %d,%d %dx%d\n", __FUNCTION__
, x
, y
, w
, h
);
541 if (ctx
->DrawBuffer
->Name
== 0) {
543 y1
= ctx
->DrawBuffer
->Height
- (y
+ h
);
546 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
549 /* FBO - not inverted
555 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
558 x1
= CLAMP(x1
, 0, ctx
->DrawBuffer
->Width
- 1);
559 y1
= CLAMP(y1
, 0, ctx
->DrawBuffer
->Height
- 1);
560 x2
= CLAMP(x2
, 0, ctx
->DrawBuffer
->Width
- 1);
561 y2
= CLAMP(y2
, 0, ctx
->DrawBuffer
->Height
- 1);
563 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
565 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
566 i830
->state
.Buffer
[I830_DESTREG_SR1
] = (y1
<< 16) | (x1
& 0xffff);
567 i830
->state
.Buffer
[I830_DESTREG_SR2
] = (y2
<< 16) | (x2
& 0xffff);
571 i830LogicOp(GLcontext
* ctx
, GLenum opcode
)
573 struct i830_context
*i830
= i830_context(ctx
);
574 int tmp
= intel_translate_logic_op(opcode
);
576 DBG("%s\n", __FUNCTION__
);
578 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
579 i830
->state
.Ctx
[I830_CTXREG_STATE4
] &= ~LOGICOP_MASK
;
580 i830
->state
.Ctx
[I830_CTXREG_STATE4
] |= LOGIC_OP_FUNC(tmp
);
586 i830CullFaceFrontFace(GLcontext
* ctx
, GLenum unused
)
588 struct i830_context
*i830
= i830_context(ctx
);
591 DBG("%s\n", __FUNCTION__
);
593 if (!ctx
->Polygon
.CullFlag
) {
594 mode
= CULLMODE_NONE
;
596 else if (ctx
->Polygon
.CullFaceMode
!= GL_FRONT_AND_BACK
) {
599 if (ctx
->Polygon
.CullFaceMode
== GL_FRONT
)
600 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
601 if (ctx
->Polygon
.FrontFace
!= GL_CCW
)
602 mode
^= (CULLMODE_CW
^ CULLMODE_CCW
);
605 mode
= CULLMODE_BOTH
;
608 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
609 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~CULLMODE_MASK
;
610 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |= ENABLE_CULL_MODE
| mode
;
614 i830LineWidth(GLcontext
* ctx
, GLfloat widthf
)
616 struct i830_context
*i830
= i830_context(ctx
);
620 DBG("%s\n", __FUNCTION__
);
622 width
= (int) (widthf
* 2);
623 CLAMP_SELF(width
, 1, 15);
625 state5
= i830
->state
.Ctx
[I830_CTXREG_STATE5
] & ~FIXED_LINE_WIDTH_MASK
;
626 state5
|= (ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(width
));
628 if (state5
!= i830
->state
.Ctx
[I830_CTXREG_STATE5
]) {
629 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
630 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = state5
;
635 i830PointSize(GLcontext
* ctx
, GLfloat size
)
637 struct i830_context
*i830
= i830_context(ctx
);
638 GLint point_size
= (int) size
;
640 DBG("%s\n", __FUNCTION__
);
642 CLAMP_SELF(point_size
, 1, 256);
643 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
644 i830
->state
.Ctx
[I830_CTXREG_STATE5
] &= ~FIXED_POINT_WIDTH_MASK
;
645 i830
->state
.Ctx
[I830_CTXREG_STATE5
] |= (ENABLE_FIXED_POINT_WIDTH
|
646 FIXED_POINT_WIDTH(point_size
));
650 /* =============================================================
655 i830ColorMask(GLcontext
* ctx
,
656 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
658 struct i830_context
*i830
= i830_context(ctx
);
661 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__
, r
, g
, b
, a
);
663 tmp
= ((i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] & ~WRITEMASK_MASK
) |
666 ((!r
) << WRITEMASK_RED_SHIFT
) |
667 ((!g
) << WRITEMASK_GREEN_SHIFT
) |
668 ((!b
) << WRITEMASK_BLUE_SHIFT
) | ((!a
) << WRITEMASK_ALPHA_SHIFT
));
670 if (tmp
!= i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
]) {
671 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
672 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = tmp
;
677 update_specular(GLcontext
* ctx
)
679 struct i830_context
*i830
= i830_context(ctx
);
681 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
682 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_SPEC_ADD_MASK
;
684 if (NEED_SECONDARY_COLOR(ctx
))
685 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_SPEC_ADD
;
687 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_SPEC_ADD
;
691 i830LightModelfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
693 DBG("%s\n", __FUNCTION__
);
695 if (pname
== GL_LIGHT_MODEL_COLOR_CONTROL
) {
696 update_specular(ctx
);
700 /* In Mesa 3.5 we can reliably do native flatshading.
703 i830ShadeModel(GLcontext
* ctx
, GLenum mode
)
705 struct i830_context
*i830
= i830_context(ctx
);
706 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
709 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
711 i830
->state
.Ctx
[I830_CTXREG_STATE3
] &= ~SHADE_MODE_MASK
;
713 if (mode
== GL_FLAT
) {
714 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
715 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT
) | FOG_SHADE_MODE(SHADE_MODE_FLAT
)
716 | SPEC_SHADE_MODE(SHADE_MODE_FLAT
) |
717 COLOR_SHADE_MODE(SHADE_MODE_FLAT
));
720 i830
->state
.Ctx
[I830_CTXREG_STATE3
] |=
721 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
) |
722 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
723 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
724 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
));
728 /* =============================================================
732 i830Fogfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
734 struct i830_context
*i830
= i830_context(ctx
);
736 DBG("%s\n", __FUNCTION__
);
738 if (pname
== GL_FOG_COLOR
) {
739 GLuint color
= (((GLubyte
) (ctx
->Fog
.Color
[0] * 255.0F
) << 16) |
740 ((GLubyte
) (ctx
->Fog
.Color
[1] * 255.0F
) << 8) |
741 ((GLubyte
) (ctx
->Fog
.Color
[2] * 255.0F
) << 0));
743 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
744 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] =
745 (_3DSTATE_FOG_COLOR_CMD
| color
);
749 /* =============================================================
753 i830Enable(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
755 struct i830_context
*i830
= i830_context(ctx
);
760 update_specular(ctx
);
764 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
765 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_ALPHA_TEST_MASK
;
767 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_ALPHA_TEST
;
769 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_ALPHA_TEST
;
774 i830EvalLogicOpBlendState(ctx
);
777 case GL_COLOR_LOGIC_OP
:
778 i830EvalLogicOpBlendState(ctx
);
780 /* Logicop doesn't seem to work at 16bpp:
782 if (i830
->intel
.ctx
.Visual
.rgbBits
== 16)
783 FALLBACK(&i830
->intel
, I830_FALLBACK_LOGICOP
, state
);
787 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
788 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &= ~ENABLE_DITHER
;
791 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_DITHER
;
793 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= DISABLE_DITHER
;
797 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
798 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_DEPTH_TEST_MASK
;
801 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_DEPTH_TEST
;
803 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_DEPTH_TEST
;
805 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
807 i830DepthMask(ctx
, ctx
->Depth
.Mask
);
810 case GL_SCISSOR_TEST
:
811 I830_STATECHANGE(i830
, I830_UPLOAD_BUFFERS
);
814 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
815 (_3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
);
817 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] =
818 (_3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
);
823 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
825 i830
->state
.Ctx
[I830_CTXREG_AA
] &= ~AA_LINE_ENABLE
;
827 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_ENABLE
;
829 i830
->state
.Ctx
[I830_CTXREG_AA
] |= AA_LINE_DISABLE
;
833 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
834 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_DIS_FOG_MASK
;
836 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_FOG
;
838 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_FOG
;
842 i830CullFaceFrontFace(ctx
, 0);
848 case GL_STENCIL_TEST
:
850 GLboolean hw_stencil
= GL_FALSE
;
851 if (ctx
->DrawBuffer
) {
852 struct intel_renderbuffer
*irbStencil
853 = intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
854 hw_stencil
= (irbStencil
&& irbStencil
->region
);
857 I830_STATECHANGE(i830
, I830_UPLOAD_CTX
);
860 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= ENABLE_STENCIL_TEST
;
861 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |= ENABLE_STENCIL_WRITE
;
864 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] &= ~ENABLE_STENCIL_TEST
;
865 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] &=
866 ~ENABLE_STENCIL_WRITE
;
867 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] |= DISABLE_STENCIL_TEST
;
868 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] |=
869 DISABLE_STENCIL_WRITE
;
873 FALLBACK(&i830
->intel
, I830_FALLBACK_STENCIL
, state
);
878 case GL_POLYGON_STIPPLE
:
879 /* The stipple command worked on my 855GM box, but not my 845G.
880 * I'll do more testing later to find out exactly which hardware
881 * supports it. Disabled for now.
883 if (i830
->intel
.hw_stipple
&&
884 i830
->intel
.reduced_primitive
== GL_TRIANGLES
) {
885 I830_STATECHANGE(i830
, I830_UPLOAD_STIPPLE
);
886 i830
->state
.Stipple
[I830_STPREG_ST1
] &= ~ST1_ENABLE
;
888 i830
->state
.Stipple
[I830_STPREG_ST1
] |= ST1_ENABLE
;
899 i830_init_packets(struct i830_context
*i830
)
902 memset(&i830
->state
, 0, sizeof(i830
->state
));
904 /* Set default blend state */
905 i830
->state
.TexBlend
[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
907 ENABLE_TEXOUTPUT_WRT_SEL
|
908 TEXOP_OUTPUT_CURRENT
|
909 DISABLE_TEX_CNTRL_STAGE
|
912 TEXOP_LAST_STAGE
| TEXBLENDOP_ARG1
);
913 i830
->state
.TexBlend
[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
915 ENABLE_TEXOUTPUT_WRT_SEL
|
916 TEXOP_OUTPUT_CURRENT
|
918 TEXOP_MODIFY_PARMS
| TEXBLENDOP_ARG1
);
919 i830
->state
.TexBlend
[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
922 TEXBLENDARG_MODIFY_PARMS
|
923 TEXBLENDARG_DIFFUSE
);
924 i830
->state
.TexBlend
[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
927 TEXBLENDARG_MODIFY_PARMS
|
928 TEXBLENDARG_DIFFUSE
);
930 i830
->state
.TexBlendWordsUsed
[0] = 4;
933 i830
->state
.Ctx
[I830_CTXREG_VF
] = 0;
934 i830
->state
.Ctx
[I830_CTXREG_VF2
] = 0;
936 i830
->state
.Ctx
[I830_CTXREG_AA
] = (_3DSTATE_AA_CMD
|
937 AA_LINE_ECAAR_WIDTH_ENABLE
|
938 AA_LINE_ECAAR_WIDTH_1_0
|
939 AA_LINE_REGION_WIDTH_ENABLE
|
940 AA_LINE_REGION_WIDTH_1_0
|
943 i830
->state
.Ctx
[I830_CTXREG_ENABLES_1
] = (_3DSTATE_ENABLES_1_CMD
|
945 DISABLE_STENCIL_TEST
|
950 DISABLE_COLOR_BLEND
|
953 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
954 if (i830
->intel
.hw_stencil
) {
955 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
956 ENABLE_STENCIL_WRITE
|
960 /* set no color comps disabled */
967 i830
->state
.Ctx
[I830_CTXREG_ENABLES_2
] = (_3DSTATE_ENABLES_2_CMD
|
968 DISABLE_STENCIL_WRITE
|
972 /* set no color comps disabled */
977 i830
->state
.Ctx
[I830_CTXREG_STATE1
] = (_3DSTATE_MODES_1_CMD
|
978 ENABLE_COLR_BLND_FUNC
|
980 ENABLE_SRC_BLND_FACTOR
|
981 SRC_BLND_FACT(BLENDFACT_ONE
) |
982 ENABLE_DST_BLND_FACTOR
|
983 DST_BLND_FACT(BLENDFACT_ZERO
));
985 i830
->state
.Ctx
[I830_CTXREG_STATE2
] = (_3DSTATE_MODES_2_CMD
|
986 ENABLE_GLOBAL_DEPTH_BIAS
|
987 GLOBAL_DEPTH_BIAS(0) |
988 ENABLE_ALPHA_TEST_FUNC
|
989 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS
)
990 | ALPHA_REF_VALUE(0));
992 i830
->state
.Ctx
[I830_CTXREG_STATE3
] = (_3DSTATE_MODES_3_CMD
|
993 ENABLE_DEPTH_TEST_FUNC
|
994 DEPTH_TEST_FUNC(COMPAREFUNC_LESS
) |
995 ENABLE_ALPHA_SHADE_MODE
|
996 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR
)
997 | ENABLE_FOG_SHADE_MODE
|
998 FOG_SHADE_MODE(SHADE_MODE_LINEAR
) |
999 ENABLE_SPEC_SHADE_MODE
|
1000 SPEC_SHADE_MODE(SHADE_MODE_LINEAR
) |
1001 ENABLE_COLOR_SHADE_MODE
|
1002 COLOR_SHADE_MODE(SHADE_MODE_LINEAR
)
1003 | ENABLE_CULL_MODE
| CULLMODE_NONE
);
1005 i830
->state
.Ctx
[I830_CTXREG_STATE4
] = (_3DSTATE_MODES_4_CMD
|
1006 ENABLE_LOGIC_OP_FUNC
|
1007 LOGIC_OP_FUNC(LOGICOP_COPY
) |
1008 ENABLE_STENCIL_TEST_MASK
|
1009 STENCIL_TEST_MASK(0xff) |
1010 ENABLE_STENCIL_WRITE_MASK
|
1011 STENCIL_WRITE_MASK(0xff));
1013 i830
->state
.Ctx
[I830_CTXREG_STENCILTST
] = (_3DSTATE_STENCIL_TEST_CMD
|
1014 ENABLE_STENCIL_PARMS
|
1015 STENCIL_FAIL_OP(STENCILOP_KEEP
)
1017 STENCIL_PASS_DEPTH_FAIL_OP
1019 STENCIL_PASS_DEPTH_PASS_OP
1021 ENABLE_STENCIL_TEST_FUNC
|
1023 (COMPAREFUNC_ALWAYS
) |
1024 ENABLE_STENCIL_REF_VALUE
|
1025 STENCIL_REF_VALUE(0));
1027 i830
->state
.Ctx
[I830_CTXREG_STATE5
] = (_3DSTATE_MODES_5_CMD
| FLUSH_TEXTURE_CACHE
| ENABLE_SPRITE_POINT_TEX
| SPRITE_POINT_TEX_OFF
| ENABLE_FIXED_LINE_WIDTH
| FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1028 ENABLE_FIXED_POINT_WIDTH
|
1029 FIXED_POINT_WIDTH(1));
1031 i830
->state
.Ctx
[I830_CTXREG_IALPHAB
] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD
|
1032 DISABLE_INDPT_ALPHA_BLEND
|
1033 ENABLE_ALPHA_BLENDFUNC
|
1036 i830
->state
.Ctx
[I830_CTXREG_FOGCOLOR
] = (_3DSTATE_FOG_COLOR_CMD
|
1038 FOG_COLOR_GREEN(0) |
1041 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR0
] = _3DSTATE_CONST_BLEND_COLOR_CMD
;
1042 i830
->state
.Ctx
[I830_CTXREG_BLENDCOLOR1
] = 0;
1044 i830
->state
.Ctx
[I830_CTXREG_MCSB0
] = _3DSTATE_MAP_COORD_SETBIND_CMD
;
1045 i830
->state
.Ctx
[I830_CTXREG_MCSB1
] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3
) |
1046 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2
) |
1047 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1
) |
1048 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0
));
1050 i830
->state
.RasterRules
[I830_RASTER_RULES
] = (_3DSTATE_RASTER_RULES_CMD
|
1051 ENABLE_POINT_RASTER_RULE
|
1052 OGL_POINT_RASTER_RULE
|
1053 ENABLE_LINE_STRIP_PROVOKE_VRTX
|
1054 ENABLE_TRI_FAN_PROVOKE_VRTX
|
1055 ENABLE_TRI_STRIP_PROVOKE_VRTX
|
1056 LINE_STRIP_PROVOKE_VRTX(1) |
1057 TRI_FAN_PROVOKE_VRTX(2) |
1058 TRI_STRIP_PROVOKE_VRTX(2));
1061 i830
->state
.Stipple
[I830_STPREG_ST0
] = _3DSTATE_STIPPLE
;
1063 i830
->state
.Buffer
[I830_DESTREG_DV0
] = _3DSTATE_DST_BUF_VARS_CMD
;
1064 i830
->state
.Buffer
[I830_DESTREG_SENABLE
] = (_3DSTATE_SCISSOR_ENABLE_CMD
|
1065 DISABLE_SCISSOR_RECT
);
1066 i830
->state
.Buffer
[I830_DESTREG_SR0
] = _3DSTATE_SCISSOR_RECT_0_CMD
;
1067 i830
->state
.Buffer
[I830_DESTREG_SR1
] = 0;
1068 i830
->state
.Buffer
[I830_DESTREG_SR2
] = 0;
1072 i830_update_provoking_vertex(GLcontext
* ctx
)
1074 struct i830_context
*i830
= i830_context(ctx
);
1076 I830_STATECHANGE(i830
, I830_UPLOAD_RASTER_RULES
);
1077 i830
->state
.RasterRules
[I830_RASTER_RULES
] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK
|
1078 TRI_FAN_PROVOKE_VRTX_MASK
|
1079 TRI_STRIP_PROVOKE_VRTX_MASK
);
1082 if (ctx
->Light
.ProvokingVertex
== GL_LAST_VERTEX_CONVENTION
) {
1083 i830
->state
.RasterRules
[I830_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1084 TRI_FAN_PROVOKE_VRTX(2) |
1085 TRI_STRIP_PROVOKE_VRTX(2));
1087 i830
->state
.RasterRules
[I830_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1088 TRI_FAN_PROVOKE_VRTX(1) |
1089 TRI_STRIP_PROVOKE_VRTX(0));
1094 i830InitStateFuncs(struct dd_function_table
*functions
)
1096 functions
->AlphaFunc
= i830AlphaFunc
;
1097 functions
->BlendColor
= i830BlendColor
;
1098 functions
->BlendEquationSeparate
= i830BlendEquationSeparate
;
1099 functions
->BlendFuncSeparate
= i830BlendFuncSeparate
;
1100 functions
->ColorMask
= i830ColorMask
;
1101 functions
->CullFace
= i830CullFaceFrontFace
;
1102 functions
->DepthFunc
= i830DepthFunc
;
1103 functions
->DepthMask
= i830DepthMask
;
1104 functions
->Enable
= i830Enable
;
1105 functions
->Fogfv
= i830Fogfv
;
1106 functions
->FrontFace
= i830CullFaceFrontFace
;
1107 functions
->LightModelfv
= i830LightModelfv
;
1108 functions
->LineWidth
= i830LineWidth
;
1109 functions
->LogicOpcode
= i830LogicOp
;
1110 functions
->PointSize
= i830PointSize
;
1111 functions
->PolygonStipple
= i830PolygonStipple
;
1112 functions
->Scissor
= i830Scissor
;
1113 functions
->ShadeModel
= i830ShadeModel
;
1114 functions
->StencilFuncSeparate
= i830StencilFuncSeparate
;
1115 functions
->StencilMaskSeparate
= i830StencilMaskSeparate
;
1116 functions
->StencilOpSeparate
= i830StencilOpSeparate
;
1117 functions
->DepthRange
= i830DepthRange
;
1118 functions
->Viewport
= i830Viewport
;
1122 i830InitState(struct i830_context
*i830
)
1124 GLcontext
*ctx
= &i830
->intel
.ctx
;
1126 i830_init_packets(i830
);
1128 _mesa_init_driver_state(ctx
);
1130 memcpy(&i830
->initial
, &i830
->state
, sizeof(i830
->state
));
1132 i830
->current
= &i830
->state
;
1133 i830
->state
.emitted
= 0;
1134 i830
->state
.active
= (I830_UPLOAD_INVARIENT
|
1135 I830_UPLOAD_RASTER_RULES
|
1136 I830_UPLOAD_TEXBLEND(0) |
1137 I830_UPLOAD_STIPPLE
|
1138 I830_UPLOAD_CTX
| I830_UPLOAD_BUFFERS
);