s/Tungsten Graphics/VMware/
[mesa.git] / src / mesa / drivers / dri / i915 / i830_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/fbobject.h"
34 #include "main/dd.h"
35 #include "main/state.h"
36
37 #include "drivers/common/driverfuncs.h"
38
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_mipmap_tree.h"
42 #include "intel_fbo.h"
43 #include "intel_buffers.h"
44
45 #include "i830_context.h"
46 #include "i830_reg.h"
47
48 #define FILE_DEBUG_FLAG DEBUG_STATE
49
50 static void
51 i830StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
52 GLuint mask)
53 {
54 struct i830_context *i830 = i830_context(ctx);
55 int test = intel_translate_compare_func(func);
56
57 mask = mask & 0xff;
58
59 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
60 _mesa_lookup_enum_by_nr(func), ref, mask);
61
62
63 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
66 STENCIL_TEST_MASK(mask));
67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
68 ENABLE_STENCIL_TEST_FUNC_MASK);
69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
70 ENABLE_STENCIL_TEST_FUNC |
71 STENCIL_REF_VALUE(ref) |
72 STENCIL_TEST_FUNC(test));
73 }
74
75 static void
76 i830StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
77 {
78 struct i830_context *i830 = i830_context(ctx);
79
80 DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
81
82 mask = mask & 0xff;
83
84 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
87 STENCIL_WRITE_MASK(mask));
88 }
89
90 static void
91 i830StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
92 GLenum zpass)
93 {
94 struct i830_context *i830 = i830_context(ctx);
95 int fop, dfop, dpop;
96
97 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
98 _mesa_lookup_enum_by_nr(fail),
99 _mesa_lookup_enum_by_nr(zfail),
100 _mesa_lookup_enum_by_nr(zpass));
101
102 fop = 0;
103 dfop = 0;
104 dpop = 0;
105
106 switch (fail) {
107 case GL_KEEP:
108 fop = STENCILOP_KEEP;
109 break;
110 case GL_ZERO:
111 fop = STENCILOP_ZERO;
112 break;
113 case GL_REPLACE:
114 fop = STENCILOP_REPLACE;
115 break;
116 case GL_INCR:
117 fop = STENCILOP_INCRSAT;
118 break;
119 case GL_DECR:
120 fop = STENCILOP_DECRSAT;
121 break;
122 case GL_INCR_WRAP:
123 fop = STENCILOP_INCR;
124 break;
125 case GL_DECR_WRAP:
126 fop = STENCILOP_DECR;
127 break;
128 case GL_INVERT:
129 fop = STENCILOP_INVERT;
130 break;
131 default:
132 break;
133 }
134 switch (zfail) {
135 case GL_KEEP:
136 dfop = STENCILOP_KEEP;
137 break;
138 case GL_ZERO:
139 dfop = STENCILOP_ZERO;
140 break;
141 case GL_REPLACE:
142 dfop = STENCILOP_REPLACE;
143 break;
144 case GL_INCR:
145 dfop = STENCILOP_INCRSAT;
146 break;
147 case GL_DECR:
148 dfop = STENCILOP_DECRSAT;
149 break;
150 case GL_INCR_WRAP:
151 dfop = STENCILOP_INCR;
152 break;
153 case GL_DECR_WRAP:
154 dfop = STENCILOP_DECR;
155 break;
156 case GL_INVERT:
157 dfop = STENCILOP_INVERT;
158 break;
159 default:
160 break;
161 }
162 switch (zpass) {
163 case GL_KEEP:
164 dpop = STENCILOP_KEEP;
165 break;
166 case GL_ZERO:
167 dpop = STENCILOP_ZERO;
168 break;
169 case GL_REPLACE:
170 dpop = STENCILOP_REPLACE;
171 break;
172 case GL_INCR:
173 dpop = STENCILOP_INCRSAT;
174 break;
175 case GL_DECR:
176 dpop = STENCILOP_DECRSAT;
177 break;
178 case GL_INCR_WRAP:
179 dpop = STENCILOP_INCR;
180 break;
181 case GL_DECR_WRAP:
182 dpop = STENCILOP_DECR;
183 break;
184 case GL_INVERT:
185 dpop = STENCILOP_INVERT;
186 break;
187 default:
188 break;
189 }
190
191
192 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
193 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
194 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
195 STENCIL_FAIL_OP(fop) |
196 STENCIL_PASS_DEPTH_FAIL_OP
197 (dfop) |
198 STENCIL_PASS_DEPTH_PASS_OP
199 (dpop));
200 }
201
202 static void
203 i830AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
204 {
205 struct i830_context *i830 = i830_context(ctx);
206 int test = intel_translate_compare_func(func);
207 GLubyte refByte;
208 GLuint refInt;
209
210 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
211 refInt = (GLuint) refByte;
212
213 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
214 i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
215 i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
216 ENABLE_ALPHA_REF_VALUE |
217 ALPHA_TEST_FUNC(test) |
218 ALPHA_REF_VALUE(refInt));
219 }
220
221 /**
222 * Makes sure that the proper enables are set for LogicOp, Independant Alpha
223 * Blend, and Blending. It needs to be called from numerous places where we
224 * could change the LogicOp or Independant Alpha Blend without subsequent
225 * calls to glEnable.
226 *
227 * \todo
228 * This function is substantially different from the old i830-specific driver.
229 * I'm not sure which is correct.
230 */
231 static void
232 i830EvalLogicOpBlendState(struct gl_context * ctx)
233 {
234 struct i830_context *i830 = i830_context(ctx);
235
236 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
237
238 if (ctx->Color.ColorLogicOpEnabled) {
239 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
240 ENABLE_LOGIC_OP_MASK);
241 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
242 ENABLE_LOGIC_OP);
243 }
244 else if (ctx->Color.BlendEnabled) {
245 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
246 ENABLE_LOGIC_OP_MASK);
247 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
248 DISABLE_LOGIC_OP);
249 }
250 else {
251 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
252 ENABLE_LOGIC_OP_MASK);
253 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
254 DISABLE_LOGIC_OP);
255 }
256 }
257
258 static void
259 i830BlendColor(struct gl_context * ctx, const GLfloat color[4])
260 {
261 struct i830_context *i830 = i830_context(ctx);
262 GLubyte r, g, b, a;
263
264 DBG("%s\n", __FUNCTION__);
265
266 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
267 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
268 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
269 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
270
271 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
272 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
273 (a << 24) | (r << 16) | (g << 8) | b;
274 }
275
276 /**
277 * Sets both the blend equation (called "function" in i830 docs) and the
278 * blend function (called "factor" in i830 docs). This is done in a single
279 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
280 * change the interpretation of the blend function.
281 */
282 static void
283 i830_set_blend_state(struct gl_context * ctx)
284 {
285 struct i830_context *i830 = i830_context(ctx);
286 int funcA;
287 int funcRGB;
288 int eqnA;
289 int eqnRGB;
290 int iab;
291 int s1;
292
293
294 funcRGB =
295 SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcRGB))
296 | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstRGB));
297
298 switch (ctx->Color.Blend[0].EquationRGB) {
299 case GL_FUNC_ADD:
300 eqnRGB = BLENDFUNC_ADD;
301 break;
302 case GL_MIN:
303 eqnRGB = BLENDFUNC_MIN;
304 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
305 break;
306 case GL_MAX:
307 eqnRGB = BLENDFUNC_MAX;
308 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
309 break;
310 case GL_FUNC_SUBTRACT:
311 eqnRGB = BLENDFUNC_SUB;
312 break;
313 case GL_FUNC_REVERSE_SUBTRACT:
314 eqnRGB = BLENDFUNC_RVRSE_SUB;
315 break;
316 default:
317 fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
318 __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB);
319 return;
320 }
321
322
323 funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcA))
324 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstA));
325
326 switch (ctx->Color.Blend[0].EquationA) {
327 case GL_FUNC_ADD:
328 eqnA = BLENDFUNC_ADD;
329 break;
330 case GL_MIN:
331 eqnA = BLENDFUNC_MIN;
332 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
333 break;
334 case GL_MAX:
335 eqnA = BLENDFUNC_MAX;
336 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
337 break;
338 case GL_FUNC_SUBTRACT:
339 eqnA = BLENDFUNC_SUB;
340 break;
341 case GL_FUNC_REVERSE_SUBTRACT:
342 eqnA = BLENDFUNC_RVRSE_SUB;
343 break;
344 default:
345 fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
346 __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA);
347 return;
348 }
349
350 iab = eqnA | funcA
351 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
352 | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
353 | ENABLE_ALPHA_BLENDFUNC;
354 s1 = eqnRGB | funcRGB
355 | _3DSTATE_MODES_1_CMD
356 | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
357 | ENABLE_COLR_BLND_FUNC;
358
359 if ((eqnA | funcA) != (eqnRGB | funcRGB))
360 iab |= ENABLE_INDPT_ALPHA_BLEND;
361 else
362 iab |= DISABLE_INDPT_ALPHA_BLEND;
363
364 if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
365 s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
366 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
367 i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
368 i830->state.Ctx[I830_CTXREG_STATE1] = s1;
369 }
370
371 /* This will catch a logicop blend equation. It will also ensure
372 * independant alpha blend is really in the correct state (either enabled
373 * or disabled) if blending is already enabled.
374 */
375
376 i830EvalLogicOpBlendState(ctx);
377
378 if (0) {
379 fprintf(stderr,
380 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
381 __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
382 i830->state.Ctx[I830_CTXREG_IALPHAB],
383 (ctx->Color.BlendEnabled) ? "en" : "dis");
384 }
385 }
386
387
388 static void
389 i830BlendEquationSeparate(struct gl_context * ctx, GLenum modeRGB, GLenum modeA)
390 {
391 DBG("%s -> %s, %s\n", __FUNCTION__,
392 _mesa_lookup_enum_by_nr(modeRGB),
393 _mesa_lookup_enum_by_nr(modeA));
394
395 (void) modeRGB;
396 (void) modeA;
397 i830_set_blend_state(ctx);
398 }
399
400
401 static void
402 i830BlendFuncSeparate(struct gl_context * ctx, GLenum sfactorRGB,
403 GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
404 {
405 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
406 _mesa_lookup_enum_by_nr(sfactorRGB),
407 _mesa_lookup_enum_by_nr(dfactorRGB),
408 _mesa_lookup_enum_by_nr(sfactorA),
409 _mesa_lookup_enum_by_nr(dfactorA));
410
411 (void) sfactorRGB;
412 (void) dfactorRGB;
413 (void) sfactorA;
414 (void) dfactorA;
415 i830_set_blend_state(ctx);
416 }
417
418
419
420 static void
421 i830DepthFunc(struct gl_context * ctx, GLenum func)
422 {
423 struct i830_context *i830 = i830_context(ctx);
424 int test = intel_translate_compare_func(func);
425
426 DBG("%s\n", __FUNCTION__);
427
428 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
429 i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
430 i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
431 DEPTH_TEST_FUNC(test));
432 }
433
434 static void
435 i830DepthMask(struct gl_context * ctx, GLboolean flag)
436 {
437 struct i830_context *i830 = i830_context(ctx);
438
439 DBG("%s flag (%d)\n", __FUNCTION__, flag);
440
441 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
442 flag = false;
443
444 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
445
446 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
447
448 if (flag && ctx->Depth.Test)
449 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
450 else
451 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
452 }
453
454 /** Called from ctx->Driver.DepthRange() */
455 static void
456 i830DepthRange(struct gl_context *ctx)
457 {
458 intelCalcViewport(ctx);
459 }
460
461 /* =============================================================
462 * Polygon stipple
463 *
464 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
465 * Fortunately stipple is usually a repeating pattern.
466 */
467 static void
468 i830PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
469 {
470 struct i830_context *i830 = i830_context(ctx);
471 const GLubyte *m;
472 GLubyte p[4];
473 int i, j, k;
474 int active = (ctx->Polygon.StippleFlag &&
475 i830->intel.reduced_primitive == GL_TRIANGLES);
476 GLuint newMask;
477
478 if (active) {
479 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
480 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
481 }
482
483 /* Use the already unpacked stipple data from the context rather than the
484 * uninterpreted mask passed in.
485 */
486 mask = (const GLubyte *)ctx->PolygonStipple;
487 m = mask;
488
489 p[0] = mask[12] & 0xf;
490 p[0] |= p[0] << 4;
491 p[1] = mask[8] & 0xf;
492 p[1] |= p[1] << 4;
493 p[2] = mask[4] & 0xf;
494 p[2] |= p[2] << 4;
495 p[3] = mask[0] & 0xf;
496 p[3] |= p[3] << 4;
497
498 for (k = 0; k < 8; k++)
499 for (j = 3; j >= 0; j--)
500 for (i = 0; i < 4; i++, m++)
501 if (*m != p[j]) {
502 i830->intel.hw_stipple = 0;
503 return;
504 }
505
506 newMask = (((p[0] & 0xf) << 0) |
507 ((p[1] & 0xf) << 4) |
508 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
509
510
511 if (newMask == 0xffff || newMask == 0x0) {
512 /* this is needed to make conform pass */
513 i830->intel.hw_stipple = 0;
514 return;
515 }
516
517 i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
518 i830->state.Stipple[I830_STPREG_ST1] |= newMask;
519 i830->intel.hw_stipple = 1;
520
521 if (active)
522 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
523 }
524
525
526 /* =============================================================
527 * Hardware clipping
528 */
529 static void
530 i830Scissor(struct gl_context * ctx)
531 {
532 struct i830_context *i830 = i830_context(ctx);
533 int x1, y1, x2, y2;
534
535 if (!ctx->DrawBuffer)
536 return;
537
538 DBG("%s %d,%d %dx%d\n", __FUNCTION__,
539 ctx->Scissor.X, ctx->Scissor.Y,
540 ctx->Scissor.Width, ctx->Scissor.Height);
541
542 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
543 x1 = ctx->Scissor.X;
544 y1 = ctx->DrawBuffer->Height - (ctx->Scissor.Y + ctx->Scissor.Height);
545 x2 = ctx->Scissor.X + ctx->Scissor.Width - 1;
546 y2 = y1 + ctx->Scissor.Height - 1;
547 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
548 }
549 else {
550 /* FBO - not inverted
551 */
552 x1 = ctx->Scissor.X;
553 y1 = ctx->Scissor.Y;
554 x2 = ctx->Scissor.X + ctx->Scissor.Width - 1;
555 y2 = ctx->Scissor.Y + ctx->Scissor.Height - 1;
556 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
557 }
558
559 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
560 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
561 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
562 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
563
564 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
565
566 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
567 i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
568 i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
569 }
570
571 static void
572 i830LogicOp(struct gl_context * ctx, GLenum opcode)
573 {
574 struct i830_context *i830 = i830_context(ctx);
575 int tmp = intel_translate_logic_op(opcode);
576
577 DBG("%s\n", __FUNCTION__);
578
579 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
580 i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
581 i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
582 }
583
584
585
586 static void
587 i830CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
588 {
589 struct i830_context *i830 = i830_context(ctx);
590 GLuint mode;
591
592 DBG("%s\n", __FUNCTION__);
593
594 if (!ctx->Polygon.CullFlag) {
595 mode = CULLMODE_NONE;
596 }
597 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
598 mode = CULLMODE_CW;
599
600 if (ctx->Polygon.CullFaceMode == GL_FRONT)
601 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
602 if (ctx->Polygon.FrontFace != GL_CCW)
603 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
604 }
605 else {
606 mode = CULLMODE_BOTH;
607 }
608
609 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
610 i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
611 i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
612 }
613
614 static void
615 i830LineWidth(struct gl_context * ctx, GLfloat widthf)
616 {
617 struct i830_context *i830 = i830_context(ctx);
618 int width;
619 int state5;
620
621 DBG("%s\n", __FUNCTION__);
622
623 width = (int) (widthf * 2);
624 width = CLAMP(width, 1, 15);
625
626 state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
627 state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
628
629 if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
630 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
631 i830->state.Ctx[I830_CTXREG_STATE5] = state5;
632 }
633 }
634
635 static void
636 i830PointSize(struct gl_context * ctx, GLfloat size)
637 {
638 struct i830_context *i830 = i830_context(ctx);
639 GLint point_size = (int) size;
640
641 DBG("%s\n", __FUNCTION__);
642
643 point_size = CLAMP(point_size, 1, 256);
644 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
645 i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
646 i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
647 FIXED_POINT_WIDTH(point_size));
648 }
649
650
651 /* =============================================================
652 * Color masks
653 */
654
655 static void
656 i830ColorMask(struct gl_context * ctx,
657 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
658 {
659 struct i830_context *i830 = i830_context(ctx);
660 GLuint tmp = 0;
661
662 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
663
664 tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
665 ENABLE_COLOR_MASK |
666 ENABLE_COLOR_WRITE |
667 ((!r) << WRITEMASK_RED_SHIFT) |
668 ((!g) << WRITEMASK_GREEN_SHIFT) |
669 ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
670
671 if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
672 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
673 i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
674 }
675 }
676
677 static void
678 update_specular(struct gl_context * ctx)
679 {
680 struct i830_context *i830 = i830_context(ctx);
681
682 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
683 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
684
685 if (_mesa_need_secondary_color(ctx))
686 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
687 else
688 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
689 }
690
691 static void
692 i830LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
693 {
694 DBG("%s\n", __FUNCTION__);
695
696 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
697 update_specular(ctx);
698 }
699 }
700
701 /* In Mesa 3.5 we can reliably do native flatshading.
702 */
703 static void
704 i830ShadeModel(struct gl_context * ctx, GLenum mode)
705 {
706 struct i830_context *i830 = i830_context(ctx);
707 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
708
709
710 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
711
712 i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
713
714 if (mode == GL_FLAT) {
715 i830->state.Ctx[I830_CTXREG_STATE3] |=
716 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
717 | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
718 COLOR_SHADE_MODE(SHADE_MODE_FLAT));
719 }
720 else {
721 i830->state.Ctx[I830_CTXREG_STATE3] |=
722 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
723 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
724 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
725 COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
726 }
727 }
728
729 /* =============================================================
730 * Fog
731 */
732 static void
733 i830Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
734 {
735 struct i830_context *i830 = i830_context(ctx);
736
737 DBG("%s\n", __FUNCTION__);
738
739 if (pname == GL_FOG_COLOR) {
740 GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
741 ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
742 ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
743
744 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
745 i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
746 (_3DSTATE_FOG_COLOR_CMD | color);
747 }
748 }
749
750 /* =============================================================
751 */
752
753 static void
754 i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
755 {
756 struct i830_context *i830 = i830_context(ctx);
757
758 switch (cap) {
759 case GL_LIGHTING:
760 case GL_COLOR_SUM:
761 update_specular(ctx);
762 break;
763
764 case GL_ALPHA_TEST:
765 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
766 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
767 if (state)
768 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
769 else
770 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
771
772 break;
773
774 case GL_BLEND:
775 i830EvalLogicOpBlendState(ctx);
776 break;
777
778 case GL_COLOR_LOGIC_OP:
779 i830EvalLogicOpBlendState(ctx);
780
781 /* Logicop doesn't seem to work at 16bpp:
782 */
783 if (i830->intel.ctx.Visual.rgbBits == 16)
784 FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
785 break;
786
787 case GL_DITHER:
788 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
789 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
790
791 if (state)
792 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
793 else
794 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
795 break;
796
797 case GL_DEPTH_TEST:
798 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
799 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
800
801 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
802 state = false;
803
804 if (state)
805 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
806 else
807 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
808
809 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
810 */
811 i830DepthMask(ctx, ctx->Depth.Mask);
812 break;
813
814 case GL_SCISSOR_TEST:
815 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
816
817 if (state)
818 i830->state.Buffer[I830_DESTREG_SENABLE] =
819 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
820 else
821 i830->state.Buffer[I830_DESTREG_SENABLE] =
822 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
823
824 break;
825
826 case GL_LINE_SMOOTH:
827 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
828
829 i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
830 if (state)
831 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
832 else
833 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
834 break;
835
836 case GL_FOG:
837 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
838 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
839 if (state)
840 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
841 else
842 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
843 break;
844
845 case GL_CULL_FACE:
846 i830CullFaceFrontFace(ctx, 0);
847 break;
848
849 case GL_TEXTURE_2D:
850 break;
851
852 case GL_STENCIL_TEST:
853 {
854 bool hw_stencil = false;
855 if (ctx->DrawBuffer) {
856 struct intel_renderbuffer *irbStencil
857 = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
858 hw_stencil = (irbStencil && irbStencil->mt);
859 }
860 if (hw_stencil) {
861 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
862
863 if (state) {
864 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
865 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
866 }
867 else {
868 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
869 i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
870 ~ENABLE_STENCIL_WRITE;
871 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
872 i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
873 DISABLE_STENCIL_WRITE;
874 }
875 }
876 else {
877 FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
878 }
879 }
880 break;
881
882 case GL_POLYGON_STIPPLE:
883 /* The stipple command worked on my 855GM box, but not my 845G.
884 * I'll do more testing later to find out exactly which hardware
885 * supports it. Disabled for now.
886 */
887 if (i830->intel.hw_stipple &&
888 i830->intel.reduced_primitive == GL_TRIANGLES) {
889 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
890 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
891 if (state)
892 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
893 }
894 break;
895
896 default:
897 ;
898 }
899 }
900
901
902 static void
903 i830_init_packets(struct i830_context *i830)
904 {
905 /* Zero all state */
906 memset(&i830->state, 0, sizeof(i830->state));
907
908 /* Set default blend state */
909 i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
910 TEXPIPE_COLOR |
911 ENABLE_TEXOUTPUT_WRT_SEL |
912 TEXOP_OUTPUT_CURRENT |
913 DISABLE_TEX_CNTRL_STAGE |
914 TEXOP_SCALE_1X |
915 TEXOP_MODIFY_PARMS |
916 TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
917 i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
918 TEXPIPE_ALPHA |
919 ENABLE_TEXOUTPUT_WRT_SEL |
920 TEXOP_OUTPUT_CURRENT |
921 TEXOP_SCALE_1X |
922 TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
923 i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
924 TEXPIPE_COLOR |
925 TEXBLEND_ARG1 |
926 TEXBLENDARG_MODIFY_PARMS |
927 TEXBLENDARG_DIFFUSE);
928 i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
929 TEXPIPE_ALPHA |
930 TEXBLEND_ARG1 |
931 TEXBLENDARG_MODIFY_PARMS |
932 TEXBLENDARG_DIFFUSE);
933
934 i830->state.TexBlendWordsUsed[0] = 4;
935
936
937 i830->state.Ctx[I830_CTXREG_VF] = 0;
938 i830->state.Ctx[I830_CTXREG_VF2] = 0;
939
940 i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
941 AA_LINE_ECAAR_WIDTH_ENABLE |
942 AA_LINE_ECAAR_WIDTH_1_0 |
943 AA_LINE_REGION_WIDTH_ENABLE |
944 AA_LINE_REGION_WIDTH_1_0 |
945 AA_LINE_DISABLE);
946
947 i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
948 DISABLE_LOGIC_OP |
949 DISABLE_STENCIL_TEST |
950 DISABLE_DEPTH_BIAS |
951 DISABLE_SPEC_ADD |
952 DISABLE_FOG |
953 DISABLE_ALPHA_TEST |
954 DISABLE_COLOR_BLEND |
955 DISABLE_DEPTH_TEST);
956
957 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
958 if (i830->intel.hw_stencil) {
959 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
960 ENABLE_STENCIL_WRITE |
961 ENABLE_TEX_CACHE |
962 ENABLE_DITHER |
963 ENABLE_COLOR_MASK |
964 /* set no color comps disabled */
965 ENABLE_COLOR_WRITE |
966 ENABLE_DEPTH_WRITE);
967 }
968 else
969 #endif
970 {
971 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
972 DISABLE_STENCIL_WRITE |
973 ENABLE_TEX_CACHE |
974 ENABLE_DITHER |
975 ENABLE_COLOR_MASK |
976 /* set no color comps disabled */
977 ENABLE_COLOR_WRITE |
978 ENABLE_DEPTH_WRITE);
979 }
980
981 i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
982 ENABLE_COLR_BLND_FUNC |
983 BLENDFUNC_ADD |
984 ENABLE_SRC_BLND_FACTOR |
985 SRC_BLND_FACT(BLENDFACT_ONE) |
986 ENABLE_DST_BLND_FACTOR |
987 DST_BLND_FACT(BLENDFACT_ZERO));
988
989 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
990 ENABLE_GLOBAL_DEPTH_BIAS |
991 GLOBAL_DEPTH_BIAS(0) |
992 ENABLE_ALPHA_TEST_FUNC |
993 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
994 | ALPHA_REF_VALUE(0));
995
996 i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
997 ENABLE_DEPTH_TEST_FUNC |
998 DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
999 ENABLE_ALPHA_SHADE_MODE |
1000 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
1001 | ENABLE_FOG_SHADE_MODE |
1002 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
1003 ENABLE_SPEC_SHADE_MODE |
1004 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
1005 ENABLE_COLOR_SHADE_MODE |
1006 COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
1007 | ENABLE_CULL_MODE | CULLMODE_NONE);
1008
1009 i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1010 ENABLE_LOGIC_OP_FUNC |
1011 LOGIC_OP_FUNC(LOGICOP_COPY) |
1012 ENABLE_STENCIL_TEST_MASK |
1013 STENCIL_TEST_MASK(0xff) |
1014 ENABLE_STENCIL_WRITE_MASK |
1015 STENCIL_WRITE_MASK(0xff));
1016
1017 i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
1018 ENABLE_STENCIL_PARMS |
1019 STENCIL_FAIL_OP(STENCILOP_KEEP)
1020 |
1021 STENCIL_PASS_DEPTH_FAIL_OP
1022 (STENCILOP_KEEP) |
1023 STENCIL_PASS_DEPTH_PASS_OP
1024 (STENCILOP_KEEP) |
1025 ENABLE_STENCIL_TEST_FUNC |
1026 STENCIL_TEST_FUNC
1027 (COMPAREFUNC_ALWAYS) |
1028 ENABLE_STENCIL_REF_VALUE |
1029 STENCIL_REF_VALUE(0));
1030
1031 i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1032 ENABLE_FIXED_POINT_WIDTH |
1033 FIXED_POINT_WIDTH(1));
1034
1035 i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1036 DISABLE_INDPT_ALPHA_BLEND |
1037 ENABLE_ALPHA_BLENDFUNC |
1038 ABLENDFUNC_ADD);
1039
1040 i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1041 FOG_COLOR_RED(0) |
1042 FOG_COLOR_GREEN(0) |
1043 FOG_COLOR_BLUE(0));
1044
1045 i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1046 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1047
1048 i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1049 i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1050 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1051 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1052 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1053
1054 i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD |
1055 ENABLE_POINT_RASTER_RULE |
1056 OGL_POINT_RASTER_RULE |
1057 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1058 ENABLE_TRI_FAN_PROVOKE_VRTX |
1059 ENABLE_TRI_STRIP_PROVOKE_VRTX |
1060 LINE_STRIP_PROVOKE_VRTX(1) |
1061 TRI_FAN_PROVOKE_VRTX(2) |
1062 TRI_STRIP_PROVOKE_VRTX(2));
1063
1064
1065 i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1066
1067 i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1068 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1069 DISABLE_SCISSOR_RECT);
1070 i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1071 i830->state.Buffer[I830_DESTREG_SR1] = 0;
1072 i830->state.Buffer[I830_DESTREG_SR2] = 0;
1073 }
1074
1075 void
1076 i830_update_provoking_vertex(struct gl_context * ctx)
1077 {
1078 struct i830_context *i830 = i830_context(ctx);
1079
1080 I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
1081 i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1082 TRI_FAN_PROVOKE_VRTX_MASK |
1083 TRI_STRIP_PROVOKE_VRTX_MASK);
1084
1085 /* _NEW_LIGHT */
1086 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1087 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1088 TRI_FAN_PROVOKE_VRTX(2) |
1089 TRI_STRIP_PROVOKE_VRTX(2));
1090 } else {
1091 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1092 TRI_FAN_PROVOKE_VRTX(1) |
1093 TRI_STRIP_PROVOKE_VRTX(0));
1094 }
1095 }
1096
1097 /* Fallback to swrast for select and feedback.
1098 */
1099 static void
1100 i830RenderMode(struct gl_context *ctx, GLenum mode)
1101 {
1102 struct intel_context *intel = intel_context(ctx);
1103 FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
1104 }
1105
1106 void
1107 i830InitStateFuncs(struct dd_function_table *functions)
1108 {
1109 functions->AlphaFunc = i830AlphaFunc;
1110 functions->BlendColor = i830BlendColor;
1111 functions->BlendEquationSeparate = i830BlendEquationSeparate;
1112 functions->BlendFuncSeparate = i830BlendFuncSeparate;
1113 functions->ColorMask = i830ColorMask;
1114 functions->CullFace = i830CullFaceFrontFace;
1115 functions->DepthFunc = i830DepthFunc;
1116 functions->DepthMask = i830DepthMask;
1117 functions->Enable = i830Enable;
1118 functions->Fogfv = i830Fogfv;
1119 functions->FrontFace = i830CullFaceFrontFace;
1120 functions->LightModelfv = i830LightModelfv;
1121 functions->LineWidth = i830LineWidth;
1122 functions->LogicOpcode = i830LogicOp;
1123 functions->PointSize = i830PointSize;
1124 functions->PolygonStipple = i830PolygonStipple;
1125 functions->RenderMode = i830RenderMode;
1126 functions->Scissor = i830Scissor;
1127 functions->ShadeModel = i830ShadeModel;
1128 functions->StencilFuncSeparate = i830StencilFuncSeparate;
1129 functions->StencilMaskSeparate = i830StencilMaskSeparate;
1130 functions->StencilOpSeparate = i830StencilOpSeparate;
1131 functions->DepthRange = i830DepthRange;
1132 }
1133
1134 void
1135 i830InitState(struct i830_context *i830)
1136 {
1137 struct gl_context *ctx = &i830->intel.ctx;
1138
1139 i830_init_packets(i830);
1140
1141 _mesa_init_driver_state(ctx);
1142
1143 i830->state.emitted = 0;
1144 i830->state.active = (I830_UPLOAD_INVARIENT |
1145 I830_UPLOAD_RASTER_RULES |
1146 I830_UPLOAD_TEXBLEND(0) |
1147 I830_UPLOAD_STIPPLE |
1148 I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1149 }