src/mesa/drivers/dri/i915/i830_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34
  35 #include "texmem.h"
  36
  37 #include "drivers/common/driverfuncs.h"
  38
  39 #include "intel_screen.h"
  40 #include "intel_batchbuffer.h"
  41 #include "intel_fbo.h"
  42
  43 #include "i830_context.h"
  44 #include "i830_reg.h"
  45
  46 #define FILE_DEBUG_FLAG DEBUG_STATE
  47
  48 static void
  49 i830StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  50                         GLuint mask)
  51 {
  52    struct i830_context *i830 = i830_context(ctx);
  53    int test = intel_translate_compare_func(func);
  54
  55    mask = mask & 0xff;
  56
  57    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  58        _mesa_lookup_enum_by_nr(func), ref, mask);
  59
  60
  61    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  62    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  63    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  64                                            STENCIL_TEST_MASK(mask));
  65    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
  66                                                 ENABLE_STENCIL_TEST_FUNC_MASK);
  67    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
  68                                                ENABLE_STENCIL_TEST_FUNC |
  69                                                STENCIL_REF_VALUE(ref) |
  70                                                STENCIL_TEST_FUNC(test));
  71 }
  72
  73 static void
  74 i830StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  75 {
  76    struct i830_context *i830 = i830_context(ctx);
  77
  78    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  79
  80    mask = mask & 0xff;
  81
  82    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  83    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  84    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  85                                            STENCIL_WRITE_MASK(mask));
  86 }
  87
  88 static void
  89 i830StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  90                       GLenum zpass)
  91 {
  92    struct i830_context *i830 = i830_context(ctx);
  93    int fop, dfop, dpop;
  94
  95    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
  96        _mesa_lookup_enum_by_nr(fail),
  97        _mesa_lookup_enum_by_nr(zfail),
  98        _mesa_lookup_enum_by_nr(zpass));
  99
 100    fop = 0;
 101    dfop = 0;
 102    dpop = 0;
 103
 104    switch (fail) {
 105    case GL_KEEP:
 106       fop = STENCILOP_KEEP;
 107       break;
 108    case GL_ZERO:
 109       fop = STENCILOP_ZERO;
 110       break;
 111    case GL_REPLACE:
 112       fop = STENCILOP_REPLACE;
 113       break;
 114    case GL_INCR:
 115       fop = STENCILOP_INCRSAT;
 116       break;
 117    case GL_DECR:
 118       fop = STENCILOP_DECRSAT;
 119       break;
 120    case GL_INCR_WRAP:
 121       fop = STENCILOP_INCR;
 122       break;
 123    case GL_DECR_WRAP:
 124       fop = STENCILOP_DECR;
 125       break;
 126    case GL_INVERT:
 127       fop = STENCILOP_INVERT;
 128       break;
 129    default:
 130       break;
 131    }
 132    switch (zfail) {
 133    case GL_KEEP:
 134       dfop = STENCILOP_KEEP;
 135       break;
 136    case GL_ZERO:
 137       dfop = STENCILOP_ZERO;
 138       break;
 139    case GL_REPLACE:
 140       dfop = STENCILOP_REPLACE;
 141       break;
 142    case GL_INCR:
 143       dfop = STENCILOP_INCRSAT;
 144       break;
 145    case GL_DECR:
 146       dfop = STENCILOP_DECRSAT;
 147       break;
 148    case GL_INCR_WRAP:
 149       dfop = STENCILOP_INCR;
 150       break;
 151    case GL_DECR_WRAP:
 152       dfop = STENCILOP_DECR;
 153       break;
 154    case GL_INVERT:
 155       dfop = STENCILOP_INVERT;
 156       break;
 157    default:
 158       break;
 159    }
 160    switch (zpass) {
 161    case GL_KEEP:
 162       dpop = STENCILOP_KEEP;
 163       break;
 164    case GL_ZERO:
 165       dpop = STENCILOP_ZERO;
 166       break;
 167    case GL_REPLACE:
 168       dpop = STENCILOP_REPLACE;
 169       break;
 170    case GL_INCR:
 171       dpop = STENCILOP_INCRSAT;
 172       break;
 173    case GL_DECR:
 174       dpop = STENCILOP_DECRSAT;
 175       break;
 176    case GL_INCR_WRAP:
 177       dpop = STENCILOP_INCR;
 178       break;
 179    case GL_DECR_WRAP:
 180       dpop = STENCILOP_DECR;
 181       break;
 182    case GL_INVERT:
 183       dpop = STENCILOP_INVERT;
 184       break;
 185    default:
 186       break;
 187    }
 188
 189
 190    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 191    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
 192    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
 193                                                STENCIL_FAIL_OP(fop) |
 194                                                STENCIL_PASS_DEPTH_FAIL_OP
 195                                                (dfop) |
 196                                                STENCIL_PASS_DEPTH_PASS_OP
 197                                                (dpop));
 198 }
 199
 200 static void
 201 i830AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 202 {
 203    struct i830_context *i830 = i830_context(ctx);
 204    int test = intel_translate_compare_func(func);
 205    GLubyte refByte;
 206    GLuint refInt;
 207
 208    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 209    refInt = (GLuint) refByte;
 210
 211    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 212    i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
 213    i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
 214                                            ENABLE_ALPHA_REF_VALUE |
 215                                            ALPHA_TEST_FUNC(test) |
 216                                            ALPHA_REF_VALUE(refInt));
 217 }
 218
 219 /**
 220  * Makes sure that the proper enables are set for LogicOp, Independant Alpha
 221  * Blend, and Blending.  It needs to be called from numerous places where we
 222  * could change the LogicOp or Independant Alpha Blend without subsequent
 223  * calls to glEnable.
 224  *
 225  * \todo
 226  * This function is substantially different from the old i830-specific driver.
 227  * I'm not sure which is correct.
 228  */
 229 static void
 230 i830EvalLogicOpBlendState(GLcontext * ctx)
 231 {
 232    struct i830_context *i830 = i830_context(ctx);
 233
 234    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 235
 236    if (RGBA_LOGICOP_ENABLED(ctx)) {
 237       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 238                                                   ENABLE_LOGIC_OP_MASK);
 239       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 240                                                  ENABLE_LOGIC_OP);
 241    }
 242    else if (ctx->Color.BlendEnabled) {
 243       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 244                                                   ENABLE_LOGIC_OP_MASK);
 245       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
 246                                                  DISABLE_LOGIC_OP);
 247    }
 248    else {
 249       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 250                                                   ENABLE_LOGIC_OP_MASK);
 251       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 252                                                  DISABLE_LOGIC_OP);
 253    }
 254 }
 255
 256 static void
 257 i830BlendColor(GLcontext * ctx, const GLfloat color[4])
 258 {
 259    struct i830_context *i830 = i830_context(ctx);
 260    GLubyte r, g, b, a;
 261
 262    DBG("%s\n", __FUNCTION__);
 263
 264    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 265    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 266    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 267    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 268
 269    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 270    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
 271       (a << 24) | (r << 16) | (g << 8) | b;
 272 }
 273
 274 /**
 275  * Sets both the blend equation (called "function" in i830 docs) and the
 276  * blend function (called "factor" in i830 docs).  This is done in a single
 277  * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
 278  * change the interpretation of the blend function.
 279  */
 280 static void
 281 i830_set_blend_state(GLcontext * ctx)
 282 {
 283    struct i830_context *i830 = i830_context(ctx);
 284    int funcA;
 285    int funcRGB;
 286    int eqnA;
 287    int eqnRGB;
 288    int iab;
 289    int s1;
 290
 291
 292    funcRGB =
 293       SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcRGB))
 294       | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstRGB));
 295
 296    switch (ctx->Color.BlendEquationRGB) {
 297    case GL_FUNC_ADD:
 298       eqnRGB = BLENDFUNC_ADD;
 299       break;
 300    case GL_MIN:
 301       eqnRGB = BLENDFUNC_MIN;
 302       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 303       break;
 304    case GL_MAX:
 305       eqnRGB = BLENDFUNC_MAX;
 306       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 307       break;
 308    case GL_FUNC_SUBTRACT:
 309       eqnRGB = BLENDFUNC_SUB;
 310       break;
 311    case GL_FUNC_REVERSE_SUBTRACT:
 312       eqnRGB = BLENDFUNC_RVRSE_SUB;
 313       break;
 314    default:
 315       fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
 316               __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
 317       return;
 318    }
 319
 320
 321    funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcA))
 322       | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstA));
 323
 324    switch (ctx->Color.BlendEquationA) {
 325    case GL_FUNC_ADD:
 326       eqnA = BLENDFUNC_ADD;
 327       break;
 328    case GL_MIN:
 329       eqnA = BLENDFUNC_MIN;
 330       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 331       break;
 332    case GL_MAX:
 333       eqnA = BLENDFUNC_MAX;
 334       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 335       break;
 336    case GL_FUNC_SUBTRACT:
 337       eqnA = BLENDFUNC_SUB;
 338       break;
 339    case GL_FUNC_REVERSE_SUBTRACT:
 340       eqnA = BLENDFUNC_RVRSE_SUB;
 341       break;
 342    default:
 343       fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
 344               __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
 345       return;
 346    }
 347
 348    iab = eqnA | funcA
 349       | _3DSTATE_INDPT_ALPHA_BLEND_CMD
 350       | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
 351       | ENABLE_ALPHA_BLENDFUNC;
 352    s1 = eqnRGB | funcRGB
 353       | _3DSTATE_MODES_1_CMD
 354       | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
 355       | ENABLE_COLR_BLND_FUNC;
 356
 357    if ((eqnA | funcA) != (eqnRGB | funcRGB))
 358       iab |= ENABLE_INDPT_ALPHA_BLEND;
 359    else
 360       iab |= DISABLE_INDPT_ALPHA_BLEND;
 361
 362    if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
 363        s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
 364       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 365       i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
 366       i830->state.Ctx[I830_CTXREG_STATE1] = s1;
 367    }
 368
 369    /* This will catch a logicop blend equation.  It will also ensure
 370     * independant alpha blend is really in the correct state (either enabled
 371     * or disabled) if blending is already enabled.
 372     */
 373
 374    i830EvalLogicOpBlendState(ctx);
 375
 376    if (0) {
 377       fprintf(stderr,
 378               "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
 379               __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
 380               i830->state.Ctx[I830_CTXREG_IALPHAB],
 381               (ctx->Color.BlendEnabled) ? "en" : "dis");
 382    }
 383 }
 384
 385
 386 static void
 387 i830BlendEquationSeparate(GLcontext * ctx, GLenum modeRGB, GLenum modeA)
 388 {
 389    DBG("%s -> %s, %s\n", __FUNCTION__,
 390        _mesa_lookup_enum_by_nr(modeRGB),
 391        _mesa_lookup_enum_by_nr(modeA));
 392
 393    (void) modeRGB;
 394    (void) modeA;
 395    i830_set_blend_state(ctx);
 396 }
 397
 398
 399 static void
 400 i830BlendFuncSeparate(GLcontext * ctx, GLenum sfactorRGB,
 401                       GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
 402 {
 403    DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
 404        _mesa_lookup_enum_by_nr(sfactorRGB),
 405        _mesa_lookup_enum_by_nr(dfactorRGB),
 406        _mesa_lookup_enum_by_nr(sfactorA),
 407        _mesa_lookup_enum_by_nr(dfactorA));
 408
 409    (void) sfactorRGB;
 410    (void) dfactorRGB;
 411    (void) sfactorA;
 412    (void) dfactorA;
 413    i830_set_blend_state(ctx);
 414 }
 415
 416
 417
 418 static void
 419 i830DepthFunc(GLcontext * ctx, GLenum func)
 420 {
 421    struct i830_context *i830 = i830_context(ctx);
 422    int test = intel_translate_compare_func(func);
 423
 424    DBG("%s\n", __FUNCTION__);
 425
 426    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 427    i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
 428    i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
 429                                            DEPTH_TEST_FUNC(test));
 430 }
 431
 432 static void
 433 i830DepthMask(GLcontext * ctx, GLboolean flag)
 434 {
 435    struct i830_context *i830 = i830_context(ctx);
 436
 437    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 438
 439    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 440
 441    i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
 442
 443    if (flag && ctx->Depth.Test)
 444       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
 445    else
 446       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
 447 }
 448
 449 /* =============================================================
 450  * Polygon stipple
 451  *
 452  * The i830 supports a 4x4 stipple natively, GL wants 32x32.
 453  * Fortunately stipple is usually a repeating pattern.
 454  */
 455 static void
 456 i830PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 457 {
 458    struct i830_context *i830 = i830_context(ctx);
 459    const GLubyte *m = mask;
 460    GLubyte p[4];
 461    int i, j, k;
 462    int active = (ctx->Polygon.StippleFlag &&
 463                  i830->intel.reduced_primitive == GL_TRIANGLES);
 464    GLuint newMask;
 465
 466    if (active) {
 467       I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 468       i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 469    }
 470
 471    p[0] = mask[12] & 0xf;
 472    p[0] |= p[0] << 4;
 473    p[1] = mask[8] & 0xf;
 474    p[1] |= p[1] << 4;
 475    p[2] = mask[4] & 0xf;
 476    p[2] |= p[2] << 4;
 477    p[3] = mask[0] & 0xf;
 478    p[3] |= p[3] << 4;
 479
 480    for (k = 0; k < 8; k++)
 481       for (j = 3; j >= 0; j--)
 482          for (i = 0; i < 4; i++, m++)
 483             if (*m != p[j]) {
 484                i830->intel.hw_stipple = 0;
 485                return;
 486             }
 487
 488    newMask = (((p[0] & 0xf) << 0) |
 489               ((p[1] & 0xf) << 4) |
 490               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 491
 492
 493    if (newMask == 0xffff || newMask == 0x0) {
 494       /* this is needed to make conform pass */
 495       i830->intel.hw_stipple = 0;
 496       return;
 497    }
 498
 499    i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
 500    i830->state.Stipple[I830_STPREG_ST1] |= newMask;
 501    i830->intel.hw_stipple = 1;
 502
 503    if (active)
 504       i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 505 }
 506
 507
 508 /* =============================================================
 509  * Hardware clipping
 510  */
 511 static void
 512 i830Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 513 {
 514    struct i830_context *i830 = i830_context(ctx);
 515    int x1, y1, x2, y2;
 516
 517    if (!ctx->DrawBuffer)
 518       return;
 519
 520    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 521
 522    if (ctx->DrawBuffer->Name == 0) {
 523       x1 = x;
 524       y1 = ctx->DrawBuffer->Height - (y + h);
 525       x2 = x + w - 1;
 526       y2 = y1 + h - 1;
 527       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 528    }
 529    else {
 530       /* FBO - not inverted
 531        */
 532       x1 = x;
 533       y1 = y;
 534       x2 = x + w - 1;
 535       y2 = y + h - 1;
 536       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 537    }
 538
 539    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 540    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 541    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 542    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 543
 544    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 545
 546    I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 547    i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 548    i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 549 }
 550
 551 static void
 552 i830LogicOp(GLcontext * ctx, GLenum opcode)
 553 {
 554    struct i830_context *i830 = i830_context(ctx);
 555    int tmp = intel_translate_logic_op(opcode);
 556
 557    DBG("%s\n", __FUNCTION__);
 558
 559    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 560    i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
 561    i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 562 }
 563
 564
 565
 566 static void
 567 i830CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 568 {
 569    struct i830_context *i830 = i830_context(ctx);
 570    GLuint mode;
 571
 572    DBG("%s\n", __FUNCTION__);
 573
 574    if (!ctx->Polygon.CullFlag) {
 575       mode = CULLMODE_NONE;
 576    }
 577    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 578       mode = CULLMODE_CW;
 579
 580       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 581          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 582       if (ctx->Polygon.FrontFace != GL_CCW)
 583          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 584    }
 585    else {
 586       mode = CULLMODE_BOTH;
 587    }
 588
 589    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 590    i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
 591    i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
 592 }
 593
 594 static void
 595 i830LineWidth(GLcontext * ctx, GLfloat widthf)
 596 {
 597    struct i830_context *i830 = i830_context(ctx);
 598    int width;
 599    int state5;
 600
 601    DBG("%s\n", __FUNCTION__);
 602
 603    width = (int) (widthf * 2);
 604    CLAMP_SELF(width, 1, 15);
 605
 606    state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
 607    state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
 608
 609    if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
 610       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 611       i830->state.Ctx[I830_CTXREG_STATE5] = state5;
 612    }
 613 }
 614
 615 static void
 616 i830PointSize(GLcontext * ctx, GLfloat size)
 617 {
 618    struct i830_context *i830 = i830_context(ctx);
 619    GLint point_size = (int) size;
 620
 621    DBG("%s\n", __FUNCTION__);
 622
 623    CLAMP_SELF(point_size, 1, 256);
 624    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 625    i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
 626    i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
 627                                            FIXED_POINT_WIDTH(point_size));
 628 }
 629
 630
 631 /* =============================================================
 632  * Color masks
 633  */
 634
 635 static void
 636 i830ColorMask(GLcontext * ctx,
 637               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 638 {
 639    struct i830_context *i830 = i830_context(ctx);
 640    GLuint tmp = 0;
 641
 642    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
 643
 644    tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
 645           ENABLE_COLOR_MASK |
 646           ENABLE_COLOR_WRITE |
 647           ((!r) << WRITEMASK_RED_SHIFT) |
 648           ((!g) << WRITEMASK_GREEN_SHIFT) |
 649           ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
 650
 651    if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
 652       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 653       i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
 654    }
 655 }
 656
 657 static void
 658 update_specular(GLcontext * ctx)
 659 {
 660    struct i830_context *i830 = i830_context(ctx);
 661
 662    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 663    i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
 664
 665    if (NEED_SECONDARY_COLOR(ctx))
 666       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
 667    else
 668       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
 669 }
 670
 671 static void
 672 i830LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 673 {
 674    DBG("%s\n", __FUNCTION__);
 675
 676    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 677       update_specular(ctx);
 678    }
 679 }
 680
 681 /* In Mesa 3.5 we can reliably do native flatshading.
 682  */
 683 static void
 684 i830ShadeModel(GLcontext * ctx, GLenum mode)
 685 {
 686    struct i830_context *i830 = i830_context(ctx);
 687    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 688
 689
 690 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
 691
 692    i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
 693
 694    if (mode == GL_FLAT) {
 695       i830->state.Ctx[I830_CTXREG_STATE3] |=
 696          (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
 697           | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
 698           COLOR_SHADE_MODE(SHADE_MODE_FLAT));
 699    }
 700    else {
 701       i830->state.Ctx[I830_CTXREG_STATE3] |=
 702          (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
 703           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 704           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
 705           COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
 706    }
 707 }
 708
 709 /* =============================================================
 710  * Fog
 711  */
 712 static void
 713 i830Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 714 {
 715    struct i830_context *i830 = i830_context(ctx);
 716
 717    DBG("%s\n", __FUNCTION__);
 718
 719    if (pname == GL_FOG_COLOR) {
 720       GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 721                       ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 722                       ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 723
 724       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 725       i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
 726          (_3DSTATE_FOG_COLOR_CMD | color);
 727    }
 728 }
 729
 730 /* =============================================================
 731  */
 732
 733 static void
 734 i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 735 {
 736    struct i830_context *i830 = i830_context(ctx);
 737
 738    switch (cap) {
 739    case GL_LIGHTING:
 740    case GL_COLOR_SUM:
 741       update_specular(ctx);
 742       break;
 743
 744    case GL_ALPHA_TEST:
 745       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 746       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
 747       if (state)
 748          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
 749       else
 750          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
 751
 752       break;
 753
 754    case GL_BLEND:
 755       i830EvalLogicOpBlendState(ctx);
 756       break;
 757
 758    case GL_COLOR_LOGIC_OP:
 759       i830EvalLogicOpBlendState(ctx);
 760
 761       /* Logicop doesn't seem to work at 16bpp:
 762        */
 763       if (i830->intel.ctx.Visual.rgbBits == 16)
 764          FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
 765       break;
 766
 767    case GL_DITHER:
 768       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 769       i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
 770
 771       if (state)
 772          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
 773       else
 774          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
 775       break;
 776
 777    case GL_DEPTH_TEST:
 778       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 779       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
 780
 781       if (state)
 782          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
 783       else
 784          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
 785
 786       /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
 787        */
 788       i830DepthMask(ctx, ctx->Depth.Mask);
 789       break;
 790
 791    case GL_SCISSOR_TEST:
 792       I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 793
 794       if (state)
 795          i830->state.Buffer[I830_DESTREG_SENABLE] =
 796             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 797       else
 798          i830->state.Buffer[I830_DESTREG_SENABLE] =
 799             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 800
 801       break;
 802
 803    case GL_LINE_SMOOTH:
 804       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 805
 806       i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
 807       if (state)
 808          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
 809       else
 810          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
 811       break;
 812
 813    case GL_FOG:
 814       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 815       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
 816       if (state)
 817          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
 818       else
 819          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
 820       break;
 821
 822    case GL_CULL_FACE:
 823       i830CullFaceFrontFace(ctx, 0);
 824       break;
 825
 826    case GL_TEXTURE_2D:
 827       break;
 828
 829    case GL_STENCIL_TEST:
 830       {
 831          GLboolean hw_stencil = GL_FALSE;
 832          if (ctx->DrawBuffer) {
 833             struct intel_renderbuffer *irbStencil
 834                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 835             hw_stencil = (irbStencil && irbStencil->region);
 836          }
 837          if (hw_stencil) {
 838             I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 839
 840             if (state) {
 841                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
 842                i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
 843             }
 844             else {
 845                i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
 846                i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
 847                   ~ENABLE_STENCIL_WRITE;
 848                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
 849                i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
 850                   DISABLE_STENCIL_WRITE;
 851             }
 852          }
 853          else {
 854             FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
 855          }
 856       }
 857       break;
 858
 859    case GL_POLYGON_STIPPLE:
 860       /* The stipple command worked on my 855GM box, but not my 845G.
 861        * I'll do more testing later to find out exactly which hardware
 862        * supports it.  Disabled for now.
 863        */
 864       if (i830->intel.hw_stipple &&
 865           i830->intel.reduced_primitive == GL_TRIANGLES) {
 866          I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 867          i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 868          if (state)
 869             i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 870       }
 871       break;
 872
 873    default:
 874       ;
 875    }
 876 }
 877
 878
 879 static void
 880 i830_init_packets(struct i830_context *i830)
 881 {
 882    /* Zero all state */
 883    memset(&i830->state, 0, sizeof(i830->state));
 884
 885    /* Set default blend state */
 886    i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 887                                  TEXPIPE_COLOR |
 888                                  ENABLE_TEXOUTPUT_WRT_SEL |
 889                                  TEXOP_OUTPUT_CURRENT |
 890                                  DISABLE_TEX_CNTRL_STAGE |
 891                                  TEXOP_SCALE_1X |
 892                                  TEXOP_MODIFY_PARMS |
 893                                  TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
 894    i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 895                                  TEXPIPE_ALPHA |
 896                                  ENABLE_TEXOUTPUT_WRT_SEL |
 897                                  TEXOP_OUTPUT_CURRENT |
 898                                  TEXOP_SCALE_1X |
 899                                  TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
 900    i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 901                                  TEXPIPE_COLOR |
 902                                  TEXBLEND_ARG1 |
 903                                  TEXBLENDARG_MODIFY_PARMS |
 904                                  TEXBLENDARG_DIFFUSE);
 905    i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 906                                  TEXPIPE_ALPHA |
 907                                  TEXBLEND_ARG1 |
 908                                  TEXBLENDARG_MODIFY_PARMS |
 909                                  TEXBLENDARG_DIFFUSE);
 910
 911    i830->state.TexBlendWordsUsed[0] = 4;
 912
 913
 914    i830->state.Ctx[I830_CTXREG_VF] = 0;
 915    i830->state.Ctx[I830_CTXREG_VF2] = 0;
 916
 917    i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
 918                                       AA_LINE_ECAAR_WIDTH_ENABLE |
 919                                       AA_LINE_ECAAR_WIDTH_1_0 |
 920                                       AA_LINE_REGION_WIDTH_ENABLE |
 921                                       AA_LINE_REGION_WIDTH_1_0 |
 922                                       AA_LINE_DISABLE);
 923
 924    i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
 925                                              DISABLE_LOGIC_OP |
 926                                              DISABLE_STENCIL_TEST |
 927                                              DISABLE_DEPTH_BIAS |
 928                                              DISABLE_SPEC_ADD |
 929                                              DISABLE_FOG |
 930                                              DISABLE_ALPHA_TEST |
 931                                              DISABLE_COLOR_BLEND |
 932                                              DISABLE_DEPTH_TEST);
 933
 934 #if 000                         /* XXX all the stencil enable state is set in i830Enable(), right? */
 935    if (i830->intel.hw_stencil) {
 936       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 937                                                 ENABLE_STENCIL_WRITE |
 938                                                 ENABLE_TEX_CACHE |
 939                                                 ENABLE_DITHER |
 940                                                 ENABLE_COLOR_MASK |
 941                                                 /* set no color comps disabled */
 942                                                 ENABLE_COLOR_WRITE |
 943                                                 ENABLE_DEPTH_WRITE);
 944    }
 945    else
 946 #endif
 947    {
 948       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 949                                                 DISABLE_STENCIL_WRITE |
 950                                                 ENABLE_TEX_CACHE |
 951                                                 ENABLE_DITHER |
 952                                                 ENABLE_COLOR_MASK |
 953                                                 /* set no color comps disabled */
 954                                                 ENABLE_COLOR_WRITE |
 955                                                 ENABLE_DEPTH_WRITE);
 956    }
 957
 958    i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
 959                                           ENABLE_COLR_BLND_FUNC |
 960                                           BLENDFUNC_ADD |
 961                                           ENABLE_SRC_BLND_FACTOR |
 962                                           SRC_BLND_FACT(BLENDFACT_ONE) |
 963                                           ENABLE_DST_BLND_FACTOR |
 964                                           DST_BLND_FACT(BLENDFACT_ZERO));
 965
 966    i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
 967                                           ENABLE_GLOBAL_DEPTH_BIAS |
 968                                           GLOBAL_DEPTH_BIAS(0) |
 969                                           ENABLE_ALPHA_TEST_FUNC |
 970                                           ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
 971                                           | ALPHA_REF_VALUE(0));
 972
 973    i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
 974                                           ENABLE_DEPTH_TEST_FUNC |
 975                                           DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
 976                                           ENABLE_ALPHA_SHADE_MODE |
 977                                           ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
 978                                           | ENABLE_FOG_SHADE_MODE |
 979                                           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 980                                           ENABLE_SPEC_SHADE_MODE |
 981                                           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
 982                                           ENABLE_COLOR_SHADE_MODE |
 983                                           COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
 984                                           | ENABLE_CULL_MODE | CULLMODE_NONE);
 985
 986    i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 987                                           ENABLE_LOGIC_OP_FUNC |
 988                                           LOGIC_OP_FUNC(LOGICOP_COPY) |
 989                                           ENABLE_STENCIL_TEST_MASK |
 990                                           STENCIL_TEST_MASK(0xff) |
 991                                           ENABLE_STENCIL_WRITE_MASK |
 992                                           STENCIL_WRITE_MASK(0xff));
 993
 994    i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
 995                                               ENABLE_STENCIL_PARMS |
 996                                               STENCIL_FAIL_OP(STENCILOP_KEEP)
 997                                               |
 998                                               STENCIL_PASS_DEPTH_FAIL_OP
 999                                               (STENCILOP_KEEP) |
1000                                               STENCIL_PASS_DEPTH_PASS_OP
1001                                               (STENCILOP_KEEP) |
1002                                               ENABLE_STENCIL_TEST_FUNC |
1003                                               STENCIL_TEST_FUNC
1004                                               (COMPAREFUNC_ALWAYS) |
1005                                               ENABLE_STENCIL_REF_VALUE |
1006                                               STENCIL_REF_VALUE(0));
1007
1008    i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) |       /* 1.0 */
1009                                           ENABLE_FIXED_POINT_WIDTH |
1010                                           FIXED_POINT_WIDTH(1));
1011
1012    i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1013                                            DISABLE_INDPT_ALPHA_BLEND |
1014                                            ENABLE_ALPHA_BLENDFUNC |
1015                                            ABLENDFUNC_ADD);
1016
1017    i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1018                                             FOG_COLOR_RED(0) |
1019                                             FOG_COLOR_GREEN(0) |
1020                                             FOG_COLOR_BLUE(0));
1021
1022    i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1023    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1024
1025    i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1026    i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1027                                          TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1028                                          TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1029                                          TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1030
1031
1032    i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1033
1034    i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1035    i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1036                                                DISABLE_SCISSOR_RECT);
1037    i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1038    i830->state.Buffer[I830_DESTREG_SR1] = 0;
1039    i830->state.Buffer[I830_DESTREG_SR2] = 0;
1040 }
1041
1042
1043 void
1044 i830InitStateFuncs(struct dd_function_table *functions)
1045 {
1046    functions->AlphaFunc = i830AlphaFunc;
1047    functions->BlendColor = i830BlendColor;
1048    functions->BlendEquationSeparate = i830BlendEquationSeparate;
1049    functions->BlendFuncSeparate = i830BlendFuncSeparate;
1050    functions->ColorMask = i830ColorMask;
1051    functions->CullFace = i830CullFaceFrontFace;
1052    functions->DepthFunc = i830DepthFunc;
1053    functions->DepthMask = i830DepthMask;
1054    functions->Enable = i830Enable;
1055    functions->Fogfv = i830Fogfv;
1056    functions->FrontFace = i830CullFaceFrontFace;
1057    functions->LightModelfv = i830LightModelfv;
1058    functions->LineWidth = i830LineWidth;
1059    functions->LogicOpcode = i830LogicOp;
1060    functions->PointSize = i830PointSize;
1061    functions->PolygonStipple = i830PolygonStipple;
1062    functions->Scissor = i830Scissor;
1063    functions->ShadeModel = i830ShadeModel;
1064    functions->StencilFuncSeparate = i830StencilFuncSeparate;
1065    functions->StencilMaskSeparate = i830StencilMaskSeparate;
1066    functions->StencilOpSeparate = i830StencilOpSeparate;
1067 }
1068
1069 void
1070 i830InitState(struct i830_context *i830)
1071 {
1072    GLcontext *ctx = &i830->intel.ctx;
1073
1074    i830_init_packets(i830);
1075
1076    _mesa_init_driver_state(ctx);
1077
1078    memcpy(&i830->initial, &i830->state, sizeof(i830->state));
1079
1080    i830->current = &i830->state;
1081    i830->state.emitted = 0;
1082    i830->state.active = (I830_UPLOAD_INVARIENT |
1083                          I830_UPLOAD_TEXBLEND(0) |
1084                          I830_UPLOAD_STIPPLE |
1085                          I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1086 }