src/mesa/drivers/dri/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915CONTEXT_INC
  29 #define I915CONTEXT_INC
  30
  31 #include "intel_context.h"
  32
  33 #define I915_FALLBACK_TEXTURE            0x1000
  34 #define I915_FALLBACK_COLORMASK          0x2000
  35 #define I915_FALLBACK_STENCIL            0x4000
  36 #define I915_FALLBACK_STIPPLE            0x8000
  37 #define I915_FALLBACK_PROGRAM            0x10000
  38 #define I915_FALLBACK_LOGICOP            0x20000
  39 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
  40 #define I915_FALLBACK_POINT_SMOOTH       0x80000
  41 #define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN  0x100000
  42 #define I915_FALLBACK_DRAW_OFFSET        0x200000
  43
  44 #define I915_UPLOAD_CTX              0x1
  45 #define I915_UPLOAD_BUFFERS          0x2
  46 #define I915_UPLOAD_STIPPLE          0x4
  47 #define I915_UPLOAD_PROGRAM          0x8
  48 #define I915_UPLOAD_CONSTANTS        0x10
  49 #define I915_UPLOAD_INVARIENT        0x40
  50 #define I915_UPLOAD_DEFAULTS         0x80
  51 #define I915_UPLOAD_RASTER_RULES     0x100
  52 #define I915_UPLOAD_BLEND            0x200
  53 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
  54 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
  55 #define I915_UPLOAD_TEX_0_SHIFT      16
  56
  57
  58 /* State structure offsets - these will probably disappear.
  59  */
  60 #define I915_DESTREG_CBUFADDR0 0
  61 #define I915_DESTREG_CBUFADDR1 1
  62 #define I915_DESTREG_DBUFADDR0 3
  63 #define I915_DESTREG_DBUFADDR1 4
  64 #define I915_DESTREG_DV0 6
  65 #define I915_DESTREG_DV1 7
  66 #define I915_DESTREG_SENABLE 8
  67 #define I915_DESTREG_SR0 9
  68 #define I915_DESTREG_SR1 10
  69 #define I915_DESTREG_SR2 11
  70 #define I915_DESTREG_DRAWRECT0 12
  71 #define I915_DESTREG_DRAWRECT1 13
  72 #define I915_DESTREG_DRAWRECT2 14
  73 #define I915_DESTREG_DRAWRECT3 15
  74 #define I915_DESTREG_DRAWRECT4 16
  75 #define I915_DESTREG_DRAWRECT5 17
  76 #define I915_DEST_SETUP_SIZE 18
  77
  78 #define I915_CTXREG_STATE4              0
  79 #define I915_CTXREG_LI                  1
  80 #define I915_CTXREG_LIS2                2
  81 #define I915_CTXREG_LIS4                3
  82 #define I915_CTXREG_LIS5                4
  83 #define I915_CTXREG_LIS6                5
  84 #define I915_CTXREG_BF_STENCIL_OPS      6
  85 #define I915_CTXREG_BF_STENCIL_MASKS    7
  86 #define I915_CTX_SETUP_SIZE             8
  87
  88 #define I915_BLENDREG_IAB               0
  89 #define I915_BLENDREG_BLENDCOLOR0       1
  90 #define I915_BLENDREG_BLENDCOLOR1       2
  91 #define I915_BLEND_SETUP_SIZE           3
  92
  93 #define I915_STPREG_ST0        0
  94 #define I915_STPREG_ST1        1
  95 #define I915_STP_SETUP_SIZE    2
  96
  97 #define I915_TEXREG_MS3        1
  98 #define I915_TEXREG_MS4        2
  99 #define I915_TEXREG_SS2        3
 100 #define I915_TEXREG_SS3        4
 101 #define I915_TEXREG_SS4        5
 102 #define I915_TEX_SETUP_SIZE    6
 103
 104 #define I915_DEFREG_C0    0
 105 #define I915_DEFREG_C1    1
 106 #define I915_DEFREG_S0    2
 107 #define I915_DEFREG_S1    3
 108 #define I915_DEFREG_Z0    4
 109 #define I915_DEFREG_Z1    5
 110 #define I915_DEF_SETUP_SIZE    6
 111
 112 enum {
 113    I915_RASTER_RULES,
 114    I915_RASTER_RULES_SETUP_SIZE,
 115 };
 116
 117 #define I915_MAX_CONSTANT      32
 118 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 119
 120 #define I915_MAX_TEX_INDIRECT 4
 121 #define I915_MAX_TEX_INSN     32
 122 #define I915_MAX_ALU_INSN     64
 123 #define I915_MAX_DECL_INSN    27
 124 #define I915_MAX_TEMPORARY    16
 125
 126 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
 127                                 I915_MAX_TEX_INSN + \
 128                                 I915_MAX_ALU_INSN)
 129
 130 /* Maximum size of the program packet, which matches the limits on
 131  * decl, tex, and ALU instructions.
 132  */
 133 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
 134
 135 /* Hardware version of a parsed fragment program.  "Derived" from the
 136  * mesa fragment_program struct.
 137  */
 138 struct i915_fragment_program
 139 {
 140    struct gl_fragment_program FragProg;
 141
 142    GLboolean translated;
 143    GLboolean params_uptodate;
 144    GLboolean on_hardware;
 145    GLboolean error;             /* If program is malformed for any reason. */
 146
 147    /** Record of which phases R registers were last written in. */
 148    GLuint register_phases[16];
 149    GLuint indirections;
 150    GLuint nr_tex_indirect;
 151    GLuint nr_tex_insn;
 152    GLuint nr_alu_insn;
 153    GLuint nr_decl_insn;
 154
 155
 156
 157
 158    /* TODO: split between the stored representation of a program and
 159     * the state used to build that representation.
 160     */
 161    struct gl_context *ctx;
 162
 163    /* declarations contains the packet header. */
 164    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
 165    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
 166
 167    GLfloat constant[I915_MAX_CONSTANT][4];
 168    GLuint constant_flags[I915_MAX_CONSTANT];
 169    GLuint nr_constants;
 170
 171    GLuint *csr;                 /* Cursor, points into program.
 172                                  */
 173
 174    GLuint *decl;                /* Cursor, points into declarations.
 175                                  */
 176
 177    GLuint decl_s;               /* flags for which s regs need to be decl'd */
 178    GLuint decl_t;               /* flags for which t regs need to be decl'd */
 179
 180    GLuint temp_flag;            /* Tracks temporary regs which are in
 181                                  * use.
 182                                  */
 183
 184    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
 185                                  * use.
 186                                  */
 187
 188
 189    /* Track which R registers are "live" for each instruction.
 190     * A register is live between the time it's written to and the last time
 191     * it's read. */
 192    GLuint usedRegs[I915_MAX_INSN];
 193
 194    /* Helpers for i915_fragprog.c:
 195     */
 196    GLuint wpos_tex;
 197    GLboolean depth_written;
 198
 199    struct
 200    {
 201       GLuint reg;               /* Hardware constant idx */
 202       const GLfloat *values;    /* Pointer to tracked values */
 203    } param[I915_MAX_CONSTANT];
 204    GLuint nr_params;
 205 };
 206
 207
 208
 209
 210
 211
 212
 213 #define I915_TEX_UNITS 8
 214
 215
 216 struct i915_hw_state
 217 {
 218    GLuint Ctx[I915_CTX_SETUP_SIZE];
 219    GLuint Blend[I915_BLEND_SETUP_SIZE];
 220    GLuint Buffer[I915_DEST_SETUP_SIZE];
 221    GLuint Stipple[I915_STP_SETUP_SIZE];
 222    GLuint Defaults[I915_DEF_SETUP_SIZE];
 223    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
 224    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
 225    GLuint Constant[I915_CONSTANT_SIZE];
 226    GLuint ConstantSize;
 227    GLuint Program[I915_PROGRAM_SIZE];
 228    GLuint ProgramSize;
 229
 230    /* Region pointers for relocation:
 231     */
 232    struct intel_region *draw_region;
 233    struct intel_region *depth_region;
 234 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 235
 236    /* Regions aren't actually that appropriate here as the memory may
 237     * be from a PBO or FBO.  Will have to do this for draw and depth for
 238     * FBO's...
 239     */
 240    drm_intel_bo *tex_buffer[I915_TEX_UNITS];
 241    GLuint tex_offset[I915_TEX_UNITS];
 242
 243
 244    GLuint active;               /* I915_UPLOAD_* */
 245    GLuint emitted;              /* I915_UPLOAD_* */
 246 };
 247
 248 struct i915_context
 249 {
 250    struct intel_context intel;
 251
 252    GLuint last_ReallyEnabled;
 253    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
 254
 255
 256    struct i915_fragment_program *current_program;
 257
 258    drm_intel_bo *current_vb_bo;
 259    unsigned int current_vertex_size;
 260
 261    struct i915_hw_state state;
 262    uint32_t last_draw_offset;
 263    GLuint last_sampler;
 264 };
 265
 266
 267 #define I915_STATECHANGE(i915, flag)                                    \
 268 do {                                                                    \
 269    INTEL_FIREVERTICES( &(i915)->intel );                                        \
 270    (i915)->state.emitted &= ~(flag);                                    \
 271 } while (0)
 272
 273 #define I915_ACTIVESTATE(i915, flag, mode)                      \
 274 do {                                                            \
 275    INTEL_FIREVERTICES( &(i915)->intel );                                \
 276    if (mode)                                                    \
 277       (i915)->state.active |= (flag);                           \
 278    else                                                         \
 279       (i915)->state.active &= ~(flag);                          \
 280 } while (0)
 281
 282
 283 /*======================================================================
 284  * i915_vtbl.c
 285  */
 286 extern void i915InitVtbl(struct i915_context *i915);
 287
 288 extern void
 289 i915_state_draw_region(struct intel_context *intel,
 290                        struct i915_hw_state *state,
 291                        struct intel_region *color_region,
 292                        struct intel_region *depth_region);
 293
 294
 295
 296 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 297 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
 298 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
 299 do {                                                                    \
 300    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
 301    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
 302    s4 |= S4;                                                            \
 303    intel->vertex_attr_count++;                                          \
 304    offset += (SZ);                                                      \
 305 } while (0)
 306
 307 #define EMIT_PAD( N )                                                   \
 308 do {                                                                    \
 309    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
 310    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
 311    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
 312    intel->vertex_attr_count++;                                          \
 313    offset += (N);                                                       \
 314 } while (0)
 315
 316
 317
 318 /*======================================================================
 319  * i915_context.c
 320  */
 321 extern GLboolean i915CreateContext(int api,
 322                                    const struct gl_config * mesaVis,
 323                                    __DRIcontext * driContextPriv,
 324                                    void *sharedContextPrivate);
 325
 326
 327 /*======================================================================
 328  * i915_debug.c
 329  */
 330 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
 331 extern void i915_print_ureg(const char *msg, GLuint ureg);
 332
 333
 334 /*======================================================================
 335  * i915_state.c
 336  */
 337 extern void i915InitStateFunctions(struct dd_function_table *functions);
 338 extern void i915InitState(struct i915_context *i915);
 339 extern void i915_update_stencil(struct gl_context * ctx);
 340 extern void i915_update_provoking_vertex(struct gl_context *ctx);
 341
 342
 343 /*======================================================================
 344  * i915_tex.c
 345  */
 346 extern void i915UpdateTextureState(struct intel_context *intel);
 347 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 348
 349 /*======================================================================
 350  * i915_fragprog.c
 351  */
 352 extern void i915ValidateFragmentProgram(struct i915_context *i915);
 353 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
 354
 355 /*======================================================================
 356  * Inline conversion functions.  These are better-typed than the
 357  * macros used previously:
 358  */
 359 static INLINE struct i915_context *
 360 i915_context(struct gl_context * ctx)
 361 {
 362    return (struct i915_context *) ctx;
 363 }
 364
 365
 366
 367 #define I915_CONTEXT(ctx)       i915_context(ctx)
 368
 369
 370
 371 #endif