src/mesa/drivers/dri/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915CONTEXT_INC
  29 #define I915CONTEXT_INC
  30
  31 #include "intel_context.h"
  32 #include "i915_reg.h"
  33
  34 #define I915_FALLBACK_TEXTURE            0x1000
  35 #define I915_FALLBACK_COLORMASK          0x2000
  36 #define I915_FALLBACK_STENCIL            0x4000
  37 #define I915_FALLBACK_STIPPLE            0x8000
  38 #define I915_FALLBACK_PROGRAM            0x10000
  39 #define I915_FALLBACK_LOGICOP            0x20000
  40 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
  41 #define I915_FALLBACK_POINT_SMOOTH       0x80000
  42 #define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN  0x100000
  43 #define I915_FALLBACK_DRAW_OFFSET        0x200000
  44
  45 #define I915_UPLOAD_CTX              0x1
  46 #define I915_UPLOAD_BUFFERS          0x2
  47 #define I915_UPLOAD_STIPPLE          0x4
  48 #define I915_UPLOAD_PROGRAM          0x8
  49 #define I915_UPLOAD_CONSTANTS        0x10
  50 #define I915_UPLOAD_FOG              0x20
  51 #define I915_UPLOAD_INVARIENT        0x40
  52 #define I915_UPLOAD_DEFAULTS         0x80
  53 #define I915_UPLOAD_RASTER_RULES     0x100
  54 #define I915_UPLOAD_BLEND            0x200
  55 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
  56 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
  57 #define I915_UPLOAD_TEX_0_SHIFT      16
  58
  59
  60 /* State structure offsets - these will probably disappear.
  61  */
  62 #define I915_DESTREG_CBUFADDR0 0
  63 #define I915_DESTREG_CBUFADDR1 1
  64 #define I915_DESTREG_DBUFADDR0 3
  65 #define I915_DESTREG_DBUFADDR1 4
  66 #define I915_DESTREG_DV0 6
  67 #define I915_DESTREG_DV1 7
  68 #define I915_DESTREG_SENABLE 8
  69 #define I915_DESTREG_SR0 9
  70 #define I915_DESTREG_SR1 10
  71 #define I915_DESTREG_SR2 11
  72 #define I915_DESTREG_DRAWRECT0 12
  73 #define I915_DESTREG_DRAWRECT1 13
  74 #define I915_DESTREG_DRAWRECT2 14
  75 #define I915_DESTREG_DRAWRECT3 15
  76 #define I915_DESTREG_DRAWRECT4 16
  77 #define I915_DESTREG_DRAWRECT5 17
  78 #define I915_DEST_SETUP_SIZE 18
  79
  80 #define I915_CTXREG_STATE4              0
  81 #define I915_CTXREG_LI                  1
  82 #define I915_CTXREG_LIS2                2
  83 #define I915_CTXREG_LIS4                3
  84 #define I915_CTXREG_LIS5                4
  85 #define I915_CTXREG_LIS6                5
  86 #define I915_CTXREG_BF_STENCIL_OPS      6
  87 #define I915_CTXREG_BF_STENCIL_MASKS    7
  88 #define I915_CTX_SETUP_SIZE             8
  89
  90 #define I915_BLENDREG_IAB               0
  91 #define I915_BLENDREG_BLENDCOLOR0       1
  92 #define I915_BLENDREG_BLENDCOLOR1       2
  93 #define I915_BLEND_SETUP_SIZE           3
  94
  95 #define I915_FOGREG_COLOR               0
  96 #define I915_FOGREG_MODE0               1
  97 #define I915_FOGREG_MODE1               2
  98 #define I915_FOGREG_MODE2               3
  99 #define I915_FOGREG_MODE3               4
 100 #define I915_FOG_SETUP_SIZE             5
 101
 102 #define I915_STPREG_ST0        0
 103 #define I915_STPREG_ST1        1
 104 #define I915_STP_SETUP_SIZE    2
 105
 106 #define I915_TEXREG_MS3        1
 107 #define I915_TEXREG_MS4        2
 108 #define I915_TEXREG_SS2        3
 109 #define I915_TEXREG_SS3        4
 110 #define I915_TEXREG_SS4        5
 111 #define I915_TEX_SETUP_SIZE    6
 112
 113 #define I915_DEFREG_C0    0
 114 #define I915_DEFREG_C1    1
 115 #define I915_DEFREG_S0    2
 116 #define I915_DEFREG_S1    3
 117 #define I915_DEFREG_Z0    4
 118 #define I915_DEFREG_Z1    5
 119 #define I915_DEF_SETUP_SIZE    6
 120
 121 enum {
 122    I915_RASTER_RULES,
 123    I915_RASTER_RULES_SETUP_SIZE,
 124 };
 125
 126 #define I915_MAX_CONSTANT      32
 127 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 128
 129 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
 130                                 I915_MAX_TEX_INSN + \
 131                                 I915_MAX_ALU_INSN)
 132
 133 /* Maximum size of the program packet, which matches the limits on
 134  * decl, tex, and ALU instructions.
 135  */
 136 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
 137
 138 /* Hardware version of a parsed fragment program.  "Derived" from the
 139  * mesa fragment_program struct.
 140  */
 141 struct i915_fragment_program
 142 {
 143    struct gl_fragment_program FragProg;
 144
 145    GLboolean translated;
 146    GLboolean params_uptodate;
 147    GLboolean on_hardware;
 148    GLboolean error;             /* If program is malformed for any reason. */
 149
 150    /** Record of which phases R registers were last written in. */
 151    GLuint register_phases[16];
 152    GLuint indirections;
 153    GLuint nr_tex_indirect;
 154    GLuint nr_tex_insn;
 155    GLuint nr_alu_insn;
 156    GLuint nr_decl_insn;
 157
 158
 159
 160
 161    /* TODO: split between the stored representation of a program and
 162     * the state used to build that representation.
 163     */
 164    struct gl_context *ctx;
 165
 166    /* declarations contains the packet header. */
 167    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
 168    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
 169
 170    GLfloat constant[I915_MAX_CONSTANT][4];
 171    GLuint constant_flags[I915_MAX_CONSTANT];
 172    GLuint nr_constants;
 173
 174    GLuint *csr;                 /* Cursor, points into program.
 175                                  */
 176
 177    GLuint *decl;                /* Cursor, points into declarations.
 178                                  */
 179
 180    GLuint decl_s;               /* flags for which s regs need to be decl'd */
 181    GLuint decl_t;               /* flags for which t regs need to be decl'd */
 182
 183    GLuint temp_flag;            /* Tracks temporary regs which are in
 184                                  * use.
 185                                  */
 186
 187    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
 188                                  * use.
 189                                  */
 190
 191
 192    /* Track which R registers are "live" for each instruction.
 193     * A register is live between the time it's written to and the last time
 194     * it's read. */
 195    GLuint usedRegs[I915_MAX_INSN];
 196
 197    /* Helpers for i915_fragprog.c:
 198     */
 199    GLuint wpos_tex;
 200    GLboolean depth_written;
 201
 202    struct
 203    {
 204       GLuint reg;               /* Hardware constant idx */
 205       const GLfloat *values;    /* Pointer to tracked values */
 206    } param[I915_MAX_CONSTANT];
 207    GLuint nr_params;
 208 };
 209
 210
 211
 212
 213
 214
 215
 216 #define I915_TEX_UNITS 8
 217
 218
 219 struct i915_hw_state
 220 {
 221    GLuint Ctx[I915_CTX_SETUP_SIZE];
 222    GLuint Blend[I915_BLEND_SETUP_SIZE];
 223    GLuint Buffer[I915_DEST_SETUP_SIZE];
 224    GLuint Stipple[I915_STP_SETUP_SIZE];
 225    GLuint Fog[I915_FOG_SETUP_SIZE];
 226    GLuint Defaults[I915_DEF_SETUP_SIZE];
 227    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
 228    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
 229    GLuint Constant[I915_CONSTANT_SIZE];
 230    GLuint ConstantSize;
 231    GLuint Program[I915_PROGRAM_SIZE];
 232    GLuint ProgramSize;
 233
 234    /* Region pointers for relocation:
 235     */
 236    struct intel_region *draw_region;
 237    struct intel_region *depth_region;
 238 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 239
 240    /* Regions aren't actually that appropriate here as the memory may
 241     * be from a PBO or FBO.  Will have to do this for draw and depth for
 242     * FBO's...
 243     */
 244    drm_intel_bo *tex_buffer[I915_TEX_UNITS];
 245    GLuint tex_offset[I915_TEX_UNITS];
 246
 247
 248    GLuint active;               /* I915_UPLOAD_* */
 249    GLuint emitted;              /* I915_UPLOAD_* */
 250 };
 251
 252 #define I915_FOG_PIXEL  2
 253 #define I915_FOG_VERTEX 1
 254 #define I915_FOG_NONE   0
 255
 256 struct i915_context
 257 {
 258    struct intel_context intel;
 259
 260    GLuint last_ReallyEnabled;
 261    GLuint vertex_fog;
 262    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
 263
 264
 265    struct i915_fragment_program *current_program;
 266
 267    struct i915_hw_state state;
 268    uint32_t last_draw_offset;
 269    GLuint last_sampler;
 270 };
 271
 272
 273 #define I915_STATECHANGE(i915, flag)                                    \
 274 do {                                                                    \
 275    INTEL_FIREVERTICES( &(i915)->intel );                                        \
 276    (i915)->state.emitted &= ~(flag);                                    \
 277 } while (0)
 278
 279 #define I915_ACTIVESTATE(i915, flag, mode)                      \
 280 do {                                                            \
 281    INTEL_FIREVERTICES( &(i915)->intel );                                \
 282    if (mode)                                                    \
 283       (i915)->state.active |= (flag);                           \
 284    else                                                         \
 285       (i915)->state.active &= ~(flag);                          \
 286 } while (0)
 287
 288
 289 /*======================================================================
 290  * i915_vtbl.c
 291  */
 292 extern void i915InitVtbl(struct i915_context *i915);
 293
 294 extern void
 295 i915_state_draw_region(struct intel_context *intel,
 296                        struct i915_hw_state *state,
 297                        struct intel_region *color_region,
 298                        struct intel_region *depth_region);
 299
 300
 301
 302 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 303 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
 304 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
 305 do {                                                                    \
 306    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
 307    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
 308    s4 |= S4;                                                            \
 309    intel->vertex_attr_count++;                                          \
 310    offset += (SZ);                                                      \
 311 } while (0)
 312
 313 #define EMIT_PAD( N )                                                   \
 314 do {                                                                    \
 315    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
 316    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
 317    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
 318    intel->vertex_attr_count++;                                          \
 319    offset += (N);                                                       \
 320 } while (0)
 321
 322
 323
 324 /*======================================================================
 325  * i915_context.c
 326  */
 327 extern GLboolean i915CreateContext(int api,
 328                                    const struct gl_config * mesaVis,
 329                                    __DRIcontext * driContextPriv,
 330                                    void *sharedContextPrivate);
 331
 332
 333 /*======================================================================
 334  * i915_debug.c
 335  */
 336 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
 337 extern void i915_print_ureg(const char *msg, GLuint ureg);
 338
 339
 340 /*======================================================================
 341  * i915_state.c
 342  */
 343 extern void i915InitStateFunctions(struct dd_function_table *functions);
 344 extern void i915InitState(struct i915_context *i915);
 345 extern void i915_update_fog(struct gl_context * ctx);
 346 extern void i915_update_stencil(struct gl_context * ctx);
 347 extern void i915_update_provoking_vertex(struct gl_context *ctx);
 348
 349
 350 /*======================================================================
 351  * i915_tex.c
 352  */
 353 extern void i915UpdateTextureState(struct intel_context *intel);
 354 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 355
 356 /*======================================================================
 357  * i915_fragprog.c
 358  */
 359 extern void i915ValidateFragmentProgram(struct i915_context *i915);
 360 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
 361
 362 /*======================================================================
 363  * Inline conversion functions.  These are better-typed than the
 364  * macros used previously:
 365  */
 366 static INLINE struct i915_context *
 367 i915_context(struct gl_context * ctx)
 368 {
 369    return (struct i915_context *) ctx;
 370 }
 371
 372
 373
 374 #define I915_CONTEXT(ctx)       i915_context(ctx)
 375
 376
 377
 378 #endif