Merge branch 'master' of git+ssh://joukj@git.freedesktop.org/git/mesa/mesa
[mesa.git] / src / mesa / drivers / dri / i915 / i915_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef I915CONTEXT_INC
29 #define I915CONTEXT_INC
30
31 #include "intel_context.h"
32
33 #define I915_FALLBACK_TEXTURE 0x1000
34 #define I915_FALLBACK_COLORMASK 0x2000
35 #define I915_FALLBACK_STENCIL 0x4000
36 #define I915_FALLBACK_STIPPLE 0x8000
37 #define I915_FALLBACK_PROGRAM 0x10000
38 #define I915_FALLBACK_LOGICOP 0x20000
39 #define I915_FALLBACK_POLYGON_SMOOTH 0x40000
40 #define I915_FALLBACK_POINT_SMOOTH 0x80000
41
42 #define I915_UPLOAD_CTX 0x1
43 #define I915_UPLOAD_BUFFERS 0x2
44 #define I915_UPLOAD_STIPPLE 0x4
45 #define I915_UPLOAD_PROGRAM 0x8
46 #define I915_UPLOAD_CONSTANTS 0x10
47 #define I915_UPLOAD_FOG 0x20
48 #define I915_UPLOAD_INVARIENT 0x40
49 #define I915_UPLOAD_DEFAULTS 0x80
50 #define I915_UPLOAD_TEX(i) (0x00010000<<(i))
51 #define I915_UPLOAD_TEX_ALL (0x00ff0000)
52 #define I915_UPLOAD_TEX_0_SHIFT 16
53
54
55 /* State structure offsets - these will probably disappear.
56 */
57 #define I915_DESTREG_CBUFADDR0 0
58 #define I915_DESTREG_CBUFADDR1 1
59 #define I915_DESTREG_DBUFADDR0 3
60 #define I915_DESTREG_DBUFADDR1 4
61 #define I915_DESTREG_DV0 6
62 #define I915_DESTREG_DV1 7
63 #define I915_DESTREG_SENABLE 8
64 #define I915_DESTREG_SR0 9
65 #define I915_DESTREG_SR1 10
66 #define I915_DESTREG_SR2 11
67 #define I915_DEST_SETUP_SIZE 12
68
69 #define I915_CTXREG_STATE4 0
70 #define I915_CTXREG_LI 1
71 #define I915_CTXREG_LIS2 2
72 #define I915_CTXREG_LIS4 3
73 #define I915_CTXREG_LIS5 4
74 #define I915_CTXREG_LIS6 5
75 #define I915_CTXREG_IAB 6
76 #define I915_CTXREG_BLENDCOLOR0 7
77 #define I915_CTXREG_BLENDCOLOR1 8
78 #define I915_CTX_SETUP_SIZE 9
79
80 #define I915_FOGREG_COLOR 0
81 #define I915_FOGREG_MODE0 1
82 #define I915_FOGREG_MODE1 2
83 #define I915_FOGREG_MODE2 3
84 #define I915_FOGREG_MODE3 4
85 #define I915_FOG_SETUP_SIZE 5
86
87 #define I915_STPREG_ST0 0
88 #define I915_STPREG_ST1 1
89 #define I915_STP_SETUP_SIZE 2
90
91 #define I915_TEXREG_MS3 1
92 #define I915_TEXREG_MS4 2
93 #define I915_TEXREG_SS2 3
94 #define I915_TEXREG_SS3 4
95 #define I915_TEXREG_SS4 5
96 #define I915_TEX_SETUP_SIZE 6
97
98 #define I915_DEFREG_C0 0
99 #define I915_DEFREG_C1 1
100 #define I915_DEFREG_S0 2
101 #define I915_DEFREG_S1 3
102 #define I915_DEFREG_Z0 4
103 #define I915_DEFREG_Z1 5
104 #define I915_DEF_SETUP_SIZE 6
105
106
107 #define I915_MAX_CONSTANT 32
108 #define I915_CONSTANT_SIZE (2+(4*I915_MAX_CONSTANT))
109
110
111 #define I915_PROGRAM_SIZE 192
112
113
114 /* Hardware version of a parsed fragment program. "Derived" from the
115 * mesa fragment_program struct.
116 */
117 struct i915_fragment_program
118 {
119 struct gl_fragment_program FragProg;
120
121 GLboolean translated;
122 GLboolean params_uptodate;
123 GLboolean on_hardware;
124 GLboolean error; /* If program is malformed for any reason. */
125
126 GLuint nr_tex_indirect;
127 GLuint nr_tex_insn;
128 GLuint nr_alu_insn;
129 GLuint nr_decl_insn;
130
131
132
133
134 /* TODO: split between the stored representation of a program and
135 * the state used to build that representation.
136 */
137 GLcontext *ctx;
138
139 GLuint declarations[I915_PROGRAM_SIZE];
140 GLuint program[I915_PROGRAM_SIZE];
141
142 GLfloat constant[I915_MAX_CONSTANT][4];
143 GLuint constant_flags[I915_MAX_CONSTANT];
144 GLuint nr_constants;
145
146 GLuint *csr; /* Cursor, points into program.
147 */
148
149 GLuint *decl; /* Cursor, points into declarations.
150 */
151
152 GLuint decl_s; /* flags for which s regs need to be decl'd */
153 GLuint decl_t; /* flags for which t regs need to be decl'd */
154
155 GLuint temp_flag; /* Tracks temporary regs which are in
156 * use.
157 */
158
159 GLuint utemp_flag; /* Tracks TYPE_U temporary regs which are in
160 * use.
161 */
162
163
164
165 /* Helpers for i915_fragprog.c:
166 */
167 GLuint wpos_tex;
168 GLboolean depth_written;
169
170 struct
171 {
172 GLuint reg; /* Hardware constant idx */
173 const GLfloat *values; /* Pointer to tracked values */
174 } param[I915_MAX_CONSTANT];
175 GLuint nr_params;
176 };
177
178
179
180
181
182
183
184 #define I915_TEX_UNITS 8
185
186
187 struct i915_hw_state
188 {
189 GLuint Ctx[I915_CTX_SETUP_SIZE];
190 GLuint Buffer[I915_DEST_SETUP_SIZE];
191 GLuint Stipple[I915_STP_SETUP_SIZE];
192 GLuint Fog[I915_FOG_SETUP_SIZE];
193 GLuint Defaults[I915_DEF_SETUP_SIZE];
194 GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
195 GLuint Constant[I915_CONSTANT_SIZE];
196 GLuint ConstantSize;
197 GLuint Program[I915_PROGRAM_SIZE];
198 GLuint ProgramSize;
199
200 /* Region pointers for relocation:
201 */
202 struct intel_region *draw_region;
203 struct intel_region *depth_region;
204 /* struct intel_region *tex_region[I915_TEX_UNITS]; */
205
206 /* Regions aren't actually that appropriate here as the memory may
207 * be from a PBO or FBO. Will have to do this for draw and depth for
208 * FBO's...
209 */
210 dri_bo *tex_buffer[I915_TEX_UNITS];
211 GLuint tex_offset[I915_TEX_UNITS];
212
213
214 GLuint active; /* I915_UPLOAD_* */
215 GLuint emitted; /* I915_UPLOAD_* */
216 };
217
218 #define I915_FOG_PIXEL 2
219 #define I915_FOG_VERTEX 1
220 #define I915_FOG_NONE 0
221
222 struct i915_context
223 {
224 struct intel_context intel;
225
226 GLuint last_ReallyEnabled;
227 GLuint vertex_fog;
228 GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
229
230
231 struct i915_fragment_program *current_program;
232
233 struct i915_hw_state meta, initial, state, *current;
234 };
235
236
237 #define I915_STATECHANGE(i915, flag) \
238 do { \
239 INTEL_FIREVERTICES( &(i915)->intel ); \
240 (i915)->state.emitted &= ~(flag); \
241 } while (0)
242
243 #define I915_ACTIVESTATE(i915, flag, mode) \
244 do { \
245 INTEL_FIREVERTICES( &(i915)->intel ); \
246 if (mode) \
247 (i915)->state.active |= (flag); \
248 else \
249 (i915)->state.active &= ~(flag); \
250 } while (0)
251
252
253 /*======================================================================
254 * i915_vtbl.c
255 */
256 extern void i915InitVtbl(struct i915_context *i915);
257
258 extern void
259 i915_state_draw_region(struct intel_context *intel,
260 struct i915_hw_state *state,
261 struct intel_region *color_region,
262 struct intel_region *depth_region);
263
264
265
266 #define SZ_TO_HW(sz) ((sz-2)&0x3)
267 #define EMIT_SZ(sz) (EMIT_1F + (sz) - 1)
268 #define EMIT_ATTR( ATTR, STYLE, S4, SZ ) \
269 do { \
270 intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR); \
271 intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE); \
272 s4 |= S4; \
273 intel->vertex_attr_count++; \
274 offset += (SZ); \
275 } while (0)
276
277 #define EMIT_PAD( N ) \
278 do { \
279 intel->vertex_attrs[intel->vertex_attr_count].attrib = 0; \
280 intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD; \
281 intel->vertex_attrs[intel->vertex_attr_count].offset = (N); \
282 intel->vertex_attr_count++; \
283 offset += (N); \
284 } while (0)
285
286
287
288 /*======================================================================
289 * i915_context.c
290 */
291 extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
292 __DRIcontextPrivate * driContextPriv,
293 void *sharedContextPrivate);
294
295
296 /*======================================================================
297 * i915_debug.c
298 */
299 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
300 extern void i915_print_ureg(const char *msg, GLuint ureg);
301
302
303 /*======================================================================
304 * i915_state.c
305 */
306 extern void i915InitStateFunctions(struct dd_function_table *functions);
307 extern void i915InitState(struct i915_context *i915);
308 extern void i915_update_fog(GLcontext * ctx);
309
310
311 /*======================================================================
312 * i915_tex.c
313 */
314 extern void i915UpdateTextureState(struct intel_context *intel);
315 extern void i915InitTextureFuncs(struct dd_function_table *functions);
316
317 /*======================================================================
318 * i915_metaops.c
319 */
320 void i915InitMetaFuncs(struct i915_context *i915);
321
322
323 /*======================================================================
324 * i915_fragprog.c
325 */
326 extern void i915ValidateFragmentProgram(struct i915_context *i915);
327 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
328
329 /*======================================================================
330 * Inline conversion functions. These are better-typed than the
331 * macros used previously:
332 */
333 static INLINE struct i915_context *
334 i915_context(GLcontext * ctx)
335 {
336 return (struct i915_context *) ctx;
337 }
338
339
340
341 #define I915_CONTEXT(ctx) i915_context(ctx)
342
343
344
345 #endif