src/mesa/drivers/dri/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915CONTEXT_INC
  29 #define I915CONTEXT_INC
  30
  31 #include "intel_context.h"
  32
  33 #define I915_FALLBACK_TEXTURE            0x1000
  34 #define I915_FALLBACK_COLORMASK          0x2000
  35 #define I915_FALLBACK_STENCIL            0x4000
  36 #define I915_FALLBACK_STIPPLE            0x8000
  37 #define I915_FALLBACK_PROGRAM            0x10000
  38 #define I915_FALLBACK_LOGICOP            0x20000
  39 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
  40 #define I915_FALLBACK_POINT_SMOOTH       0x80000
  41 #define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN  0x100000
  42 #define I915_FALLBACK_DRAW_OFFSET        0x200000
  43 #define I915_FALLBACK_COORD_REPLACE      0x400000
  44
  45 #define I915_UPLOAD_CTX              0x1
  46 #define I915_UPLOAD_BUFFERS          0x2
  47 #define I915_UPLOAD_STIPPLE          0x4
  48 #define I915_UPLOAD_PROGRAM          0x8
  49 #define I915_UPLOAD_CONSTANTS        0x10
  50 #define I915_UPLOAD_INVARIENT        0x40
  51 #define I915_UPLOAD_DEFAULTS         0x80
  52 #define I915_UPLOAD_RASTER_RULES     0x100
  53 #define I915_UPLOAD_BLEND            0x200
  54 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
  55 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
  56 #define I915_UPLOAD_TEX_0_SHIFT      16
  57
  58
  59 /* State structure offsets - these will probably disappear.
  60  */
  61 #define I915_DESTREG_CBUFADDR0 0
  62 #define I915_DESTREG_CBUFADDR1 1
  63 #define I915_DESTREG_DBUFADDR0 3
  64 #define I915_DESTREG_DBUFADDR1 4
  65 #define I915_DESTREG_DV0 6
  66 #define I915_DESTREG_DV1 7
  67 #define I915_DESTREG_SR0 8
  68 #define I915_DESTREG_SR1 9
  69 #define I915_DESTREG_SR2 10
  70 #define I915_DESTREG_SENABLE 11
  71 #define I915_DESTREG_DRAWRECT0 12
  72 #define I915_DESTREG_DRAWRECT1 13
  73 #define I915_DESTREG_DRAWRECT2 14
  74 #define I915_DESTREG_DRAWRECT3 15
  75 #define I915_DESTREG_DRAWRECT4 16
  76 #define I915_DESTREG_DRAWRECT5 17
  77 #define I915_DEST_SETUP_SIZE 18
  78
  79 #define I915_CTXREG_STATE4              0
  80 #define I915_CTXREG_LI                  1
  81 #define I915_CTXREG_LIS2                2
  82 #define I915_CTXREG_LIS3                3
  83 #define I915_CTXREG_LIS4                4
  84 #define I915_CTXREG_LIS5                5
  85 #define I915_CTXREG_LIS6                6
  86 #define I915_CTXREG_BF_STENCIL_OPS      7
  87 #define I915_CTXREG_BF_STENCIL_MASKS    8
  88 #define I915_CTX_SETUP_SIZE             9
  89
  90 #define I915_BLENDREG_IAB               0
  91 #define I915_BLENDREG_BLENDCOLOR0       1
  92 #define I915_BLENDREG_BLENDCOLOR1       2
  93 #define I915_BLEND_SETUP_SIZE           3
  94
  95 #define I915_STPREG_ST0        0
  96 #define I915_STPREG_ST1        1
  97 #define I915_STP_SETUP_SIZE    2
  98
  99 #define I915_TEXREG_MS3        1
 100 #define I915_TEXREG_MS4        2
 101 #define I915_TEXREG_SS2        3
 102 #define I915_TEXREG_SS3        4
 103 #define I915_TEXREG_SS4        5
 104 #define I915_TEX_SETUP_SIZE    6
 105
 106 #define I915_DEFREG_C0    0
 107 #define I915_DEFREG_C1    1
 108 #define I915_DEFREG_S0    2
 109 #define I915_DEFREG_S1    3
 110 #define I915_DEFREG_Z0    4
 111 #define I915_DEFREG_Z1    5
 112 #define I915_DEF_SETUP_SIZE    6
 113
 114 enum {
 115    I915_RASTER_RULES,
 116    I915_RASTER_RULES_SETUP_SIZE,
 117 };
 118
 119 #define I915_TEX_UNITS 8
 120 #define I915_WPOS_TEX_INVALID 0xff
 121
 122 #define I915_MAX_CONSTANT      32
 123 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 124
 125 #define I915_MAX_TEX_INDIRECT 4
 126 #define I915_MAX_TEX_INSN     32
 127 #define I915_MAX_ALU_INSN     64
 128 #define I915_MAX_DECL_INSN    27
 129 #define I915_MAX_TEMPORARY    16
 130
 131 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
 132                                 I915_MAX_TEX_INSN + \
 133                                 I915_MAX_ALU_INSN)
 134
 135 /* Maximum size of the program packet, which matches the limits on
 136  * decl, tex, and ALU instructions.
 137  */
 138 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
 139
 140 /* Hardware version of a parsed fragment program.  "Derived" from the
 141  * mesa fragment_program struct.
 142  */
 143 struct i915_fragment_program
 144 {
 145    struct gl_program FragProg;
 146
 147    bool translated;
 148    bool params_uptodate;
 149    bool on_hardware;
 150    bool error;             /* If program is malformed for any reason. */
 151
 152    /** Record of which phases R registers were last written in. */
 153    GLuint register_phases[16];
 154    GLuint indirections;
 155    GLuint nr_tex_indirect;
 156    GLuint nr_tex_insn;
 157    GLuint nr_alu_insn;
 158    GLuint nr_decl_insn;
 159
 160
 161
 162
 163    /* TODO: split between the stored representation of a program and
 164     * the state used to build that representation.
 165     */
 166    struct gl_context *ctx;
 167
 168    /* declarations contains the packet header. */
 169    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
 170    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
 171
 172    GLfloat constant[I915_MAX_CONSTANT][4];
 173    GLuint constant_flags[I915_MAX_CONSTANT];
 174    GLuint nr_constants;
 175
 176    GLuint *csr;                 /* Cursor, points into program.
 177                                  */
 178
 179    GLuint *decl;                /* Cursor, points into declarations.
 180                                  */
 181
 182    GLuint decl_s;               /* flags for which s regs need to be decl'd */
 183    GLuint decl_t;               /* flags for which t regs need to be decl'd */
 184
 185    GLuint temp_flag;            /* Tracks temporary regs which are in
 186                                  * use.
 187                                  */
 188
 189    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
 190                                  * use.
 191                                  */
 192
 193
 194    /* Track which R registers are "live" for each instruction.
 195     * A register is live between the time it's written to and the last time
 196     * it's read. */
 197    GLuint usedRegs[I915_MAX_INSN];
 198
 199    /* Helpers for i915_fragprog.c:
 200     */
 201    uint8_t texcoord_mapping[I915_TEX_UNITS];
 202    uint8_t wpos_tex;
 203    bool depth_written;
 204
 205    struct
 206    {
 207       GLuint reg;               /* Hardware constant idx */
 208       const GLfloat *values;    /* Pointer to tracked values */
 209    } param[I915_MAX_CONSTANT];
 210    GLuint nr_params;
 211 };
 212
 213 struct i915_hw_state
 214 {
 215    GLuint Ctx[I915_CTX_SETUP_SIZE];
 216    GLuint Blend[I915_BLEND_SETUP_SIZE];
 217    GLuint Buffer[I915_DEST_SETUP_SIZE];
 218    GLuint Stipple[I915_STP_SETUP_SIZE];
 219    GLuint Defaults[I915_DEF_SETUP_SIZE];
 220    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
 221    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
 222    GLuint Constant[I915_CONSTANT_SIZE];
 223    GLuint ConstantSize;
 224    GLuint Program[I915_PROGRAM_SIZE];
 225    GLuint ProgramSize;
 226
 227    /* Region pointers for relocation:
 228     */
 229    struct intel_region *draw_region;
 230    struct intel_region *depth_region;
 231 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 232
 233    /* Regions aren't actually that appropriate here as the memory may
 234     * be from a PBO or FBO.  Will have to do this for draw and depth for
 235     * FBO's...
 236     */
 237    drm_intel_bo *tex_buffer[I915_TEX_UNITS];
 238    GLuint tex_offset[I915_TEX_UNITS];
 239
 240
 241    GLuint active;               /* I915_UPLOAD_* */
 242    GLuint emitted;              /* I915_UPLOAD_* */
 243 };
 244
 245 struct i915_context
 246 {
 247    struct intel_context intel;
 248
 249    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
 250
 251
 252    struct i915_fragment_program *current_program;
 253
 254    drm_intel_bo *current_vb_bo;
 255    unsigned int current_vertex_size;
 256
 257    struct i915_hw_state state;
 258    uint32_t last_draw_offset;
 259    GLuint last_sampler;
 260 };
 261
 262
 263 #define I915_STATECHANGE(i915, flag)                                    \
 264 do {                                                                    \
 265    INTEL_FIREVERTICES( &(i915)->intel );                                        \
 266    (i915)->state.emitted &= ~(flag);                                    \
 267 } while (0)
 268
 269 #define I915_ACTIVESTATE(i915, flag, mode)                      \
 270 do {                                                            \
 271    INTEL_FIREVERTICES( &(i915)->intel );                                \
 272    if (mode)                                                    \
 273       (i915)->state.active |= (flag);                           \
 274    else                                                         \
 275       (i915)->state.active &= ~(flag);                          \
 276 } while (0)
 277
 278
 279 /*======================================================================
 280  * i915_vtbl.c
 281  */
 282 extern void i915InitVtbl(struct i915_context *i915);
 283
 284 extern void
 285 i915_state_draw_region(struct intel_context *intel,
 286                        struct i915_hw_state *state,
 287                        struct intel_region *color_region,
 288                        struct intel_region *depth_region);
 289
 290
 291
 292 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 293 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
 294 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
 295 do {                                                                    \
 296    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
 297    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
 298    s4 |= S4;                                                            \
 299    intel->vertex_attr_count++;                                          \
 300    offset += (SZ);                                                      \
 301 } while (0)
 302
 303 #define EMIT_PAD( N )                                                   \
 304 do {                                                                    \
 305    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
 306    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
 307    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
 308    intel->vertex_attr_count++;                                          \
 309    offset += (N);                                                       \
 310 } while (0)
 311
 312
 313
 314 /*======================================================================
 315  * i915_context.c
 316  */
 317 extern bool i915CreateContext(int api,
 318                               const struct gl_config * mesaVis,
 319                               __DRIcontext * driContextPriv,
 320                               unsigned major_version,
 321                               unsigned minor_version,
 322                               uint32_t flags,
 323                               unsigned *error,
 324                               void *sharedContextPrivate);
 325
 326
 327 /*======================================================================
 328  * i915_debug.c
 329  */
 330 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
 331 extern void i915_print_ureg(const char *msg, GLuint ureg);
 332
 333
 334 /*======================================================================
 335  * i915_state.c
 336  */
 337 extern void i915InitStateFunctions(struct dd_function_table *functions);
 338 extern void i915InitState(struct i915_context *i915);
 339 extern void i915_update_stencil(struct gl_context * ctx);
 340 extern void i915_update_provoking_vertex(struct gl_context *ctx);
 341 extern void i915_update_sprite_point_enable(struct gl_context *ctx);
 342
 343
 344 /*======================================================================
 345  * i915_tex.c
 346  */
 347 extern void i915UpdateTextureState(struct intel_context *intel);
 348 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 349
 350 /*======================================================================
 351  * i915_fragprog.c
 352  */
 353 extern void i915ValidateFragmentProgram(struct i915_context *i915);
 354 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
 355
 356 /*======================================================================
 357  * Inline conversion functions.  These are better-typed than the
 358  * macros used previously:
 359  */
 360 static inline struct i915_context *
 361 i915_context(struct gl_context * ctx)
 362 {
 363    return (struct i915_context *) ctx;
 364 }
 365
 366
 367
 368 #define I915_CONTEXT(ctx)       i915_context(ctx)
 369
 370
 371
 372 #endif