[intel] Remove the dead intel->need_flush member.
[mesa.git] / src / mesa / drivers / dri / i915 / i915_fragprog.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "glheader.h"
29 #include "macros.h"
30 #include "enums.h"
31
32 #include "shader/prog_instruction.h"
33 #include "shader/prog_parameter.h"
34 #include "shader/program.h"
35 #include "shader/programopt.h"
36
37 #include "tnl/tnl.h"
38 #include "tnl/t_context.h"
39
40 #include "intel_batchbuffer.h"
41
42 #include "i915_reg.h"
43 #include "i915_context.h"
44 #include "i915_program.h"
45
46
47
48 /* 1, -1/3!, 1/5!, -1/7! */
49 static const GLfloat sin_constants[4] = { 1.0,
50 -1.0 / (3 * 2 * 1),
51 1.0 / (5 * 4 * 3 * 2 * 1),
52 -1.0 / (7 * 6 * 5 * 4 * 3 * 2 * 1)
53 };
54
55 /* 1, -1/2!, 1/4!, -1/6! */
56 static const GLfloat cos_constants[4] = { 1.0,
57 -1.0 / (2 * 1),
58 1.0 / (4 * 3 * 2 * 1),
59 -1.0 / (6 * 5 * 4 * 3 * 2 * 1)
60 };
61
62 /**
63 * Retrieve a ureg for the given source register. Will emit
64 * constants, apply swizzling and negation as needed.
65 */
66 static GLuint
67 src_vector(struct i915_fragment_program *p,
68 const struct prog_src_register *source,
69 const struct gl_fragment_program *program)
70 {
71 GLuint src;
72
73 switch (source->File) {
74
75 /* Registers:
76 */
77 case PROGRAM_TEMPORARY:
78 if (source->Index >= I915_MAX_TEMPORARY) {
79 i915_program_error(p, "Exceeded max temporary reg");
80 return 0;
81 }
82 src = UREG(REG_TYPE_R, source->Index);
83 break;
84 case PROGRAM_INPUT:
85 switch (source->Index) {
86 case FRAG_ATTRIB_WPOS:
87 src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
88 break;
89 case FRAG_ATTRIB_COL0:
90 src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
91 break;
92 case FRAG_ATTRIB_COL1:
93 src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
94 src = swizzle(src, X, Y, Z, ONE);
95 break;
96 case FRAG_ATTRIB_FOGC:
97 src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
98 src = swizzle(src, W, W, W, W);
99 break;
100 case FRAG_ATTRIB_TEX0:
101 case FRAG_ATTRIB_TEX1:
102 case FRAG_ATTRIB_TEX2:
103 case FRAG_ATTRIB_TEX3:
104 case FRAG_ATTRIB_TEX4:
105 case FRAG_ATTRIB_TEX5:
106 case FRAG_ATTRIB_TEX6:
107 case FRAG_ATTRIB_TEX7:
108 src = i915_emit_decl(p, REG_TYPE_T,
109 T_TEX0 + (source->Index - FRAG_ATTRIB_TEX0),
110 D0_CHANNEL_ALL);
111 break;
112
113 default:
114 i915_program_error(p, "Bad source->Index");
115 return 0;
116 }
117 break;
118
119 /* Various paramters and env values. All emitted to
120 * hardware as program constants.
121 */
122 case PROGRAM_LOCAL_PARAM:
123 src = i915_emit_param4fv(p, program->Base.LocalParams[source->Index]);
124 break;
125
126 case PROGRAM_ENV_PARAM:
127 src =
128 i915_emit_param4fv(p,
129 p->ctx->FragmentProgram.Parameters[source->
130 Index]);
131 break;
132
133 case PROGRAM_CONSTANT:
134 case PROGRAM_STATE_VAR:
135 case PROGRAM_NAMED_PARAM:
136 src =
137 i915_emit_param4fv(p,
138 program->Base.Parameters->ParameterValues[source->
139 Index]);
140 break;
141
142 default:
143 i915_program_error(p, "Bad source->File");
144 return 0;
145 }
146
147 src = swizzle(src,
148 GET_SWZ(source->Swizzle, 0),
149 GET_SWZ(source->Swizzle, 1),
150 GET_SWZ(source->Swizzle, 2), GET_SWZ(source->Swizzle, 3));
151
152 if (source->NegateBase)
153 src = negate(src,
154 GET_BIT(source->NegateBase, 0),
155 GET_BIT(source->NegateBase, 1),
156 GET_BIT(source->NegateBase, 2),
157 GET_BIT(source->NegateBase, 3));
158
159 return src;
160 }
161
162
163 static GLuint
164 get_result_vector(struct i915_fragment_program *p,
165 const struct prog_instruction *inst)
166 {
167 switch (inst->DstReg.File) {
168 case PROGRAM_OUTPUT:
169 switch (inst->DstReg.Index) {
170 case FRAG_RESULT_COLR:
171 return UREG(REG_TYPE_OC, 0);
172 case FRAG_RESULT_DEPR:
173 p->depth_written = 1;
174 return UREG(REG_TYPE_OD, 0);
175 default:
176 i915_program_error(p, "Bad inst->DstReg.Index");
177 return 0;
178 }
179 case PROGRAM_TEMPORARY:
180 return UREG(REG_TYPE_R, inst->DstReg.Index);
181 default:
182 i915_program_error(p, "Bad inst->DstReg.File");
183 return 0;
184 }
185 }
186
187 static GLuint
188 get_result_flags(const struct prog_instruction *inst)
189 {
190 GLuint flags = 0;
191
192 if (inst->SaturateMode == SATURATE_ZERO_ONE)
193 flags |= A0_DEST_SATURATE;
194 if (inst->DstReg.WriteMask & WRITEMASK_X)
195 flags |= A0_DEST_CHANNEL_X;
196 if (inst->DstReg.WriteMask & WRITEMASK_Y)
197 flags |= A0_DEST_CHANNEL_Y;
198 if (inst->DstReg.WriteMask & WRITEMASK_Z)
199 flags |= A0_DEST_CHANNEL_Z;
200 if (inst->DstReg.WriteMask & WRITEMASK_W)
201 flags |= A0_DEST_CHANNEL_W;
202
203 return flags;
204 }
205
206 static GLuint
207 translate_tex_src_target(struct i915_fragment_program *p, GLubyte bit)
208 {
209 switch (bit) {
210 case TEXTURE_1D_INDEX:
211 return D0_SAMPLE_TYPE_2D;
212 case TEXTURE_2D_INDEX:
213 return D0_SAMPLE_TYPE_2D;
214 case TEXTURE_RECT_INDEX:
215 return D0_SAMPLE_TYPE_2D;
216 case TEXTURE_3D_INDEX:
217 return D0_SAMPLE_TYPE_VOLUME;
218 case TEXTURE_CUBE_INDEX:
219 return D0_SAMPLE_TYPE_CUBE;
220 default:
221 i915_program_error(p, "TexSrcBit");
222 return 0;
223 }
224 }
225
226 #define EMIT_TEX( OP ) \
227 do { \
228 GLuint dim = translate_tex_src_target( p, inst->TexSrcTarget ); \
229 GLuint sampler = i915_emit_decl(p, REG_TYPE_S, \
230 inst->TexSrcUnit, dim); \
231 GLuint coord = src_vector( p, &inst->SrcReg[0], program); \
232 /* Texel lookup */ \
233 \
234 i915_emit_texld( p, get_live_regs(p, inst), \
235 get_result_vector( p, inst ), \
236 get_result_flags( inst ), \
237 sampler, \
238 coord, \
239 OP); \
240 } while (0)
241
242 #define EMIT_ARITH( OP, N ) \
243 do { \
244 i915_emit_arith( p, \
245 OP, \
246 get_result_vector( p, inst ), \
247 get_result_flags( inst ), 0, \
248 (N<1)?0:src_vector( p, &inst->SrcReg[0], program), \
249 (N<2)?0:src_vector( p, &inst->SrcReg[1], program), \
250 (N<3)?0:src_vector( p, &inst->SrcReg[2], program)); \
251 } while (0)
252
253 #define EMIT_1ARG_ARITH( OP ) EMIT_ARITH( OP, 1 )
254 #define EMIT_2ARG_ARITH( OP ) EMIT_ARITH( OP, 2 )
255 #define EMIT_3ARG_ARITH( OP ) EMIT_ARITH( OP, 3 )
256
257 /*
258 * TODO: consider moving this into core
259 */
260 static void calc_live_regs( struct i915_fragment_program *p )
261 {
262 const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
263 GLuint regsUsed = 0xffff0000;
264 GLint i;
265
266 for (i = program->Base.NumInstructions - 1; i >= 0; i--) {
267 struct prog_instruction *inst = &program->Base.Instructions[i];
268 int opArgs = _mesa_num_inst_src_regs(inst->Opcode);
269 int a;
270
271 /* Register is written to: unmark as live for this and preceeding ops */
272 if (inst->DstReg.File == PROGRAM_TEMPORARY)
273 regsUsed &= ~(1 << inst->DstReg.Index);
274
275 for (a = 0; a < opArgs; a++) {
276 /* Register is read from: mark as live for this and preceeding ops */
277 if (inst->SrcReg[a].File == PROGRAM_TEMPORARY)
278 regsUsed |= 1 << inst->SrcReg[a].Index;
279 }
280
281 p->usedRegs[i] = regsUsed;
282 }
283 }
284
285 static GLuint get_live_regs( struct i915_fragment_program *p,
286 const struct prog_instruction *inst )
287 {
288 const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
289 GLuint nr = inst - program->Base.Instructions;
290
291 return p->usedRegs[nr];
292 }
293
294
295 /* Possible concerns:
296 *
297 * SIN, COS -- could use another taylor step?
298 * LIT -- results seem a little different to sw mesa
299 * LOG -- different to mesa on negative numbers, but this is conformant.
300 *
301 * Parse failures -- Mesa doesn't currently give a good indication
302 * internally whether a particular program string parsed or not. This
303 * can lead to confusion -- hopefully we cope with it ok now.
304 *
305 */
306 static void
307 upload_program(struct i915_fragment_program *p)
308 {
309 const struct gl_fragment_program *program =
310 p->ctx->FragmentProgram._Current;
311 const struct prog_instruction *inst = program->Base.Instructions;
312
313 /* _mesa_debug_fp_inst(program->Base.NumInstructions, inst); */
314
315 /* Is this a parse-failed program? Ensure a valid program is
316 * loaded, as the flagging of an error isn't sufficient to stop
317 * this being uploaded to hardware.
318 */
319 if (inst[0].Opcode == OPCODE_END) {
320 GLuint tmp = i915_get_utemp(p);
321 i915_emit_arith(p,
322 A0_MOV,
323 UREG(REG_TYPE_OC, 0),
324 A0_DEST_CHANNEL_ALL, 0,
325 swizzle(tmp, ONE, ZERO, ONE, ONE), 0, 0);
326 return;
327 }
328
329 if (program->Base.NumInstructions > I915_MAX_INSN) {
330 i915_program_error( p, "Exceeded max instructions" );
331 return;
332 }
333
334 /* Not always needed:
335 */
336 calc_live_regs(p);
337
338 while (1) {
339 GLuint src0, src1, src2, flags;
340 GLuint tmp = 0;
341
342 switch (inst->Opcode) {
343 case OPCODE_ABS:
344 src0 = src_vector(p, &inst->SrcReg[0], program);
345 i915_emit_arith(p,
346 A0_MAX,
347 get_result_vector(p, inst),
348 get_result_flags(inst), 0,
349 src0, negate(src0, 1, 1, 1, 1), 0);
350 break;
351
352 case OPCODE_ADD:
353 EMIT_2ARG_ARITH(A0_ADD);
354 break;
355
356 case OPCODE_CMP:
357 src0 = src_vector(p, &inst->SrcReg[0], program);
358 src1 = src_vector(p, &inst->SrcReg[1], program);
359 src2 = src_vector(p, &inst->SrcReg[2], program);
360 i915_emit_arith(p, A0_CMP, get_result_vector(p, inst), get_result_flags(inst), 0, src0, src2, src1); /* NOTE: order of src2, src1 */
361 break;
362
363 case OPCODE_COS:
364 src0 = src_vector(p, &inst->SrcReg[0], program);
365 tmp = i915_get_utemp(p);
366
367 i915_emit_arith(p,
368 A0_MUL,
369 tmp, A0_DEST_CHANNEL_X, 0,
370 src0, i915_emit_const1f(p, 1.0 / (M_PI)), 0);
371
372 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
373
374 /* By choosing different taylor constants, could get rid of this mul:
375 */
376 i915_emit_arith(p,
377 A0_MUL,
378 tmp, A0_DEST_CHANNEL_X, 0,
379 tmp, i915_emit_const1f(p, (M_PI)), 0);
380
381 /*
382 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
383 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
384 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
385 * result = DP4 t0, cos_constants
386 */
387 i915_emit_arith(p,
388 A0_MUL,
389 tmp, A0_DEST_CHANNEL_XY, 0,
390 swizzle(tmp, X, X, ONE, ONE),
391 swizzle(tmp, X, ONE, ONE, ONE), 0);
392
393 i915_emit_arith(p,
394 A0_MUL,
395 tmp, A0_DEST_CHANNEL_XYZ, 0,
396 swizzle(tmp, X, Y, X, ONE),
397 swizzle(tmp, X, X, ONE, ONE), 0);
398
399 i915_emit_arith(p,
400 A0_MUL,
401 tmp, A0_DEST_CHANNEL_XYZ, 0,
402 swizzle(tmp, X, X, Z, ONE),
403 swizzle(tmp, Z, ONE, ONE, ONE), 0);
404
405 i915_emit_arith(p,
406 A0_DP4,
407 get_result_vector(p, inst),
408 get_result_flags(inst), 0,
409 swizzle(tmp, ONE, Z, Y, X),
410 i915_emit_const4fv(p, cos_constants), 0);
411
412 break;
413
414 case OPCODE_DP3:
415 EMIT_2ARG_ARITH(A0_DP3);
416 break;
417
418 case OPCODE_DP4:
419 EMIT_2ARG_ARITH(A0_DP4);
420 break;
421
422 case OPCODE_DPH:
423 src0 = src_vector(p, &inst->SrcReg[0], program);
424 src1 = src_vector(p, &inst->SrcReg[1], program);
425
426 i915_emit_arith(p,
427 A0_DP4,
428 get_result_vector(p, inst),
429 get_result_flags(inst), 0,
430 swizzle(src0, X, Y, Z, ONE), src1, 0);
431 break;
432
433 case OPCODE_DST:
434 src0 = src_vector(p, &inst->SrcReg[0], program);
435 src1 = src_vector(p, &inst->SrcReg[1], program);
436
437 /* result[0] = 1 * 1;
438 * result[1] = a[1] * b[1];
439 * result[2] = a[2] * 1;
440 * result[3] = 1 * b[3];
441 */
442 i915_emit_arith(p,
443 A0_MUL,
444 get_result_vector(p, inst),
445 get_result_flags(inst), 0,
446 swizzle(src0, ONE, Y, Z, ONE),
447 swizzle(src1, ONE, Y, ONE, W), 0);
448 break;
449
450 case OPCODE_EX2:
451 src0 = src_vector(p, &inst->SrcReg[0], program);
452
453 i915_emit_arith(p,
454 A0_EXP,
455 get_result_vector(p, inst),
456 get_result_flags(inst), 0,
457 swizzle(src0, X, X, X, X), 0, 0);
458 break;
459
460 case OPCODE_FLR:
461 EMIT_1ARG_ARITH(A0_FLR);
462 break;
463
464 case OPCODE_FRC:
465 EMIT_1ARG_ARITH(A0_FRC);
466 break;
467
468 case OPCODE_KIL:
469 src0 = src_vector(p, &inst->SrcReg[0], program);
470 tmp = i915_get_utemp(p);
471
472 i915_emit_texld(p, get_live_regs(p, inst),
473 tmp, A0_DEST_CHANNEL_ALL, /* use a dummy dest reg */
474 0, src0, T0_TEXKILL);
475 break;
476
477 case OPCODE_LG2:
478 src0 = src_vector(p, &inst->SrcReg[0], program);
479
480 i915_emit_arith(p,
481 A0_LOG,
482 get_result_vector(p, inst),
483 get_result_flags(inst), 0,
484 swizzle(src0, X, X, X, X), 0, 0);
485 break;
486
487 case OPCODE_LIT:
488 src0 = src_vector(p, &inst->SrcReg[0], program);
489 tmp = i915_get_utemp(p);
490
491 /* tmp = max( a.xyzw, a.00zw )
492 * XXX: Clamp tmp.w to -128..128
493 * tmp.y = log(tmp.y)
494 * tmp.y = tmp.w * tmp.y
495 * tmp.y = exp(tmp.y)
496 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
497 */
498 i915_emit_arith(p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0,
499 src0, swizzle(src0, ZERO, ZERO, Z, W), 0);
500
501 i915_emit_arith(p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0,
502 swizzle(tmp, Y, Y, Y, Y), 0, 0);
503
504 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0,
505 swizzle(tmp, ZERO, Y, ZERO, ZERO),
506 swizzle(tmp, ZERO, W, ZERO, ZERO), 0);
507
508 i915_emit_arith(p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0,
509 swizzle(tmp, Y, Y, Y, Y), 0, 0);
510
511 i915_emit_arith(p, A0_CMP,
512 get_result_vector(p, inst),
513 get_result_flags(inst), 0,
514 negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
515 swizzle(tmp, ONE, X, ZERO, ONE),
516 swizzle(tmp, ONE, X, Y, ONE));
517
518 break;
519
520 case OPCODE_LRP:
521 src0 = src_vector(p, &inst->SrcReg[0], program);
522 src1 = src_vector(p, &inst->SrcReg[1], program);
523 src2 = src_vector(p, &inst->SrcReg[2], program);
524 flags = get_result_flags(inst);
525 tmp = i915_get_utemp(p);
526
527 /* b*a + c*(1-a)
528 *
529 * b*a + c - ca
530 *
531 * tmp = b*a + c,
532 * result = (-c)*a + tmp
533 */
534 i915_emit_arith(p, A0_MAD, tmp,
535 flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
536
537 i915_emit_arith(p, A0_MAD,
538 get_result_vector(p, inst),
539 flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
540 break;
541
542 case OPCODE_MAD:
543 EMIT_3ARG_ARITH(A0_MAD);
544 break;
545
546 case OPCODE_MAX:
547 EMIT_2ARG_ARITH(A0_MAX);
548 break;
549
550 case OPCODE_MIN:
551 src0 = src_vector(p, &inst->SrcReg[0], program);
552 src1 = src_vector(p, &inst->SrcReg[1], program);
553 tmp = i915_get_utemp(p);
554 flags = get_result_flags(inst);
555
556 i915_emit_arith(p,
557 A0_MAX,
558 tmp, flags & A0_DEST_CHANNEL_ALL, 0,
559 negate(src0, 1, 1, 1, 1),
560 negate(src1, 1, 1, 1, 1), 0);
561
562 i915_emit_arith(p,
563 A0_MOV,
564 get_result_vector(p, inst),
565 flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
566 break;
567
568 case OPCODE_MOV:
569 EMIT_1ARG_ARITH(A0_MOV);
570 break;
571
572 case OPCODE_MUL:
573 EMIT_2ARG_ARITH(A0_MUL);
574 break;
575
576 case OPCODE_POW:
577 src0 = src_vector(p, &inst->SrcReg[0], program);
578 src1 = src_vector(p, &inst->SrcReg[1], program);
579 tmp = i915_get_utemp(p);
580 flags = get_result_flags(inst);
581
582 /* XXX: masking on intermediate values, here and elsewhere.
583 */
584 i915_emit_arith(p,
585 A0_LOG,
586 tmp, A0_DEST_CHANNEL_X, 0,
587 swizzle(src0, X, X, X, X), 0, 0);
588
589 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_X, 0, tmp, src1, 0);
590
591
592 i915_emit_arith(p,
593 A0_EXP,
594 get_result_vector(p, inst),
595 flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
596
597 break;
598
599 case OPCODE_RCP:
600 src0 = src_vector(p, &inst->SrcReg[0], program);
601
602 i915_emit_arith(p,
603 A0_RCP,
604 get_result_vector(p, inst),
605 get_result_flags(inst), 0,
606 swizzle(src0, X, X, X, X), 0, 0);
607 break;
608
609 case OPCODE_RSQ:
610
611 src0 = src_vector(p, &inst->SrcReg[0], program);
612
613 i915_emit_arith(p,
614 A0_RSQ,
615 get_result_vector(p, inst),
616 get_result_flags(inst), 0,
617 swizzle(src0, X, X, X, X), 0, 0);
618 break;
619
620 case OPCODE_SCS:
621 src0 = src_vector(p, &inst->SrcReg[0], program);
622 tmp = i915_get_utemp(p);
623
624 /*
625 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
626 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
627 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
628 * scs.x = DP4 t1, sin_constants
629 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
630 * scs.y = DP4 t1, cos_constants
631 */
632 i915_emit_arith(p,
633 A0_MUL,
634 tmp, A0_DEST_CHANNEL_XY, 0,
635 swizzle(src0, X, X, ONE, ONE),
636 swizzle(src0, X, ONE, ONE, ONE), 0);
637
638 i915_emit_arith(p,
639 A0_MUL,
640 tmp, A0_DEST_CHANNEL_ALL, 0,
641 swizzle(tmp, X, Y, X, Y),
642 swizzle(tmp, X, X, ONE, ONE), 0);
643
644 if (inst->DstReg.WriteMask & WRITEMASK_Y) {
645 GLuint tmp1;
646
647 if (inst->DstReg.WriteMask & WRITEMASK_X)
648 tmp1 = i915_get_utemp(p);
649 else
650 tmp1 = tmp;
651
652 i915_emit_arith(p,
653 A0_MUL,
654 tmp1, A0_DEST_CHANNEL_ALL, 0,
655 swizzle(tmp, X, Y, Y, W),
656 swizzle(tmp, X, Z, ONE, ONE), 0);
657
658 i915_emit_arith(p,
659 A0_DP4,
660 get_result_vector(p, inst),
661 A0_DEST_CHANNEL_Y, 0,
662 swizzle(tmp1, W, Z, Y, X),
663 i915_emit_const4fv(p, sin_constants), 0);
664 }
665
666 if (inst->DstReg.WriteMask & WRITEMASK_X) {
667 i915_emit_arith(p,
668 A0_MUL,
669 tmp, A0_DEST_CHANNEL_XYZ, 0,
670 swizzle(tmp, X, X, Z, ONE),
671 swizzle(tmp, Z, ONE, ONE, ONE), 0);
672
673 i915_emit_arith(p,
674 A0_DP4,
675 get_result_vector(p, inst),
676 A0_DEST_CHANNEL_X, 0,
677 swizzle(tmp, ONE, Z, Y, X),
678 i915_emit_const4fv(p, cos_constants), 0);
679 }
680 break;
681
682 case OPCODE_SGE:
683 EMIT_2ARG_ARITH(A0_SGE);
684 break;
685
686 case OPCODE_SIN:
687 src0 = src_vector(p, &inst->SrcReg[0], program);
688 tmp = i915_get_utemp(p);
689
690 i915_emit_arith(p,
691 A0_MUL,
692 tmp, A0_DEST_CHANNEL_X, 0,
693 src0, i915_emit_const1f(p, 1.0 / (M_PI)), 0);
694
695 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
696
697 /* By choosing different taylor constants, could get rid of this mul:
698 */
699 i915_emit_arith(p,
700 A0_MUL,
701 tmp, A0_DEST_CHANNEL_X, 0,
702 tmp, i915_emit_const1f(p, (M_PI)), 0);
703
704 /*
705 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
706 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
707 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
708 * result = DP4 t1.wzyx, sin_constants
709 */
710 i915_emit_arith(p,
711 A0_MUL,
712 tmp, A0_DEST_CHANNEL_XY, 0,
713 swizzle(tmp, X, X, ONE, ONE),
714 swizzle(tmp, X, ONE, ONE, ONE), 0);
715
716 i915_emit_arith(p,
717 A0_MUL,
718 tmp, A0_DEST_CHANNEL_ALL, 0,
719 swizzle(tmp, X, Y, X, Y),
720 swizzle(tmp, X, X, ONE, ONE), 0);
721
722 i915_emit_arith(p,
723 A0_MUL,
724 tmp, A0_DEST_CHANNEL_ALL, 0,
725 swizzle(tmp, X, Y, Y, W),
726 swizzle(tmp, X, Z, ONE, ONE), 0);
727
728 i915_emit_arith(p,
729 A0_DP4,
730 get_result_vector(p, inst),
731 get_result_flags(inst), 0,
732 swizzle(tmp, W, Z, Y, X),
733 i915_emit_const4fv(p, sin_constants), 0);
734 break;
735
736 case OPCODE_SLT:
737 EMIT_2ARG_ARITH(A0_SLT);
738 break;
739
740 case OPCODE_SUB:
741 src0 = src_vector(p, &inst->SrcReg[0], program);
742 src1 = src_vector(p, &inst->SrcReg[1], program);
743
744 i915_emit_arith(p,
745 A0_ADD,
746 get_result_vector(p, inst),
747 get_result_flags(inst), 0,
748 src0, negate(src1, 1, 1, 1, 1), 0);
749 break;
750
751 case OPCODE_SWZ:
752 EMIT_1ARG_ARITH(A0_MOV); /* extended swizzle handled natively */
753 break;
754
755 case OPCODE_TEX:
756 EMIT_TEX(T0_TEXLD);
757 break;
758
759 case OPCODE_TXB:
760 EMIT_TEX(T0_TEXLDB);
761 break;
762
763 case OPCODE_TXP:
764 EMIT_TEX(T0_TEXLDP);
765 break;
766
767 case OPCODE_XPD:
768 /* Cross product:
769 * result.x = src0.y * src1.z - src0.z * src1.y;
770 * result.y = src0.z * src1.x - src0.x * src1.z;
771 * result.z = src0.x * src1.y - src0.y * src1.x;
772 * result.w = undef;
773 */
774 src0 = src_vector(p, &inst->SrcReg[0], program);
775 src1 = src_vector(p, &inst->SrcReg[1], program);
776 tmp = i915_get_utemp(p);
777
778 i915_emit_arith(p,
779 A0_MUL,
780 tmp, A0_DEST_CHANNEL_ALL, 0,
781 swizzle(src0, Z, X, Y, ONE),
782 swizzle(src1, Y, Z, X, ONE), 0);
783
784 i915_emit_arith(p,
785 A0_MAD,
786 get_result_vector(p, inst),
787 get_result_flags(inst), 0,
788 swizzle(src0, Y, Z, X, ONE),
789 swizzle(src1, Z, X, Y, ONE),
790 negate(tmp, 1, 1, 1, 0));
791 break;
792
793 case OPCODE_END:
794 return;
795
796 default:
797 i915_program_error(p, "bad opcode");
798 return;
799 }
800
801 inst++;
802 i915_release_utemps(p);
803 }
804 }
805
806 /* Rather than trying to intercept and jiggle depth writes during
807 * emit, just move the value into its correct position at the end of
808 * the program:
809 */
810 static void
811 fixup_depth_write(struct i915_fragment_program *p)
812 {
813 if (p->depth_written) {
814 GLuint depth = UREG(REG_TYPE_OD, 0);
815
816 i915_emit_arith(p,
817 A0_MOV,
818 depth, A0_DEST_CHANNEL_W, 0,
819 swizzle(depth, X, Y, Z, Z), 0, 0);
820 }
821 }
822
823
824 static void
825 check_wpos(struct i915_fragment_program *p)
826 {
827 GLuint inputs = p->FragProg.Base.InputsRead;
828 GLint i;
829
830 p->wpos_tex = -1;
831
832 for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
833 if (inputs & FRAG_BIT_TEX(i))
834 continue;
835 else if (inputs & FRAG_BIT_WPOS) {
836 p->wpos_tex = i;
837 inputs &= ~FRAG_BIT_WPOS;
838 }
839 }
840
841 if (inputs & FRAG_BIT_WPOS) {
842 i915_program_error(p, "No free texcoord for wpos value");
843 }
844 }
845
846
847 static void
848 translate_program(struct i915_fragment_program *p)
849 {
850 struct i915_context *i915 = I915_CONTEXT(p->ctx);
851
852 i915_init_program(i915, p);
853 check_wpos(p);
854 upload_program(p);
855 fixup_depth_write(p);
856 i915_fini_program(p);
857
858 p->translated = 1;
859 }
860
861
862 static void
863 track_params(struct i915_fragment_program *p)
864 {
865 GLint i;
866
867 if (p->nr_params)
868 _mesa_load_state_parameters(p->ctx, p->FragProg.Base.Parameters);
869
870 for (i = 0; i < p->nr_params; i++) {
871 GLint reg = p->param[i].reg;
872 COPY_4V(p->constant[reg], p->param[i].values);
873 }
874
875 p->params_uptodate = 1;
876 p->on_hardware = 0; /* overkill */
877 }
878
879
880 static void
881 i915BindProgram(GLcontext * ctx, GLenum target, struct gl_program *prog)
882 {
883 if (target == GL_FRAGMENT_PROGRAM_ARB) {
884 struct i915_context *i915 = I915_CONTEXT(ctx);
885 struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
886
887 if (i915->current_program == p)
888 return;
889
890 if (i915->current_program) {
891 i915->current_program->on_hardware = 0;
892 i915->current_program->params_uptodate = 0;
893 }
894
895 i915->current_program = p;
896
897 assert(p->on_hardware == 0);
898 assert(p->params_uptodate == 0);
899
900 }
901 }
902
903 static struct gl_program *
904 i915NewProgram(GLcontext * ctx, GLenum target, GLuint id)
905 {
906 switch (target) {
907 case GL_VERTEX_PROGRAM_ARB:
908 return _mesa_init_vertex_program(ctx, CALLOC_STRUCT(gl_vertex_program),
909 target, id);
910
911 case GL_FRAGMENT_PROGRAM_ARB:{
912 struct i915_fragment_program *prog =
913 CALLOC_STRUCT(i915_fragment_program);
914 if (prog) {
915 i915_init_program(I915_CONTEXT(ctx), prog);
916
917 return _mesa_init_fragment_program(ctx, &prog->FragProg,
918 target, id);
919 }
920 else
921 return NULL;
922 }
923
924 default:
925 /* Just fallback:
926 */
927 return _mesa_new_program(ctx, target, id);
928 }
929 }
930
931 static void
932 i915DeleteProgram(GLcontext * ctx, struct gl_program *prog)
933 {
934 if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
935 struct i915_context *i915 = I915_CONTEXT(ctx);
936 struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
937
938 if (i915->current_program == p)
939 i915->current_program = 0;
940 }
941
942 _mesa_delete_program(ctx, prog);
943 }
944
945
946 static GLboolean
947 i915IsProgramNative(GLcontext * ctx, GLenum target, struct gl_program *prog)
948 {
949 if (target == GL_FRAGMENT_PROGRAM_ARB) {
950 struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
951
952 if (!p->translated)
953 translate_program(p);
954
955 return !p->error;
956 }
957 else
958 return GL_TRUE;
959 }
960
961 static void
962 i915ProgramStringNotify(GLcontext * ctx,
963 GLenum target, struct gl_program *prog)
964 {
965 if (target == GL_FRAGMENT_PROGRAM_ARB) {
966 struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
967 p->translated = 0;
968
969 /* Hack: make sure fog is correctly enabled according to this
970 * fragment program's fog options.
971 */
972 if (p->FragProg.FogOption) {
973 /* add extra instructions to do fog, then turn off FogOption field */
974 _mesa_append_fog_code(ctx, &p->FragProg);
975 p->FragProg.FogOption = GL_NONE;
976 }
977 }
978
979 _tnl_program_string(ctx, target, prog);
980 }
981
982
983 void
984 i915ValidateFragmentProgram(struct i915_context *i915)
985 {
986 GLcontext *ctx = &i915->intel.ctx;
987 struct intel_context *intel = intel_context(ctx);
988 TNLcontext *tnl = TNL_CONTEXT(ctx);
989 struct vertex_buffer *VB = &tnl->vb;
990
991 struct i915_fragment_program *p =
992 (struct i915_fragment_program *) ctx->FragmentProgram._Current;
993
994 const GLuint inputsRead = p->FragProg.Base.InputsRead;
995 GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
996 GLuint s2 = S2_TEXCOORD_NONE;
997 int i, offset = 0;
998
999 if (i915->current_program != p) {
1000 if (i915->current_program) {
1001 i915->current_program->on_hardware = 0;
1002 i915->current_program->params_uptodate = 0;
1003 }
1004
1005 i915->current_program = p;
1006 }
1007
1008
1009 /* Important:
1010 */
1011 VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr;
1012
1013 if (!p->translated)
1014 translate_program(p);
1015
1016 intel->vertex_attr_count = 0;
1017 intel->wpos_offset = 0;
1018 intel->wpos_size = 0;
1019 intel->coloroffset = 0;
1020 intel->specoffset = 0;
1021
1022 if (inputsRead & FRAG_BITS_TEX_ANY) {
1023 EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16);
1024 }
1025 else {
1026 EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, S4_VFMT_XYZ, 12);
1027 }
1028
1029 if (inputsRead & FRAG_BIT_COL0) {
1030 intel->coloroffset = offset / 4;
1031 EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4);
1032 }
1033
1034 if ((inputsRead & (FRAG_BIT_COL1 | FRAG_BIT_FOGC)) ||
1035 i915->vertex_fog != I915_FOG_NONE) {
1036
1037 if (inputsRead & FRAG_BIT_COL1) {
1038 intel->specoffset = offset / 4;
1039 EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3);
1040 }
1041 else
1042 EMIT_PAD(3);
1043
1044 if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE)
1045 EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1);
1046 else
1047 EMIT_PAD(1);
1048 }
1049
1050 /* XXX this was disabled, but enabling this code helped fix the Glean
1051 * tfragprog1 fog tests.
1052 */
1053 #if 1
1054 if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) {
1055 EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4);
1056 }
1057 #endif
1058
1059 for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
1060 if (inputsRead & FRAG_BIT_TEX(i)) {
1061 int sz = VB->TexCoordPtr[i]->size;
1062
1063 s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
1064 s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
1065
1066 EMIT_ATTR(_TNL_ATTRIB_TEX0 + i, EMIT_SZ(sz), 0, sz * 4);
1067 }
1068 else if (i == p->wpos_tex) {
1069
1070 /* If WPOS is required, duplicate the XYZ position data in an
1071 * unused texture coordinate:
1072 */
1073 s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
1074 s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(3));
1075
1076 intel->wpos_offset = offset;
1077 intel->wpos_size = 3 * sizeof(GLuint);
1078
1079 EMIT_PAD(intel->wpos_size);
1080 }
1081 }
1082
1083 if (s2 != i915->state.Ctx[I915_CTXREG_LIS2] ||
1084 s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
1085 int k;
1086
1087 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1088
1089 /* Must do this *after* statechange, so as not to affect
1090 * buffered vertices reliant on the old state:
1091 */
1092 intel->vertex_size = _tnl_install_attrs(&intel->ctx,
1093 intel->vertex_attrs,
1094 intel->vertex_attr_count,
1095 intel->ViewportMatrix.m, 0);
1096
1097 intel->vertex_size >>= 2;
1098
1099 i915->state.Ctx[I915_CTXREG_LIS2] = s2;
1100 i915->state.Ctx[I915_CTXREG_LIS4] = s4;
1101
1102 k = intel->vtbl.check_vertex_size(intel, intel->vertex_size);
1103 assert(k);
1104 }
1105
1106 if (!p->params_uptodate)
1107 track_params(p);
1108
1109 if (!p->on_hardware)
1110 i915_upload_program(i915, p);
1111 }
1112
1113 void
1114 i915InitFragProgFuncs(struct dd_function_table *functions)
1115 {
1116 functions->BindProgram = i915BindProgram;
1117 functions->NewProgram = i915NewProgram;
1118 functions->DeleteProgram = i915DeleteProgram;
1119 functions->IsProgramNative = i915IsProgramNative;
1120 functions->ProgramStringNotify = i915ProgramStringNotify;
1121 }