350da5e16978415f620dc2eda3008d45c4654559
[mesa.git] / src / mesa / drivers / dri / i915 / i915_program.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <strings.h>
29
30 #include "main/glheader.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33
34 #include "tnl/t_context.h"
35 #include "intel_batchbuffer.h"
36
37 #include "i915_reg.h"
38 #include "i915_context.h"
39 #include "i915_program.h"
40
41
42 #define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
43 #define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
44 #define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
45 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
46 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
47 #define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
48 #define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
49 #define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
50
51 /* These are special, and don't have swizzle/negate bits.
52 */
53 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
54 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
55 (GET_UREG_TYPE(reg)<<T1_ADDRESS_REG_TYPE_SHIFT))
56
57
58 /* Macros for translating UREG's into the various register fields used
59 * by the I915 programmable unit.
60 */
61 #define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
62 #define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
63 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
64 #define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
65 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
66 #define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
67
68 #define UREG_MASK 0xffffff00
69 #define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
70 (REG_NR_MASK << UREG_NR_SHIFT))
71
72
73 #define I915_CONSTFLAG_PARAM 0x1f
74
75 GLuint
76 i915_get_temp(struct i915_fragment_program *p)
77 {
78 int bit = ffs(~p->temp_flag);
79 if (!bit) {
80 fprintf(stderr, "%s: out of temporaries\n", __FILE__);
81 exit(1);
82 }
83
84 p->temp_flag |= 1 << (bit - 1);
85 return UREG(REG_TYPE_R, (bit - 1));
86 }
87
88
89 GLuint
90 i915_get_utemp(struct i915_fragment_program * p)
91 {
92 int bit = ffs(~p->utemp_flag);
93 if (!bit) {
94 fprintf(stderr, "%s: out of temporaries\n", __FILE__);
95 exit(1);
96 }
97
98 p->utemp_flag |= 1 << (bit - 1);
99 return UREG(REG_TYPE_U, (bit - 1));
100 }
101
102 void
103 i915_release_utemps(struct i915_fragment_program *p)
104 {
105 p->utemp_flag = ~0x7;
106 }
107
108
109 GLuint
110 i915_emit_decl(struct i915_fragment_program *p,
111 GLuint type, GLuint nr, GLuint d0_flags)
112 {
113 GLuint reg = UREG(type, nr);
114
115 if (type == REG_TYPE_T) {
116 if (p->decl_t & (1 << nr))
117 return reg;
118
119 p->decl_t |= (1 << nr);
120 }
121 else if (type == REG_TYPE_S) {
122 if (p->decl_s & (1 << nr))
123 return reg;
124
125 p->decl_s |= (1 << nr);
126 }
127 else
128 return reg;
129
130 *(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags);
131 *(p->decl++) = D1_MBZ;
132 *(p->decl++) = D2_MBZ;
133
134 p->nr_decl_insn++;
135 return reg;
136 }
137
138 GLuint
139 i915_emit_arith(struct i915_fragment_program * p,
140 GLuint op,
141 GLuint dest,
142 GLuint mask,
143 GLuint saturate, GLuint src0, GLuint src1, GLuint src2)
144 {
145 GLuint c[3];
146 GLuint nr_const = 0;
147
148 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
149 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
150 assert(dest);
151
152 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST)
153 c[nr_const++] = 0;
154 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST)
155 c[nr_const++] = 1;
156 if (GET_UREG_TYPE(src2) == REG_TYPE_CONST)
157 c[nr_const++] = 2;
158
159 /* Recursively call this function to MOV additional const values
160 * into temporary registers. Use utemp registers for this -
161 * currently shouldn't be possible to run out, but keep an eye on
162 * this.
163 */
164 if (nr_const > 1) {
165 GLuint s[3], first, i, old_utemp_flag;
166
167 s[0] = src0;
168 s[1] = src1;
169 s[2] = src2;
170 old_utemp_flag = p->utemp_flag;
171
172 first = GET_UREG_NR(s[c[0]]);
173 for (i = 1; i < nr_const; i++) {
174 if (GET_UREG_NR(s[c[i]]) != first) {
175 GLuint tmp = i915_get_utemp(p);
176
177 i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
178 s[c[i]], 0, 0);
179 s[c[i]] = tmp;
180 }
181 }
182
183 src0 = s[0];
184 src1 = s[1];
185 src2 = s[2];
186 p->utemp_flag = old_utemp_flag; /* restore */
187 }
188
189 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
190 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
191 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
192
193 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
194 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;
195
196 p->nr_alu_insn++;
197 return dest;
198 }
199
200 static GLuint get_free_rreg (struct i915_fragment_program *p,
201 GLuint live_regs)
202 {
203 int bit = ffs(~live_regs);
204 if (!bit) {
205 i915_program_error(p, "Can't find free R reg");
206 return UREG_BAD;
207 }
208 return UREG(REG_TYPE_R, bit - 1);
209 }
210
211 GLuint i915_emit_texld( struct i915_fragment_program *p,
212 GLuint live_regs,
213 GLuint dest,
214 GLuint destmask,
215 GLuint sampler,
216 GLuint coord,
217 GLuint op )
218 {
219 if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
220 /* With the help of the "needed registers" table created earlier, pick
221 * a register we can MOV the swizzled TC to (since TEX doesn't support
222 * swizzled sources) */
223 GLuint swizCoord = get_free_rreg(p, live_regs);
224 if (swizCoord == UREG_BAD)
225 return 0;
226
227 i915_emit_arith( p, A0_MOV, swizCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0 );
228 coord = swizCoord;
229 }
230
231 /* Don't worry about saturate as we only support texture formats
232 * that are always in the 0..1 range.
233 */
234 if (destmask != A0_DEST_CHANNEL_ALL) {
235 GLuint tmp = i915_get_utemp(p);
236 i915_emit_texld( p, 0, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
237 i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
238 return dest;
239 }
240 else {
241 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
242 assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
243 /* Can't use unsaved temps for coords, as the phase boundary would result
244 * in the contents becoming undefined.
245 */
246 assert(GET_UREG_TYPE(coord) != REG_TYPE_U);
247
248 /* Output register being oC or oD defines a phase boundary */
249 if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
250 GET_UREG_TYPE(dest) == REG_TYPE_OD)
251 p->nr_tex_indirect++;
252
253 /* Reading from an r# register whose contents depend on output of the
254 * current phase defines a phase boundary.
255 */
256 if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
257 p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect)
258 p->nr_tex_indirect++;
259
260 *(p->csr++) = (op |
261 T0_DEST( dest ) |
262 T0_SAMPLER( sampler ));
263
264 *(p->csr++) = T1_ADDRESS_REG( coord );
265 *(p->csr++) = T2_MBZ;
266
267 if (GET_UREG_TYPE(dest) == REG_TYPE_R)
268 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;
269
270 p->nr_tex_insn++;
271 return dest;
272 }
273 }
274
275
276 GLuint
277 i915_emit_const1f(struct i915_fragment_program * p, GLfloat c0)
278 {
279 GLint reg, idx;
280
281 if (c0 == 0.0)
282 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
283 if (c0 == 1.0)
284 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
285
286 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
287 if (p->constant_flags[reg] == I915_CONSTFLAG_PARAM)
288 continue;
289 for (idx = 0; idx < 4; idx++) {
290 if (!(p->constant_flags[reg] & (1 << idx)) ||
291 p->constant[reg][idx] == c0) {
292 p->constant[reg][idx] = c0;
293 p->constant_flags[reg] |= 1 << idx;
294 if (reg + 1 > p->nr_constants)
295 p->nr_constants = reg + 1;
296 return swizzle(UREG(REG_TYPE_CONST, reg), idx, ZERO, ZERO, ONE);
297 }
298 }
299 }
300
301 fprintf(stderr, "%s: out of constants\n", __FUNCTION__);
302 p->error = 1;
303 return 0;
304 }
305
306 GLuint
307 i915_emit_const2f(struct i915_fragment_program * p, GLfloat c0, GLfloat c1)
308 {
309 GLint reg, idx;
310
311 if (c0 == 0.0)
312 return swizzle(i915_emit_const1f(p, c1), ZERO, X, Z, W);
313 if (c0 == 1.0)
314 return swizzle(i915_emit_const1f(p, c1), ONE, X, Z, W);
315
316 if (c1 == 0.0)
317 return swizzle(i915_emit_const1f(p, c0), X, ZERO, Z, W);
318 if (c1 == 1.0)
319 return swizzle(i915_emit_const1f(p, c0), X, ONE, Z, W);
320
321 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
322 if (p->constant_flags[reg] == 0xf ||
323 p->constant_flags[reg] == I915_CONSTFLAG_PARAM)
324 continue;
325 for (idx = 0; idx < 3; idx++) {
326 if (!(p->constant_flags[reg] & (3 << idx))) {
327 p->constant[reg][idx] = c0;
328 p->constant[reg][idx + 1] = c1;
329 p->constant_flags[reg] |= 3 << idx;
330 if (reg + 1 > p->nr_constants)
331 p->nr_constants = reg + 1;
332 return swizzle(UREG(REG_TYPE_CONST, reg), idx, idx + 1, ZERO,
333 ONE);
334 }
335 }
336 }
337
338 fprintf(stderr, "%s: out of constants\n", __FUNCTION__);
339 p->error = 1;
340 return 0;
341 }
342
343
344
345 GLuint
346 i915_emit_const4f(struct i915_fragment_program * p,
347 GLfloat c0, GLfloat c1, GLfloat c2, GLfloat c3)
348 {
349 GLint reg;
350
351 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
352 if (p->constant_flags[reg] == 0xf &&
353 p->constant[reg][0] == c0 &&
354 p->constant[reg][1] == c1 &&
355 p->constant[reg][2] == c2 && p->constant[reg][3] == c3) {
356 return UREG(REG_TYPE_CONST, reg);
357 }
358 else if (p->constant_flags[reg] == 0) {
359 p->constant[reg][0] = c0;
360 p->constant[reg][1] = c1;
361 p->constant[reg][2] = c2;
362 p->constant[reg][3] = c3;
363 p->constant_flags[reg] = 0xf;
364 if (reg + 1 > p->nr_constants)
365 p->nr_constants = reg + 1;
366 return UREG(REG_TYPE_CONST, reg);
367 }
368 }
369
370 fprintf(stderr, "%s: out of constants\n", __FUNCTION__);
371 p->error = 1;
372 return 0;
373 }
374
375
376 GLuint
377 i915_emit_const4fv(struct i915_fragment_program * p, const GLfloat * c)
378 {
379 return i915_emit_const4f(p, c[0], c[1], c[2], c[3]);
380 }
381
382
383 GLuint
384 i915_emit_param4fv(struct i915_fragment_program * p, const GLfloat * values)
385 {
386 GLint reg, i;
387
388 for (i = 0; i < p->nr_params; i++) {
389 if (p->param[i].values == values)
390 return UREG(REG_TYPE_CONST, p->param[i].reg);
391 }
392
393
394 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
395 if (p->constant_flags[reg] == 0) {
396 p->constant_flags[reg] = I915_CONSTFLAG_PARAM;
397 i = p->nr_params++;
398
399 p->param[i].values = values;
400 p->param[i].reg = reg;
401 p->params_uptodate = 0;
402
403 if (reg + 1 > p->nr_constants)
404 p->nr_constants = reg + 1;
405 return UREG(REG_TYPE_CONST, reg);
406 }
407 }
408
409 fprintf(stderr, "%s: out of constants\n", __FUNCTION__);
410 p->error = 1;
411 return 0;
412 }
413
414
415
416 void
417 i915_program_error(struct i915_fragment_program *p, const char *msg)
418 {
419 _mesa_problem(NULL, "i915_program_error: %s", msg);
420 p->error = 1;
421 }
422
423
424 void
425 i915_init_program(struct i915_context *i915, struct i915_fragment_program *p)
426 {
427 GLcontext *ctx = &i915->intel.ctx;
428
429 p->translated = 0;
430 p->params_uptodate = 0;
431 p->on_hardware = 0;
432 p->error = 0;
433
434 memset(&p->register_phases, 0, sizeof(p->register_phases));
435 p->nr_tex_indirect = 1;
436 p->nr_tex_insn = 0;
437 p->nr_alu_insn = 0;
438 p->nr_decl_insn = 0;
439
440 p->ctx = ctx;
441 memset(p->constant_flags, 0, sizeof(p->constant_flags));
442
443 p->nr_constants = 0;
444 p->csr = p->program;
445 p->decl = p->declarations;
446 p->decl_s = 0;
447 p->decl_t = 0;
448 p->temp_flag = 0xffff000;
449 p->utemp_flag = ~0x7;
450 p->wpos_tex = -1;
451 p->depth_written = 0;
452 p->nr_params = 0;
453
454 *(p->decl++) = _3DSTATE_PIXEL_SHADER_PROGRAM;
455 }
456
457
458 void
459 i915_fini_program(struct i915_fragment_program *p)
460 {
461 GLuint program_size = p->csr - p->program;
462 GLuint decl_size = p->decl - p->declarations;
463
464 if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT)
465 i915_program_error(p, "Exceeded max nr indirect texture lookups");
466
467 if (p->nr_tex_insn > I915_MAX_TEX_INSN)
468 i915_program_error(p, "Exceeded max TEX instructions");
469
470 if (p->nr_alu_insn > I915_MAX_ALU_INSN)
471 i915_program_error(p, "Exceeded max ALU instructions");
472
473 if (p->nr_decl_insn > I915_MAX_DECL_INSN)
474 i915_program_error(p, "Exceeded max DECL instructions");
475
476 if (p->error) {
477 p->FragProg.Base.NumNativeInstructions = 0;
478 p->FragProg.Base.NumNativeAluInstructions = 0;
479 p->FragProg.Base.NumNativeTexInstructions = 0;
480 p->FragProg.Base.NumNativeTexIndirections = 0;
481 }
482 else {
483 p->FragProg.Base.NumNativeInstructions = (p->nr_alu_insn +
484 p->nr_tex_insn +
485 p->nr_decl_insn);
486 p->FragProg.Base.NumNativeAluInstructions = p->nr_alu_insn;
487 p->FragProg.Base.NumNativeTexInstructions = p->nr_tex_insn;
488 p->FragProg.Base.NumNativeTexIndirections = p->nr_tex_indirect;
489 }
490
491 p->declarations[0] |= program_size + decl_size - 2;
492 }
493
494 void
495 i915_upload_program(struct i915_context *i915,
496 struct i915_fragment_program *p)
497 {
498 GLuint program_size = p->csr - p->program;
499 GLuint decl_size = p->decl - p->declarations;
500
501 FALLBACK(&i915->intel, I915_FALLBACK_PROGRAM, p->error);
502
503 /* Could just go straight to the batchbuffer from here:
504 */
505 if (i915->state.ProgramSize != (program_size + decl_size) ||
506 memcmp(i915->state.Program + decl_size, p->program,
507 program_size * sizeof(int)) != 0) {
508 I915_STATECHANGE(i915, I915_UPLOAD_PROGRAM);
509 memcpy(i915->state.Program, p->declarations, decl_size * sizeof(int));
510 memcpy(i915->state.Program + decl_size, p->program,
511 program_size * sizeof(int));
512 i915->state.ProgramSize = decl_size + program_size;
513 }
514
515 /* Always seemed to get a failure if I used memcmp() to
516 * shortcircuit this state upload. Needs further investigation?
517 */
518 if (p->nr_constants) {
519 GLuint nr = p->nr_constants;
520
521 I915_ACTIVESTATE(i915, I915_UPLOAD_CONSTANTS, 1);
522 I915_STATECHANGE(i915, I915_UPLOAD_CONSTANTS);
523
524 i915->state.Constant[0] = _3DSTATE_PIXEL_SHADER_CONSTANTS | ((nr) * 4);
525 i915->state.Constant[1] = (1 << (nr - 1)) | ((1 << (nr - 1)) - 1);
526
527 memcpy(&i915->state.Constant[2], p->constant, 4 * sizeof(int) * (nr));
528 i915->state.ConstantSize = 2 + (nr) * 4;
529
530 if (0) {
531 GLuint i;
532 for (i = 0; i < nr; i++) {
533 fprintf(stderr, "const[%d]: %f %f %f %f\n", i,
534 p->constant[i][0],
535 p->constant[i][1], p->constant[i][2], p->constant[i][3]);
536 }
537 }
538 }
539 else {
540 I915_ACTIVESTATE(i915, I915_UPLOAD_CONSTANTS, 0);
541 }
542
543 p->on_hardware = 1;
544 }