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i965: fix bugs in projective texture coordinates
[mesa.git] / src / mesa / drivers / dri / i915 / i915_reg.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #ifndef _I915_REG_H_
30 #define _I915_REG_H_
31
32
33 #include "intel_reg.h"
34
35 #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
36
37 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
38 #define PRIM3D_TRILIST (0x0<<18)
39 #define PRIM3D_TRISTRIP (0x1<<18)
40 #define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
41 #define PRIM3D_TRIFAN (0x3<<18)
42 #define PRIM3D_POLY (0x4<<18)
43 #define PRIM3D_LINELIST (0x5<<18)
44 #define PRIM3D_LINESTRIP (0x6<<18)
45 #define PRIM3D_RECTLIST (0x7<<18)
46 #define PRIM3D_POINTLIST (0x8<<18)
47 #define PRIM3D_DIB (0x9<<18)
48 #define PRIM3D_CLEAR_RECT (0xa<<18)
49 #define PRIM3D_ZONE_INIT (0xd<<18)
50 #define PRIM3D_MASK (0x1f<<18)
51
52 /* p137 */
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
54 #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
55 #define AA_LINE_ECAAR_WIDTH_0_5 0
56 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
57 #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
58 #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
59 #define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
60 #define AA_LINE_REGION_WIDTH_0_5 0
61 #define AA_LINE_REGION_WIDTH_1_0 (1<<6)
62 #define AA_LINE_REGION_WIDTH_2_0 (2<<6)
63 #define AA_LINE_REGION_WIDTH_4_0 (3<<6)
64
65 /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
67 #define BFO_ENABLE_STENCIL_REF (1<<23)
68 #define BFO_STENCIL_REF_SHIFT 15
69 #define BFO_STENCIL_REF_MASK (0xff<<15)
70 #define BFO_ENABLE_STENCIL_FUNCS (1<<14)
71 #define BFO_STENCIL_TEST_SHIFT 11
72 #define BFO_STENCIL_TEST_MASK (0x7<<11)
73 #define BFO_STENCIL_FAIL_SHIFT 8
74 #define BFO_STENCIL_FAIL_MASK (0x7<<8)
75 #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5
76 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5)
77 #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2
78 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2)
79 #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1)
80 #define BFO_STENCIL_TWO_SIDE (1<<0)
81
82
83 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
84 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
85 #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17)
86 #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16)
87 #define BFM_STENCIL_TEST_MASK_SHIFT 8
88 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8)
89 #define BFM_STENCIL_WRITE_MASK_SHIFT 0
90 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0)
91
92
93
94 /* 3DSTATE_BIN_CONTROL p141 */
95
96 /* p143 */
97 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
98 /* Dword 1 */
99 #define BUF_3D_ID_COLOR_BACK (0x3<<24)
100 #define BUF_3D_ID_DEPTH (0x7<<24)
101 #define BUF_3D_USE_FENCE (1<<23)
102 #define BUF_3D_TILED_SURFACE (1<<22)
103 #define BUF_3D_TILE_WALK_X 0
104 #define BUF_3D_TILE_WALK_Y (1<<21)
105 #define BUF_3D_PITCH(x) (((x)/4)<<2)
106 /* Dword 2 */
107 #define BUF_3D_ADDR(x) ((x) & ~0x3)
108
109
110 /* 3DSTATE_CHROMA_KEY */
111
112 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
113 /*
114 * Sets the color, depth and stencil clear values used by the
115 * CLEAR_RECT and ZONE_INIT primitive types, respectively. These
116 * primitives set override most 3d state and only take a minimal x/y
117 * vertex. The color/z/stencil information is supplied here and
118 * therefore cannot vary per vertex.
119 */
120 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
121 /* Dword 1 */
122 #define CLEARPARAM_CLEAR_RECT (1 << 16)
123 #define CLEARPARAM_ZONE_INIT (0 << 16)
124 #define CLEARPARAM_WRITE_COLOR (1 << 2)
125 #define CLEARPARAM_WRITE_DEPTH (1 << 1)
126 #define CLEARPARAM_WRITE_STENCIL (1 << 0)
127
128 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
129 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
130
131
132
133 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
134 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
135 #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3))
136
137 /* p156 */
138 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
139
140 /* p157 */
141 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
142
143 /* p158 */
144 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
145
146
147 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
148 #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16))
149 /* scale in dword 1 */
150
151
152 /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
153 #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | 0x2)
154
155 /* p161 */
156 #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
157 /* Dword 1 */
158 #define TEX_DEFAULT_COLOR_OGL (0<<30)
159 #define TEX_DEFAULT_COLOR_D3D (1<<30)
160 #define ZR_EARLY_DEPTH (1<<29)
161 #define LOD_PRECLAMP_OGL (1<<28)
162 #define LOD_PRECLAMP_D3D (0<<28)
163 #define DITHER_FULL_ALWAYS (0<<26)
164 #define DITHER_FULL_ON_FB_BLEND (1<<26)
165 #define DITHER_CLAMPED_ALWAYS (2<<26)
166 #define LINEAR_GAMMA_BLEND_32BPP (1<<25)
167 #define DEBUG_DISABLE_ENH_DITHER (1<<24)
168 #define DSTORG_HORT_BIAS(x) ((x)<<20)
169 #define DSTORG_VERT_BIAS(x) ((x)<<16)
170 #define COLOR_4_2_2_CHNL_WRT_ALL 0
171 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
172 #define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
173 #define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
174 #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
175 #define COLR_BUF_8BIT 0
176 #define COLR_BUF_RGB555 (1<<8)
177 #define COLR_BUF_RGB565 (2<<8)
178 #define COLR_BUF_ARGB8888 (3<<8)
179 #define DEPTH_FRMT_16_FIXED 0
180 #define DEPTH_FRMT_16_FLOAT (1<<2)
181 #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
182 #define VERT_LINE_STRIDE_1 (1<<1)
183 #define VERT_LINE_STRIDE_0 (0<<1)
184 #define VERT_LINE_STRIDE_OFS_1 1
185 #define VERT_LINE_STRIDE_OFS_0 0
186
187 /* p166 */
188 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
189 /* Dword 1 */
190 #define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
191 #define DRAW_DITHER_OFS_X(x) ((x)<<26)
192 #define DRAW_DITHER_OFS_Y(x) ((x)<<24)
193 /* Dword 2 */
194 #define DRAW_YMIN(x) ((x)<<16)
195 #define DRAW_XMIN(x) (x)
196 /* Dword 3 */
197 #define DRAW_YMAX(x) ((x)<<16)
198 #define DRAW_XMAX(x) (x)
199 /* Dword 4 */
200 #define DRAW_YORG(x) ((x)<<16)
201 #define DRAW_XORG(x) (x)
202
203
204 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
205
206 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
207
208
209 /* _3DSTATE_FOG_COLOR, p173 */
210 #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
211 #define FOG_COLOR_RED(x) ((x)<<16)
212 #define FOG_COLOR_GREEN(x) ((x)<<8)
213 #define FOG_COLOR_BLUE(x) (x)
214
215 /* _3DSTATE_FOG_MODE, p174 */
216 #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
217 /* Dword 1 */
218 #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31)
219 #define FMC1_FOGFUNC_VERTEX (0<<28)
220 #define FMC1_FOGFUNC_PIXEL_EXP (1<<28)
221 #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28)
222 #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28)
223 #define FMC1_FOGFUNC_MASK (3<<28)
224 #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27)
225 #define FMC1_FOGINDEX_Z (0<<25)
226 #define FMC1_FOGINDEX_W (1<<25)
227 #define FMC1_C1_C2_MODIFY_ENABLE (1<<24)
228 #define FMC1_DENSITY_MODIFY_ENABLE (1<<23)
229 #define FMC1_C1_ONE (1<<13)
230 #define FMC1_C1_MASK (0xffff<<4)
231 /* Dword 2 */
232 #define FMC2_C2_ONE (1<<16)
233 /* Dword 3 */
234 #define FMC3_D_ONE (1<<16)
235
236
237
238 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
239 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
240 #define IAB_MODIFY_ENABLE (1<<23)
241 #define IAB_ENABLE (1<<22)
242 #define IAB_MODIFY_FUNC (1<<21)
243 #define IAB_FUNC_SHIFT 16
244 #define IAB_MODIFY_SRC_FACTOR (1<<11)
245 #define IAB_SRC_FACTOR_SHIFT 6
246 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6)
247 #define IAB_MODIFY_DST_FACTOR (1<<5)
248 #define IAB_DST_FACTOR_SHIFT 0
249 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0)
250
251
252 #define BLENDFUNC_ADD 0x0
253 #define BLENDFUNC_SUBTRACT 0x1
254 #define BLENDFUNC_REVERSE_SUBTRACT 0x2
255 #define BLENDFUNC_MIN 0x3
256 #define BLENDFUNC_MAX 0x4
257 #define BLENDFUNC_MASK 0x7
258
259 /* 3DSTATE_LOAD_INDIRECT, p180 */
260
261 #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16))
262 #define LI0_STATE_STATIC_INDIRECT (0x01<<8)
263 #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8)
264 #define LI0_STATE_SAMPLER (0x04<<8)
265 #define LI0_STATE_MAP (0x08<<8)
266 #define LI0_STATE_PROGRAM (0x10<<8)
267 #define LI0_STATE_CONSTANTS (0x20<<8)
268
269 #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
270 #define SIS0_FORCE_LOAD (1<<1)
271 #define SIS0_BUFFER_VALID (1<<0)
272 #define SIS1_BUFFER_LENGTH(x) ((x)&0xff)
273
274 #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
275 #define DIS0_BUFFER_RESET (1<<1)
276 #define DIS0_BUFFER_VALID (1<<0)
277
278 #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
279 #define SSB0_FORCE_LOAD (1<<1)
280 #define SSB0_BUFFER_VALID (1<<0)
281 #define SSB1_BUFFER_LENGTH(x) ((x)&0xff)
282
283 #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
284 #define MSB0_FORCE_LOAD (1<<1)
285 #define MSB0_BUFFER_VALID (1<<0)
286 #define MSB1_BUFFER_LENGTH(x) ((x)&0xff)
287
288 #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3)
289 #define PSP0_FORCE_LOAD (1<<1)
290 #define PSP0_BUFFER_VALID (1<<0)
291 #define PSP1_BUFFER_LENGTH(x) ((x)&0xff)
292
293 #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3)
294 #define PSC0_FORCE_LOAD (1<<1)
295 #define PSC0_BUFFER_VALID (1<<0)
296 #define PSC1_BUFFER_LENGTH(x) ((x)&0xff)
297
298
299
300
301
302 /* _3DSTATE_RASTERIZATION_RULES */
303 #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
304 #define ENABLE_POINT_RASTER_RULE (1<<15)
305 #define OGL_POINT_RASTER_RULE (1<<13)
306 #define ENABLE_TEXKILL_3D_4D (1<<10)
307 #define TEXKILL_3D (0<<9)
308 #define TEXKILL_4D (1<<9)
309 #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
310 #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
311 #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
312 #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
313
314 /* _3DSTATE_SCISSOR_ENABLE, p256 */
315 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
316 #define ENABLE_SCISSOR_RECT ((1<<1) | 1)
317 #define DISABLE_SCISSOR_RECT (1<<1)
318
319 /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
320 #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
321 /* Dword 1 */
322 #define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
323 #define SCISSOR_RECT_0_XMIN(x) (x)
324 /* Dword 2 */
325 #define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
326 #define SCISSOR_RECT_0_XMAX(x) (x)
327
328 /* Helper macros for blend factors
329 */
330 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
331 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
332 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
333 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
334
335
336
337
338 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
339
340 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
341 #define _3DSTATE_MAP_PALETTE_LOAD_32 (CMD_3D|(0x1d<<24)|(0x8f<<16))
342 /* subsequent dwords up to length (max 16) are ARGB8888 color values */
343
344 /* _3DSTATE_MODES_4, p218 */
345 #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24))
346 #define ENABLE_LOGIC_OP_FUNC (1<<23)
347 #define LOGIC_OP_FUNC(x) ((x)<<18)
348 #define LOGICOP_MASK (0xf<<18)
349 #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
350 #define ENABLE_STENCIL_TEST_MASK (1<<17)
351 #define STENCIL_TEST_MASK(x) (((x)&0xff)<<8)
352 #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
353 #define ENABLE_STENCIL_WRITE_MASK (1<<16)
354 #define STENCIL_WRITE_MASK(x) ((x)&0xff)
355
356 /* _3DSTATE_MODES_5, p220 */
357 #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
358 #define PIPELINE_FLUSH_RENDER_CACHE (1<<18)
359 #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16)
360
361
362 /* p221 */
363 #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16))
364 #define PS1_REG(n) (1<<(n))
365 #define PS2_CONST_X(n) (n)
366 #define PS3_CONST_Y(n) (n)
367 #define PS4_CONST_Z(n) (n)
368 #define PS5_CONST_W(n) (n)
369
370 /* p222 */
371
372
373 #define I915_MAX_TEX_INDIRECT 4
374 #define I915_MAX_TEX_INSN 32
375 #define I915_MAX_ALU_INSN 64
376 #define I915_MAX_DECL_INSN 27
377 #define I915_MAX_TEMPORARY 16
378
379
380 /* Each instruction is 3 dwords long, though most don't require all
381 * this space. Maximum of 123 instructions. Smaller maxes per insn
382 * type.
383 */
384 #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16))
385
386 #define REG_TYPE_R 0 /* temporary regs, no need to
387 * dcl, must be written before
388 * read -- Preserved between
389 * phases.
390 */
391 #define REG_TYPE_T 1 /* Interpolated values, must be
392 * dcl'ed before use.
393 *
394 * 0..7: texture coord,
395 * 8: diffuse spec,
396 * 9: specular color,
397 * 10: fog parameter in w.
398 */
399 #define REG_TYPE_CONST 2 /* Restriction: only one const
400 * can be referenced per
401 * instruction, though it may be
402 * selected for multiple inputs.
403 * Constants not initialized
404 * default to zero.
405 */
406 #define REG_TYPE_S 3 /* sampler */
407 #define REG_TYPE_OC 4 /* output color (rgba) */
408 #define REG_TYPE_OD 5 /* output depth (w), xyz are
409 * temporaries. If not written,
410 * interpolated depth is used?
411 */
412 #define REG_TYPE_U 6 /* unpreserved temporaries */
413 #define REG_TYPE_MASK 0x7
414 #define REG_NR_MASK 0xf
415
416
417 /* REG_TYPE_T:
418 */
419 #define T_TEX0 0
420 #define T_TEX1 1
421 #define T_TEX2 2
422 #define T_TEX3 3
423 #define T_TEX4 4
424 #define T_TEX5 5
425 #define T_TEX6 6
426 #define T_TEX7 7
427 #define T_DIFFUSE 8
428 #define T_SPECULAR 9
429 #define T_FOG_W 10 /* interpolated fog is in W coord */
430
431 /* Arithmetic instructions */
432
433 /* .replicate_swizzle == selection and replication of a particular
434 * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
435 */
436 #define A0_NOP (0x0<<24) /* no operation */
437 #define A0_ADD (0x1<<24) /* dst = src0 + src1 */
438 #define A0_MOV (0x2<<24) /* dst = src0 */
439 #define A0_MUL (0x3<<24) /* dst = src0 * src1 */
440 #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */
441 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
442 #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */
443 #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
444 #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */
445 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
446 #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
447 #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
448 #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
449 #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */
450 #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */
451 #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */
452 #define A0_FLR (0x10<<24) /* dst = floor(src0) */
453 #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */
454 #define A0_TRC (0x12<<24) /* dst = int(src0) */
455 #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
456 #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */
457 #define A0_DEST_SATURATE (1<<22)
458 #define A0_DEST_TYPE_SHIFT 19
459 /* Allow: R, OC, OD, U */
460 #define A0_DEST_NR_SHIFT 14
461 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
462 #define A0_DEST_CHANNEL_X (1<<10)
463 #define A0_DEST_CHANNEL_Y (2<<10)
464 #define A0_DEST_CHANNEL_Z (4<<10)
465 #define A0_DEST_CHANNEL_W (8<<10)
466 #define A0_DEST_CHANNEL_ALL (0xf<<10)
467 #define A0_DEST_CHANNEL_SHIFT 10
468 #define A0_SRC0_TYPE_SHIFT 7
469 #define A0_SRC0_NR_SHIFT 2
470
471 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
472 #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
473
474
475 #define SRC_X 0
476 #define SRC_Y 1
477 #define SRC_Z 2
478 #define SRC_W 3
479 #define SRC_ZERO 4
480 #define SRC_ONE 5
481
482 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31)
483 #define A1_SRC0_CHANNEL_X_SHIFT 28
484 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27)
485 #define A1_SRC0_CHANNEL_Y_SHIFT 24
486 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23)
487 #define A1_SRC0_CHANNEL_Z_SHIFT 20
488 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19)
489 #define A1_SRC0_CHANNEL_W_SHIFT 16
490 #define A1_SRC1_TYPE_SHIFT 13
491 #define A1_SRC1_NR_SHIFT 8
492 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7)
493 #define A1_SRC1_CHANNEL_X_SHIFT 4
494 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3)
495 #define A1_SRC1_CHANNEL_Y_SHIFT 0
496
497 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31)
498 #define A2_SRC1_CHANNEL_Z_SHIFT 28
499 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27)
500 #define A2_SRC1_CHANNEL_W_SHIFT 24
501 #define A2_SRC2_TYPE_SHIFT 21
502 #define A2_SRC2_NR_SHIFT 16
503 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15)
504 #define A2_SRC2_CHANNEL_X_SHIFT 12
505 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11)
506 #define A2_SRC2_CHANNEL_Y_SHIFT 8
507 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7)
508 #define A2_SRC2_CHANNEL_Z_SHIFT 4
509 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3)
510 #define A2_SRC2_CHANNEL_W_SHIFT 0
511
512
513
514 /* Texture instructions */
515 #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared
516 * sampler and address, and output
517 * filtered texel data to destination
518 * register */
519 #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a
520 * perspective divide of the texture
521 * coordinate .xyz values by .w before
522 * sampling. */
523 #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the
524 * computed LOD by w. Only S4.6 two's
525 * comp is used. This implies that a
526 * float to fixed conversion is
527 * done. */
528 #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling
529 * operation. Simply kills the pixel
530 * if any channel of the address
531 * register is < 0.0. */
532 #define T0_DEST_TYPE_SHIFT 19
533 /* Allow: R, OC, OD, U */
534 /* Note: U (unpreserved) regs do not retain their values between
535 * phases (cannot be used for feedback)
536 *
537 * Note: oC and OD registers can only be used as the destination of a
538 * texture instruction once per phase (this is an implementation
539 * restriction).
540 */
541 #define T0_DEST_NR_SHIFT 14
542 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
543 #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
544 #define T0_SAMPLER_NR_MASK (0xf<<0)
545
546 #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
547 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
548 #define T1_ADDRESS_REG_NR_SHIFT 17
549 #define T2_MBZ 0
550
551 /* Declaration instructions */
552 #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib)
553 * register or an s (sampler)
554 * register. */
555 #define D0_SAMPLE_TYPE_SHIFT 22
556 #define D0_SAMPLE_TYPE_2D (0x0<<22)
557 #define D0_SAMPLE_TYPE_CUBE (0x1<<22)
558 #define D0_SAMPLE_TYPE_VOLUME (0x2<<22)
559 #define D0_SAMPLE_TYPE_MASK (0x3<<22)
560
561 #define D0_TYPE_SHIFT 19
562 /* Allow: T, S */
563 #define D0_NR_SHIFT 14
564 /* Allow T: 0..10, S: 0..15 */
565 #define D0_CHANNEL_X (1<<10)
566 #define D0_CHANNEL_Y (2<<10)
567 #define D0_CHANNEL_Z (4<<10)
568 #define D0_CHANNEL_W (8<<10)
569 #define D0_CHANNEL_ALL (0xf<<10)
570 #define D0_CHANNEL_NONE (0<<10)
571
572 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
573 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
574
575 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
576 * or specular declarations.
577 *
578 * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
579 *
580 * Must be zero for S (sampler) dcls
581 */
582 #define D1_MBZ 0
583 #define D2_MBZ 0
584
585
586
587 /* p207 */
588 #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16))
589
590 #define MS1_MAPMASK_SHIFT 0
591 #define MS1_MAPMASK_MASK (0x8fff<<0)
592
593 #define MS2_UNTRUSTED_SURFACE (1<<31)
594 #define MS2_ADDRESS_MASK 0xfffffffc
595 #define MS2_VERTICAL_LINE_STRIDE (1<<1)
596 #define MS2_VERTICAL_OFFSET (1<<1)
597
598 #define MS3_HEIGHT_SHIFT 21
599 #define MS3_WIDTH_SHIFT 10
600 #define MS3_PALETTE_SELECT (1<<9)
601 #define MS3_MAPSURF_FORMAT_SHIFT 7
602 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7)
603 #define MAPSURF_8BIT (1<<7)
604 #define MAPSURF_16BIT (2<<7)
605 #define MAPSURF_32BIT (3<<7)
606 #define MAPSURF_422 (5<<7)
607 #define MAPSURF_COMPRESSED (6<<7)
608 #define MAPSURF_4BIT_INDEXED (7<<7)
609 #define MS3_MT_FORMAT_MASK (0x7 << 3)
610 #define MS3_MT_FORMAT_SHIFT 3
611 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
612 #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
613 #define MT_8BIT_L8 (1<<3)
614 #define MT_8BIT_A8 (4<<3)
615 #define MT_8BIT_MONO8 (5<<3)
616 #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
617 #define MT_16BIT_ARGB1555 (1<<3)
618 #define MT_16BIT_ARGB4444 (2<<3)
619 #define MT_16BIT_AY88 (3<<3)
620 #define MT_16BIT_88DVDU (5<<3)
621 #define MT_16BIT_BUMP_655LDVDU (6<<3)
622 #define MT_16BIT_I16 (7<<3)
623 #define MT_16BIT_L16 (8<<3)
624 #define MT_16BIT_A16 (9<<3)
625 #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
626 #define MT_32BIT_ABGR8888 (1<<3)
627 #define MT_32BIT_XRGB8888 (2<<3)
628 #define MT_32BIT_XBGR8888 (3<<3)
629 #define MT_32BIT_QWVU8888 (4<<3)
630 #define MT_32BIT_AXVU8888 (5<<3)
631 #define MT_32BIT_LXVU8888 (6<<3)
632 #define MT_32BIT_XLVU8888 (7<<3)
633 #define MT_32BIT_ARGB2101010 (8<<3)
634 #define MT_32BIT_ABGR2101010 (9<<3)
635 #define MT_32BIT_AWVU2101010 (0xA<<3)
636 #define MT_32BIT_GR1616 (0xB<<3)
637 #define MT_32BIT_VU1616 (0xC<<3)
638 #define MT_32BIT_xI824 (0xD<<3)
639 #define MT_32BIT_xA824 (0xE<<3)
640 #define MT_32BIT_xL824 (0xF<<3)
641 #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
642 #define MT_422_YCRCB_NORMAL (1<<3)
643 #define MT_422_YCRCB_SWAPUV (2<<3)
644 #define MT_422_YCRCB_SWAPUVY (3<<3)
645 #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
646 #define MT_COMPRESS_DXT2_3 (1<<3)
647 #define MT_COMPRESS_DXT4_5 (2<<3)
648 #define MT_COMPRESS_FXT1 (3<<3)
649 #define MT_COMPRESS_DXT1_RGB (4<<3)
650 #define MS3_USE_FENCE_REGS (1<<2)
651 #define MS3_TILED_SURFACE (1<<1)
652 #define MS3_TILE_WALK (1<<0)
653
654 #define MS4_PITCH_SHIFT 21
655 #define MS4_CUBE_FACE_ENA_NEGX (1<<20)
656 #define MS4_CUBE_FACE_ENA_POSX (1<<19)
657 #define MS4_CUBE_FACE_ENA_NEGY (1<<18)
658 #define MS4_CUBE_FACE_ENA_POSY (1<<17)
659 #define MS4_CUBE_FACE_ENA_NEGZ (1<<16)
660 #define MS4_CUBE_FACE_ENA_POSZ (1<<15)
661 #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15)
662 #define MS4_MAX_LOD_SHIFT 9
663 #define MS4_MAX_LOD_MASK (0x3f<<9)
664 #define MS4_MIP_LAYOUT_LEGACY (0<<8)
665 #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8)
666 #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8)
667 #define MS4_VOLUME_DEPTH_SHIFT 0
668 #define MS4_VOLUME_DEPTH_MASK (0xff<<0)
669
670 /* p244 */
671 #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16))
672
673 #define SS1_MAPMASK_SHIFT 0
674 #define SS1_MAPMASK_MASK (0x8fff<<0)
675
676 #define SS2_REVERSE_GAMMA_ENABLE (1<<31)
677 #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30)
678 #define SS2_COLORSPACE_CONVERSION (1<<29)
679 #define SS2_CHROMAKEY_SHIFT 27
680 #define SS2_BASE_MIP_LEVEL_SHIFT 22
681 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22)
682 #define SS2_MIP_FILTER_SHIFT 20
683 #define SS2_MIP_FILTER_MASK (0x3<<20)
684 #define MIPFILTER_NONE 0
685 #define MIPFILTER_NEAREST 1
686 #define MIPFILTER_LINEAR 3
687 #define SS2_MAG_FILTER_SHIFT 17
688 #define SS2_MAG_FILTER_MASK (0x7<<17)
689 #define FILTER_NEAREST 0
690 #define FILTER_LINEAR 1
691 #define FILTER_ANISOTROPIC 2
692 #define FILTER_4X4_1 3
693 #define FILTER_4X4_2 4
694 #define FILTER_4X4_FLAT 5
695 #define FILTER_6X5_MONO 6 /* XXX - check */
696 #define SS2_MIN_FILTER_SHIFT 14
697 #define SS2_MIN_FILTER_MASK (0x7<<14)
698 #define SS2_LOD_BIAS_SHIFT 5
699 #define SS2_LOD_BIAS_ONE (0x10<<5)
700 #define SS2_LOD_BIAS_MASK (0x1ff<<5)
701 /* Shadow requires:
702 * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
703 * FILTER_4X4_x MIN and MAG filters
704 */
705 #define SS2_SHADOW_ENABLE (1<<4)
706 #define SS2_MAX_ANISO_MASK (1<<3)
707 #define SS2_MAX_ANISO_2 (0<<3)
708 #define SS2_MAX_ANISO_4 (1<<3)
709 #define SS2_SHADOW_FUNC_SHIFT 0
710 #define SS2_SHADOW_FUNC_MASK (0x7<<0)
711 /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
712
713 #define SS3_MIN_LOD_SHIFT 24
714 #define SS3_MIN_LOD_ONE (0x10<<24)
715 #define SS3_MIN_LOD_MASK (0xff<<24)
716 #define SS3_KILL_PIXEL_ENABLE (1<<17)
717 #define SS3_TCX_ADDR_MODE_SHIFT 12
718 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12)
719 #define TEXCOORDMODE_WRAP 0
720 #define TEXCOORDMODE_MIRROR 1
721 #define TEXCOORDMODE_CLAMP_EDGE 2
722 #define TEXCOORDMODE_CUBE 3
723 #define TEXCOORDMODE_CLAMP_BORDER 4
724 #define TEXCOORDMODE_MIRROR_ONCE 5
725 #define SS3_TCY_ADDR_MODE_SHIFT 9
726 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9)
727 #define SS3_TCZ_ADDR_MODE_SHIFT 6
728 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6)
729 #define SS3_NORMALIZED_COORDS (1<<5)
730 #define SS3_TEXTUREMAP_INDEX_SHIFT 1
731 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1)
732 #define SS3_DEINTERLACER_ENABLE (1<<0)
733
734 #define SS4_BORDER_COLOR_MASK (~0)
735
736 /* 3DSTATE_SPAN_STIPPLE, p258
737 */
738 #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
739 #define ST1_ENABLE (1<<16)
740 #define ST1_MASK (0xffff)
741
742 #define _3DSTATE_DEFAULT_Z ((0x3<<29)|(0x1d<<24)|(0x98<<16))
743 #define _3DSTATE_DEFAULT_DIFFUSE ((0x3<<29)|(0x1d<<24)|(0x99<<16))
744 #define _3DSTATE_DEFAULT_SPECULAR ((0x3<<29)|(0x1d<<24)|(0x9a<<16))
745
746 #endif