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0cddf82a40a19c0b9bc120dbc540703aad98e423
[mesa.git] / src / mesa / drivers / dri / i915 / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/dd.h"
34 #include "tnl/tnl.h"
35 #include "tnl/t_context.h"
36
37 #include "texmem.h"
38
39 #include "drivers/common/driverfuncs.h"
40
41 #include "intel_fbo.h"
42 #include "intel_screen.h"
43 #include "intel_batchbuffer.h"
44 #include "intel_buffers.h"
45
46 #include "i915_context.h"
47 #include "i915_reg.h"
48
49 #define FILE_DEBUG_FLAG DEBUG_STATE
50
51 void
52 i915_update_stencil(struct gl_context * ctx)
53 {
54 struct i915_context *i915 = I915_CONTEXT(ctx);
55 GLuint front_ref, front_writemask, front_mask;
56 GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
57 GLuint back_ref, back_writemask, back_mask;
58 GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
59
60 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
61
62 /* The 915 considers CW to be "front" for two-sided stencil, so choose
63 * appropriately.
64 */
65 /* _NEW_POLYGON | _NEW_STENCIL */
66 if (ctx->Polygon.FrontFace == GL_CW) {
67 front_ref = ctx->Stencil.Ref[0];
68 front_mask = ctx->Stencil.ValueMask[0];
69 front_writemask = ctx->Stencil.WriteMask[0];
70 front_func = ctx->Stencil.Function[0];
71 front_fail = ctx->Stencil.FailFunc[0];
72 front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
73 front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
74 back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
75 back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
76 back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
77 back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
78 back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
79 back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
80 back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
81 } else {
82 front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
83 front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
84 front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
85 front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
86 front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
87 front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
88 front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
89 back_ref = ctx->Stencil.Ref[0];
90 back_mask = ctx->Stencil.ValueMask[0];
91 back_writemask = ctx->Stencil.WriteMask[0];
92 back_func = ctx->Stencil.Function[0];
93 back_fail = ctx->Stencil.FailFunc[0];
94 back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
95 back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
96 }
97
98 /* Set front state. */
99 i915->state.Ctx[I915_CTXREG_STATE4] &= ~(MODE4_ENABLE_STENCIL_TEST_MASK |
100 MODE4_ENABLE_STENCIL_WRITE_MASK);
101 i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
102 ENABLE_STENCIL_WRITE_MASK |
103 STENCIL_TEST_MASK(front_mask) |
104 STENCIL_WRITE_MASK(front_writemask));
105
106 i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
107 S5_STENCIL_TEST_FUNC_MASK |
108 S5_STENCIL_FAIL_MASK |
109 S5_STENCIL_PASS_Z_FAIL_MASK |
110 S5_STENCIL_PASS_Z_PASS_MASK);
111
112 i915->state.Ctx[I915_CTXREG_LIS5] |=
113 (front_ref << S5_STENCIL_REF_SHIFT) |
114 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
115 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
116 (intel_translate_stencil_op(front_pass_z_fail) <<
117 S5_STENCIL_PASS_Z_FAIL_SHIFT) |
118 (intel_translate_stencil_op(front_pass_z_pass) <<
119 S5_STENCIL_PASS_Z_PASS_SHIFT);
120
121 /* Set back state if different from front. */
122 if (ctx->Stencil._TestTwoSide) {
123 i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &=
124 ~(BFO_STENCIL_REF_MASK |
125 BFO_STENCIL_TEST_MASK |
126 BFO_STENCIL_FAIL_MASK |
127 BFO_STENCIL_PASS_Z_FAIL_MASK |
128 BFO_STENCIL_PASS_Z_PASS_MASK);
129 i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] |= BFO_STENCIL_TWO_SIDE |
130 (back_ref << BFO_STENCIL_REF_SHIFT) |
131 (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
132 (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
133 (intel_translate_stencil_op(back_pass_z_fail) <<
134 BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
135 (intel_translate_stencil_op(back_pass_z_pass) <<
136 BFO_STENCIL_PASS_Z_PASS_SHIFT);
137
138 i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] &=
139 ~(BFM_STENCIL_TEST_MASK_MASK |
140 BFM_STENCIL_WRITE_MASK_MASK);
141 i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] |=
142 BFM_STENCIL_TEST_MASK(back_mask) |
143 BFM_STENCIL_WRITE_MASK(back_writemask);
144 } else {
145 i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &= ~BFO_STENCIL_TWO_SIDE;
146 }
147 }
148
149 static void
150 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
151 GLuint mask)
152 {
153 }
154
155 static void
156 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
157 {
158 }
159
160 static void
161 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
162 GLenum zpass)
163 {
164 }
165
166 static void
167 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
168 {
169 struct i915_context *i915 = I915_CONTEXT(ctx);
170 int test = intel_translate_compare_func(func);
171 GLubyte refByte;
172 GLuint dw;
173
174 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
175
176 dw = i915->state.Ctx[I915_CTXREG_LIS6];
177 dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
178 dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
179 (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
180 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
181 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
182 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
183 }
184 }
185
186 /* This function makes sure that the proper enables are
187 * set for LogicOp, Independant Alpha Blend, and Blending.
188 * It needs to be called from numerous places where we
189 * could change the LogicOp or Independant Alpha Blend without subsequent
190 * calls to glEnable.
191 */
192 static void
193 i915EvalLogicOpBlendState(struct gl_context * ctx)
194 {
195 struct i915_context *i915 = I915_CONTEXT(ctx);
196 GLuint dw0, dw1;
197
198 dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
199 dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
200
201 if (RGBA_LOGICOP_ENABLED(ctx)) {
202 dw0 |= S5_LOGICOP_ENABLE;
203 dw1 &= ~S6_CBUF_BLEND_ENABLE;
204 }
205 else {
206 dw0 &= ~S5_LOGICOP_ENABLE;
207
208 if (ctx->Color.BlendEnabled) {
209 dw1 |= S6_CBUF_BLEND_ENABLE;
210 }
211 else {
212 dw1 &= ~S6_CBUF_BLEND_ENABLE;
213 }
214 }
215 if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
216 dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
217 i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
218 i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
219
220 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
221 }
222 }
223
224 static void
225 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
226 {
227 struct i915_context *i915 = I915_CONTEXT(ctx);
228 GLubyte r, g, b, a;
229 GLuint dw;
230
231 DBG("%s\n", __FUNCTION__);
232
233 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
234 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
235 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
236 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
237
238 dw = (a << 24) | (r << 16) | (g << 8) | b;
239 if (dw != i915->state.Ctx[I915_CTXREG_BLENDCOLOR1]) {
240 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
241 i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = dw
242 }
243 }
244
245
246 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
247 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
248 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
249 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
250
251
252
253 static GLuint
254 translate_blend_equation(GLenum mode)
255 {
256 switch (mode) {
257 case GL_FUNC_ADD:
258 return BLENDFUNC_ADD;
259 case GL_MIN:
260 return BLENDFUNC_MIN;
261 case GL_MAX:
262 return BLENDFUNC_MAX;
263 case GL_FUNC_SUBTRACT:
264 return BLENDFUNC_SUBTRACT;
265 case GL_FUNC_REVERSE_SUBTRACT:
266 return BLENDFUNC_REVERSE_SUBTRACT;
267 default:
268 return 0;
269 }
270 }
271
272 static void
273 i915UpdateBlendState(struct gl_context * ctx)
274 {
275 struct i915_context *i915 = I915_CONTEXT(ctx);
276 GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
277 ~(IAB_SRC_FACTOR_MASK |
278 IAB_DST_FACTOR_MASK |
279 (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
280
281 GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
282 ~(S6_CBUF_SRC_BLEND_FACT_MASK |
283 S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
284
285 GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
286 GLuint eqA = ctx->Color.Blend[0].EquationA;
287 GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
288 GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
289 GLuint srcA = ctx->Color.Blend[0].SrcA;
290 GLuint dstA = ctx->Color.Blend[0].DstA;
291
292 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
293 srcRGB = dstRGB = GL_ONE;
294 }
295
296 if (eqA == GL_MIN || eqA == GL_MAX) {
297 srcA = dstA = GL_ONE;
298 }
299
300 lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
301 lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
302 lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
303
304 iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
305 iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
306 iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
307
308 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
309 iab |= IAB_ENABLE;
310
311 if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
312 lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
313 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
314 i915->state.Ctx[I915_CTXREG_IAB] = iab;
315 i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
316 }
317
318 /* This will catch a logicop blend equation */
319 i915EvalLogicOpBlendState(ctx);
320 }
321
322
323 static void
324 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
325 GLenum dstRGB, GLenum srcA, GLenum dstA)
326 {
327 i915UpdateBlendState(ctx);
328 }
329
330
331 static void
332 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
333 {
334 i915UpdateBlendState(ctx);
335 }
336
337
338 static void
339 i915DepthFunc(struct gl_context * ctx, GLenum func)
340 {
341 struct i915_context *i915 = I915_CONTEXT(ctx);
342 int test = intel_translate_compare_func(func);
343 GLuint dw;
344
345 DBG("%s\n", __FUNCTION__);
346
347 dw = i915->state.Ctx[I915_CTXREG_LIS6];
348 dw &= ~S6_DEPTH_TEST_FUNC_MASK;
349 dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
350 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
351 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
352 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
353 }
354 }
355
356 static void
357 i915DepthMask(struct gl_context * ctx, GLboolean flag)
358 {
359 struct i915_context *i915 = I915_CONTEXT(ctx);
360 GLuint dw;
361
362 DBG("%s flag (%d)\n", __FUNCTION__, flag);
363
364 dw = i915->state.Ctx[I915_CTXREG_LIS6];
365 if (flag && ctx->Depth.Test)
366 dw |= S6_DEPTH_WRITE_ENABLE;
367 else
368 dw &= ~S6_DEPTH_WRITE_ENABLE;
369 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
370 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
371 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
372 }
373 }
374
375
376
377 /**
378 * Update the viewport transformation matrix. Depends on:
379 * - viewport pos/size
380 * - depthrange
381 * - window pos/size or FBO size
382 */
383 void
384 intelCalcViewport(struct gl_context * ctx)
385 {
386 struct intel_context *intel = intel_context(ctx);
387 const GLfloat *v = ctx->Viewport._WindowMap.m;
388 const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
389 GLfloat *m = intel->ViewportMatrix.m;
390 GLfloat yScale, yBias;
391
392 if (ctx->DrawBuffer->Name) {
393 /* User created FBO */
394 /* y=0=bottom */
395 yScale = 1.0;
396 yBias = 0.0;
397 }
398 else {
399 /* window buffer, y=0=top */
400 yScale = -1.0;
401 yBias = ctx->DrawBuffer->Height;
402 }
403
404 m[MAT_SX] = v[MAT_SX];
405 m[MAT_TX] = v[MAT_TX];
406
407 m[MAT_SY] = v[MAT_SY] * yScale;
408 m[MAT_TY] = v[MAT_TY] * yScale + yBias;
409
410 m[MAT_SZ] = v[MAT_SZ] * depthScale;
411 m[MAT_TZ] = v[MAT_TZ] * depthScale;
412 }
413
414
415 /** Called from ctx->Driver.Viewport() */
416 static void
417 i915Viewport(struct gl_context * ctx,
418 GLint x, GLint y, GLsizei width, GLsizei height)
419 {
420 intelCalcViewport(ctx);
421 }
422
423
424 /** Called from ctx->Driver.DepthRange() */
425 static void
426 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
427 {
428 intelCalcViewport(ctx);
429 }
430
431
432 /* =============================================================
433 * Polygon stipple
434 *
435 * The i915 supports a 4x4 stipple natively, GL wants 32x32.
436 * Fortunately stipple is usually a repeating pattern.
437 */
438 static void
439 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
440 {
441 struct i915_context *i915 = I915_CONTEXT(ctx);
442 const GLubyte *m;
443 GLubyte p[4];
444 int i, j, k;
445 int active = (ctx->Polygon.StippleFlag &&
446 i915->intel.reduced_primitive == GL_TRIANGLES);
447 GLuint newMask;
448
449 if (active) {
450 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
451 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
452 }
453
454 /* Use the already unpacked stipple data from the context rather than the
455 * uninterpreted mask passed in.
456 */
457 mask = (const GLubyte *)ctx->PolygonStipple;
458 m = mask;
459
460 p[0] = mask[12] & 0xf;
461 p[0] |= p[0] << 4;
462 p[1] = mask[8] & 0xf;
463 p[1] |= p[1] << 4;
464 p[2] = mask[4] & 0xf;
465 p[2] |= p[2] << 4;
466 p[3] = mask[0] & 0xf;
467 p[3] |= p[3] << 4;
468
469 for (k = 0; k < 8; k++)
470 for (j = 3; j >= 0; j--)
471 for (i = 0; i < 4; i++, m++)
472 if (*m != p[j]) {
473 i915->intel.hw_stipple = 0;
474 return;
475 }
476
477 newMask = (((p[0] & 0xf) << 0) |
478 ((p[1] & 0xf) << 4) |
479 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
480
481
482 if (newMask == 0xffff || newMask == 0x0) {
483 /* this is needed to make conform pass */
484 i915->intel.hw_stipple = 0;
485 return;
486 }
487
488 i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
489 i915->state.Stipple[I915_STPREG_ST1] |= newMask;
490 i915->intel.hw_stipple = 1;
491
492 if (active)
493 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
494 }
495
496
497 /* =============================================================
498 * Hardware clipping
499 */
500 static void
501 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
502 {
503 struct i915_context *i915 = I915_CONTEXT(ctx);
504 int x1, y1, x2, y2;
505
506 if (!ctx->DrawBuffer)
507 return;
508
509 DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
510
511 if (ctx->DrawBuffer->Name == 0) {
512 x1 = x;
513 y1 = ctx->DrawBuffer->Height - (y + h);
514 x2 = x + w - 1;
515 y2 = y1 + h - 1;
516 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
517 }
518 else {
519 /* FBO - not inverted
520 */
521 x1 = x;
522 y1 = y;
523 x2 = x + w - 1;
524 y2 = y + h - 1;
525 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
526 }
527
528 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
529 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
530 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
531 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
532
533 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
534
535 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
536 i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
537 i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
538 }
539
540 static void
541 i915LogicOp(struct gl_context * ctx, GLenum opcode)
542 {
543 struct i915_context *i915 = I915_CONTEXT(ctx);
544 int tmp = intel_translate_logic_op(opcode);
545
546 DBG("%s\n", __FUNCTION__);
547
548 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
549 i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
550 i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
551 }
552
553
554
555 static void
556 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
557 {
558 struct i915_context *i915 = I915_CONTEXT(ctx);
559 GLuint mode, dw;
560
561 DBG("%s %d\n", __FUNCTION__,
562 ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
563
564 if (!ctx->Polygon.CullFlag) {
565 mode = S4_CULLMODE_NONE;
566 }
567 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
568 mode = S4_CULLMODE_CW;
569
570 if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
571 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
572 if (ctx->Polygon.CullFaceMode == GL_FRONT)
573 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
574 if (ctx->Polygon.FrontFace != GL_CCW)
575 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
576 }
577 else {
578 mode = S4_CULLMODE_BOTH;
579 }
580
581 dw = i915->state.Ctx[I915_CTXREG_LIS4];
582 dw &= ~S4_CULLMODE_MASK;
583 dw |= mode;
584 if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
585 i915->state.Ctx[I915_CTXREG_LIS4] = dw;
586 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
587 }
588 }
589
590 static void
591 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
592 {
593 struct i915_context *i915 = I915_CONTEXT(ctx);
594 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
595 int width;
596
597 DBG("%s\n", __FUNCTION__);
598
599 width = (int) (widthf * 2);
600 width = CLAMP(width, 1, 0xf);
601 lis4 |= width << S4_LINE_WIDTH_SHIFT;
602
603 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
604 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
605 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
606 }
607 }
608
609 static void
610 i915PointSize(struct gl_context * ctx, GLfloat size)
611 {
612 struct i915_context *i915 = I915_CONTEXT(ctx);
613 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
614 GLint point_size = (int) round(size);
615
616 DBG("%s\n", __FUNCTION__);
617
618 point_size = CLAMP(point_size, 1, 255);
619 lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
620
621 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
622 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
623 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
624 }
625 }
626
627
628 static void
629 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
630 {
631 struct i915_context *i915 = I915_CONTEXT(ctx);
632
633 switch (pname) {
634 case GL_POINT_SPRITE_COORD_ORIGIN:
635 /* This could be supported, but it would require modifying the fragment
636 * program to invert the y component of the texture coordinate by
637 * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
638 */
639 FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
640 (params[0] != GL_UPPER_LEFT));
641 break;
642 }
643 }
644
645
646 /* =============================================================
647 * Color masks
648 */
649
650 static void
651 i915ColorMask(struct gl_context * ctx,
652 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
653 {
654 struct i915_context *i915 = I915_CONTEXT(ctx);
655 GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
656
657 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
658 a);
659
660 if (!r)
661 tmp |= S5_WRITEDISABLE_RED;
662 if (!g)
663 tmp |= S5_WRITEDISABLE_GREEN;
664 if (!b)
665 tmp |= S5_WRITEDISABLE_BLUE;
666 if (!a)
667 tmp |= S5_WRITEDISABLE_ALPHA;
668
669 if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
670 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
671 i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
672 }
673 }
674
675 static void
676 update_specular(struct gl_context * ctx)
677 {
678 /* A hack to trigger the rebuild of the fragment program.
679 */
680 intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
681 }
682
683 static void
684 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
685 {
686 DBG("%s\n", __FUNCTION__);
687
688 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
689 update_specular(ctx);
690 }
691 }
692
693 static void
694 i915ShadeModel(struct gl_context * ctx, GLenum mode)
695 {
696 struct i915_context *i915 = I915_CONTEXT(ctx);
697 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
698
699 if (mode == GL_SMOOTH) {
700 i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
701 S4_FLATSHADE_COLOR |
702 S4_FLATSHADE_SPECULAR);
703 }
704 else {
705 i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
706 S4_FLATSHADE_COLOR |
707 S4_FLATSHADE_SPECULAR);
708 }
709 }
710
711 /* =============================================================
712 * Fog
713 */
714 void
715 i915_update_fog(struct gl_context * ctx)
716 {
717 struct i915_context *i915 = I915_CONTEXT(ctx);
718 GLenum mode;
719 GLboolean enabled;
720 GLboolean try_pixel_fog;
721 GLuint dw;
722
723 if (ctx->FragmentProgram._Current) {
724 /* Pull in static fog state from program */
725 mode = ctx->FragmentProgram._Current->FogOption;
726 enabled = (mode != GL_NONE);
727 try_pixel_fog = 0;
728 }
729 else {
730 enabled = ctx->Fog.Enabled;
731 mode = ctx->Fog.Mode;
732 #if 0
733 /* XXX - DISABLED -- Need ortho fallback */
734 try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
735 && ctx->Hint.Fog == GL_NICEST);
736 #else
737 try_pixel_fog = 0;
738 #endif
739 }
740
741 if (!enabled) {
742 i915->vertex_fog = I915_FOG_NONE;
743 }
744 else if (try_pixel_fog) {
745 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
746 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
747 i915->vertex_fog = I915_FOG_PIXEL;
748
749 switch (mode) {
750 case GL_LINEAR:
751 if (ctx->Fog.End <= ctx->Fog.Start) {
752 /* XXX - this won't work with fragment programs. Need to
753 * either fallback or append fog instructions to end of
754 * program in the case of linear fog.
755 */
756 printf("vertex fog!\n");
757 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
758 i915->vertex_fog = I915_FOG_VERTEX;
759 }
760 else {
761 GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
762 GLfloat c1 = ctx->Fog.End * c2;
763
764 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
765 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
766 i915->state.Fog[I915_FOGREG_MODE1] |=
767 ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
768
769 if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
770 i915->state.Fog[I915_FOGREG_MODE2]
771 = (GLuint) (c2 * FMC2_C2_ONE);
772 }
773 else {
774 fi_type fi;
775 fi.f = c2;
776 i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
777 }
778 }
779 break;
780 case GL_EXP:
781 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
782 break;
783 case GL_EXP2:
784 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
785 break;
786 default:
787 break;
788 }
789 }
790 else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
791 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
792 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
793 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
794 i915->vertex_fog = I915_FOG_VERTEX;
795 }
796
797 I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
798 dw = i915->state.Ctx[I915_CTXREG_LIS5];
799 if (enabled)
800 dw |= S5_FOG_ENABLE;
801 else
802 dw &= ~S5_FOG_ENABLE;
803 if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
804 i915->state.Ctx[I915_CTXREG_LIS5] = dw;
805 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
806 }
807
808 /* Always enable pixel fog. Vertex fog using fog coord will conflict
809 * with fog code appended onto fragment program.
810 */
811 _tnl_allow_vertex_fog( ctx, 0 );
812 _tnl_allow_pixel_fog( ctx, 1 );
813 }
814
815 static void
816 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
817 {
818 struct i915_context *i915 = I915_CONTEXT(ctx);
819
820 switch (pname) {
821 case GL_FOG_COORDINATE_SOURCE_EXT:
822 case GL_FOG_MODE:
823 case GL_FOG_START:
824 case GL_FOG_END:
825 break;
826
827 case GL_FOG_DENSITY:
828 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
829
830 if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
831 i915->state.Fog[I915_FOGREG_MODE3] =
832 (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
833 }
834 else {
835 fi_type fi;
836 fi.f = ctx->Fog.Density;
837 i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
838 }
839 break;
840
841 case GL_FOG_COLOR:
842 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
843 i915->state.Fog[I915_FOGREG_COLOR] =
844 (_3DSTATE_FOG_COLOR_CMD |
845 ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
846 ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
847 ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
848 break;
849
850 default:
851 break;
852 }
853 }
854
855 static void
856 i915Hint(struct gl_context * ctx, GLenum target, GLenum state)
857 {
858 switch (target) {
859 case GL_FOG_HINT:
860 break;
861 default:
862 break;
863 }
864 }
865
866 /* =============================================================
867 */
868
869 static void
870 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
871 {
872 struct i915_context *i915 = I915_CONTEXT(ctx);
873 GLuint dw;
874
875 switch (cap) {
876 case GL_TEXTURE_2D:
877 break;
878
879 case GL_LIGHTING:
880 case GL_COLOR_SUM:
881 update_specular(ctx);
882 break;
883
884 case GL_ALPHA_TEST:
885 dw = i915->state.Ctx[I915_CTXREG_LIS6];
886 if (state)
887 dw |= S6_ALPHA_TEST_ENABLE;
888 else
889 dw &= ~S6_ALPHA_TEST_ENABLE;
890 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
891 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
892 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
893 }
894 break;
895
896 case GL_BLEND:
897 i915EvalLogicOpBlendState(ctx);
898 break;
899
900 case GL_COLOR_LOGIC_OP:
901 i915EvalLogicOpBlendState(ctx);
902
903 /* Logicop doesn't seem to work at 16bpp:
904 */
905 if (ctx->Visual.rgbBits == 16)
906 FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
907 break;
908
909 case GL_FRAGMENT_PROGRAM_ARB:
910 break;
911
912 case GL_DITHER:
913 dw = i915->state.Ctx[I915_CTXREG_LIS5];
914 if (state)
915 dw |= S5_COLOR_DITHER_ENABLE;
916 else
917 dw &= ~S5_COLOR_DITHER_ENABLE;
918 if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
919 i915->state.Ctx[I915_CTXREG_LIS5] = dw;
920 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
921 }
922 break;
923
924 case GL_DEPTH_TEST:
925 dw = i915->state.Ctx[I915_CTXREG_LIS6];
926 if (state)
927 dw |= S6_DEPTH_TEST_ENABLE;
928 else
929 dw &= ~S6_DEPTH_TEST_ENABLE;
930 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
931 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
932 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
933 }
934
935 i915DepthMask(ctx, ctx->Depth.Mask);
936 break;
937
938 case GL_SCISSOR_TEST:
939 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
940 if (state)
941 i915->state.Buffer[I915_DESTREG_SENABLE] =
942 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
943 else
944 i915->state.Buffer[I915_DESTREG_SENABLE] =
945 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
946 break;
947
948 case GL_LINE_SMOOTH:
949 dw = i915->state.Ctx[I915_CTXREG_LIS4];
950 if (state)
951 dw |= S4_LINE_ANTIALIAS_ENABLE;
952 else
953 dw &= ~S4_LINE_ANTIALIAS_ENABLE;
954 if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
955 i915->state.Ctx[I915_CTXREG_LIS4] = dw;
956 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
957 }
958 break;
959
960 case GL_FOG:
961 break;
962
963 case GL_CULL_FACE:
964 i915CullFaceFrontFace(ctx, 0);
965 break;
966
967 case GL_STENCIL_TEST:
968 {
969 GLboolean hw_stencil = GL_FALSE;
970 if (ctx->DrawBuffer) {
971 struct intel_renderbuffer *irbStencil
972 = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
973 hw_stencil = (irbStencil && irbStencil->region);
974 }
975 if (hw_stencil) {
976 dw = i915->state.Ctx[I915_CTXREG_LIS5];
977 if (state)
978 dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
979 else
980 dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
981 if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
982 i915->state.Ctx[I915_CTXREG_LIS5] = dw;
983 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
984 }
985 }
986 else {
987 FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
988 }
989 }
990 break;
991
992 case GL_POLYGON_STIPPLE:
993 /* The stipple command worked on my 855GM box, but not my 845G.
994 * I'll do more testing later to find out exactly which hardware
995 * supports it. Disabled for now.
996 */
997 if (i915->intel.hw_stipple &&
998 i915->intel.reduced_primitive == GL_TRIANGLES) {
999 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1000 if (state)
1001 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
1002 else
1003 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
1004 }
1005 break;
1006
1007 case GL_POLYGON_SMOOTH:
1008 break;
1009
1010 case GL_POINT_SPRITE:
1011 /* This state change is handled in i915_reduced_primitive_state because
1012 * the hardware bit should only be set when rendering points.
1013 */
1014 dw = i915->state.Ctx[I915_CTXREG_LIS4];
1015 if (state)
1016 dw |= S4_SPRITE_POINT_ENABLE;
1017 else
1018 dw &= ~S4_SPRITE_POINT_ENABLE;
1019 if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
1020 i915->state.Ctx[I915_CTXREG_LIS4] = dw;
1021 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1022 }
1023 break;
1024
1025 case GL_POINT_SMOOTH:
1026 break;
1027
1028 default:
1029 ;
1030 }
1031 }
1032
1033
1034 static void
1035 i915_init_packets(struct i915_context *i915)
1036 {
1037 /* Zero all state */
1038 memset(&i915->state, 0, sizeof(i915->state));
1039
1040
1041 {
1042 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1043 /* Probably don't want to upload all this stuff every time one
1044 * piece changes.
1045 */
1046 i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
1047 I1_LOAD_S(2) |
1048 I1_LOAD_S(4) |
1049 I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
1050 i915->state.Ctx[I915_CTXREG_LIS2] = 0;
1051 i915->state.Ctx[I915_CTXREG_LIS4] = 0;
1052 i915->state.Ctx[I915_CTXREG_LIS5] = 0;
1053
1054 if (i915->intel.ctx.Visual.rgbBits == 16)
1055 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
1056
1057
1058 i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
1059 (2 << S6_TRISTRIP_PV_SHIFT));
1060
1061 i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1062 ENABLE_LOGIC_OP_FUNC |
1063 LOGIC_OP_FUNC(LOGICOP_COPY) |
1064 ENABLE_STENCIL_TEST_MASK |
1065 STENCIL_TEST_MASK(0xff) |
1066 ENABLE_STENCIL_WRITE_MASK |
1067 STENCIL_WRITE_MASK(0xff));
1068
1069 i915->state.Ctx[I915_CTXREG_IAB] =
1070 (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
1071 IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
1072
1073 i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
1074 _3DSTATE_CONST_BLEND_COLOR_CMD;
1075 i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
1076
1077 i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
1078 _3DSTATE_BACKFACE_STENCIL_MASKS |
1079 BFM_ENABLE_STENCIL_TEST_MASK |
1080 BFM_ENABLE_STENCIL_WRITE_MASK |
1081 (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
1082 (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
1083 i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
1084 _3DSTATE_BACKFACE_STENCIL_OPS |
1085 BFO_ENABLE_STENCIL_REF |
1086 BFO_ENABLE_STENCIL_FUNCS |
1087 BFO_ENABLE_STENCIL_TWO_SIDE;
1088 }
1089
1090 {
1091 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1092 i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
1093 }
1094
1095
1096 {
1097 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
1098 i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
1099 i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
1100 FMC1_FOGFUNC_VERTEX |
1101 FMC1_FOGINDEX_MODIFY_ENABLE |
1102 FMC1_FOGINDEX_W |
1103 FMC1_C1_C2_MODIFY_ENABLE |
1104 FMC1_DENSITY_MODIFY_ENABLE);
1105 i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
1106 }
1107
1108 {
1109 i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1110
1111 /* scissor */
1112 i915->state.Buffer[I915_DESTREG_SENABLE] =
1113 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
1114 i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1115 i915->state.Buffer[I915_DESTREG_SR1] = 0;
1116 i915->state.Buffer[I915_DESTREG_SR2] = 0;
1117 }
1118
1119 i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
1120 ENABLE_POINT_RASTER_RULE |
1121 OGL_POINT_RASTER_RULE |
1122 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1123 ENABLE_TRI_FAN_PROVOKE_VRTX |
1124 LINE_STRIP_PROVOKE_VRTX(1) |
1125 TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
1126
1127 #if 0
1128 {
1129 I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1130 i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1131 i915->state.Default[I915_DEFREG_C1] = 0;
1132 i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1133 i915->state.Default[I915_DEFREG_S1] = 0;
1134 i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1135 i915->state.Default[I915_DEFREG_Z1] = 0;
1136 }
1137 #endif
1138
1139
1140 /* These will be emitted every at the head of every buffer, unless
1141 * we get hardware contexts working.
1142 */
1143 i915->state.active = (I915_UPLOAD_PROGRAM |
1144 I915_UPLOAD_STIPPLE |
1145 I915_UPLOAD_CTX |
1146 I915_UPLOAD_BUFFERS |
1147 I915_UPLOAD_INVARIENT |
1148 I915_UPLOAD_RASTER_RULES);
1149 }
1150
1151 void
1152 i915_update_provoking_vertex(struct gl_context * ctx)
1153 {
1154 struct i915_context *i915 = I915_CONTEXT(ctx);
1155
1156 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1157 i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1158
1159 I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1160 i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1161 TRI_FAN_PROVOKE_VRTX_MASK);
1162
1163 /* _NEW_LIGHT */
1164 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1165 i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1166 TRI_FAN_PROVOKE_VRTX(2));
1167 i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1168 } else {
1169 i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1170 TRI_FAN_PROVOKE_VRTX(1));
1171 i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1172 }
1173 }
1174
1175 void
1176 i915InitStateFunctions(struct dd_function_table *functions)
1177 {
1178 functions->AlphaFunc = i915AlphaFunc;
1179 functions->BlendColor = i915BlendColor;
1180 functions->BlendEquationSeparate = i915BlendEquationSeparate;
1181 functions->BlendFuncSeparate = i915BlendFuncSeparate;
1182 functions->ColorMask = i915ColorMask;
1183 functions->CullFace = i915CullFaceFrontFace;
1184 functions->DepthFunc = i915DepthFunc;
1185 functions->DepthMask = i915DepthMask;
1186 functions->Enable = i915Enable;
1187 functions->Fogfv = i915Fogfv;
1188 functions->FrontFace = i915CullFaceFrontFace;
1189 functions->Hint = i915Hint;
1190 functions->LightModelfv = i915LightModelfv;
1191 functions->LineWidth = i915LineWidth;
1192 functions->LogicOpcode = i915LogicOp;
1193 functions->PointSize = i915PointSize;
1194 functions->PointParameterfv = i915PointParameterfv;
1195 functions->PolygonStipple = i915PolygonStipple;
1196 functions->Scissor = i915Scissor;
1197 functions->ShadeModel = i915ShadeModel;
1198 functions->StencilFuncSeparate = i915StencilFuncSeparate;
1199 functions->StencilMaskSeparate = i915StencilMaskSeparate;
1200 functions->StencilOpSeparate = i915StencilOpSeparate;
1201 functions->DepthRange = i915DepthRange;
1202 functions->Viewport = i915Viewport;
1203 }
1204
1205
1206 void
1207 i915InitState(struct i915_context *i915)
1208 {
1209 struct gl_context *ctx = &i915->intel.ctx;
1210
1211 i915_init_packets(i915);
1212
1213 _mesa_init_driver_state(ctx);
1214 }