src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "main/state.h"
  35 #include "tnl/tnl.h"
  36 #include "tnl/t_context.h"
  37
  38 #include "drivers/common/driverfuncs.h"
  39
  40 #include "intel_fbo.h"
  41 #include "intel_screen.h"
  42 #include "intel_batchbuffer.h"
  43 #include "intel_buffers.h"
  44
  45 #include "i915_context.h"
  46 #include "i915_reg.h"
  47
  48 #define FILE_DEBUG_FLAG DEBUG_STATE
  49
  50 void
  51 i915_update_stencil(struct gl_context * ctx)
  52 {
  53    struct i915_context *i915 = I915_CONTEXT(ctx);
  54    GLuint front_ref, front_writemask, front_mask;
  55    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  56    GLuint back_ref, back_writemask, back_mask;
  57    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  58    GLuint dirty = 0;
  59
  60    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  61     * appropriately.
  62     */
  63    /* _NEW_POLYGON | _NEW_STENCIL */
  64    if (ctx->Polygon.FrontFace == GL_CW) {
  65       front_ref = ctx->Stencil.Ref[0];
  66       front_mask = ctx->Stencil.ValueMask[0];
  67       front_writemask = ctx->Stencil.WriteMask[0];
  68       front_func = ctx->Stencil.Function[0];
  69       front_fail = ctx->Stencil.FailFunc[0];
  70       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  71       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  72       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  73       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  74       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  75       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  76       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  77       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  78       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  79    } else {
  80       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  81       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  82       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  83       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  84       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  85       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  86       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  87       back_ref = ctx->Stencil.Ref[0];
  88       back_mask = ctx->Stencil.ValueMask[0];
  89       back_writemask = ctx->Stencil.WriteMask[0];
  90       back_func = ctx->Stencil.Function[0];
  91       back_fail = ctx->Stencil.FailFunc[0];
  92       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  93       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  94    }
  95 #define set_ctx_bits(reg, mask, set) do{ \
  96    GLuint dw = i915->state.Ctx[reg]; \
  97    dw &= ~(mask); \
  98    dw |= (set); \
  99    dirty |= dw != i915->state.Ctx[reg]; \
 100    i915->state.Ctx[reg] = dw; \
 101 } while(0)
 102
 103    /* Set front state. */
 104    set_ctx_bits(I915_CTXREG_STATE4,
 105                 MODE4_ENABLE_STENCIL_TEST_MASK |
 106                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 107                 ENABLE_STENCIL_TEST_MASK |
 108                 ENABLE_STENCIL_WRITE_MASK |
 109                 STENCIL_TEST_MASK(front_mask) |
 110                 STENCIL_WRITE_MASK(front_writemask));
 111
 112    set_ctx_bits(I915_CTXREG_LIS5,
 113                 S5_STENCIL_REF_MASK |
 114                 S5_STENCIL_TEST_FUNC_MASK |
 115                 S5_STENCIL_FAIL_MASK |
 116                 S5_STENCIL_PASS_Z_FAIL_MASK |
 117                 S5_STENCIL_PASS_Z_PASS_MASK,
 118                 (front_ref << S5_STENCIL_REF_SHIFT) |
 119                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 120                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 121                 (intel_translate_stencil_op(front_pass_z_fail) <<
 122                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 123                 (intel_translate_stencil_op(front_pass_z_pass) <<
 124                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 125
 126    /* Set back state if different from front. */
 127    if (ctx->Stencil._TestTwoSide) {
 128       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 129                    BFO_STENCIL_REF_MASK |
 130                    BFO_STENCIL_TEST_MASK |
 131                    BFO_STENCIL_FAIL_MASK |
 132                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 133                    BFO_STENCIL_PASS_Z_PASS_MASK,
 134                    BFO_STENCIL_TWO_SIDE |
 135                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 136                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 137                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 138                    (intel_translate_stencil_op(back_pass_z_fail) <<
 139                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 140                    (intel_translate_stencil_op(back_pass_z_pass) <<
 141                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 142
 143       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 144                    BFM_STENCIL_TEST_MASK_MASK |
 145                    BFM_STENCIL_WRITE_MASK_MASK,
 146                    BFM_STENCIL_TEST_MASK(back_mask) |
 147                    BFM_STENCIL_WRITE_MASK(back_writemask));
 148    } else {
 149       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 150                    BFO_STENCIL_TWO_SIDE, 0);
 151    }
 152
 153 #undef set_ctx_bits
 154
 155    if (dirty)
 156       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 157 }
 158
 159 static void
 160 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 161                         GLuint mask)
 162 {
 163 }
 164
 165 static void
 166 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 167 {
 168 }
 169
 170 static void
 171 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 172                       GLenum zpass)
 173 {
 174 }
 175
 176 static void
 177 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 178 {
 179    struct i915_context *i915 = I915_CONTEXT(ctx);
 180    int test = intel_translate_compare_func(func);
 181    GLubyte refByte;
 182    GLuint dw;
 183
 184    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 185
 186    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 187    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 188    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 189           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 190    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 191       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 192       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 193    }
 194 }
 195
 196 /* This function makes sure that the proper enables are
 197  * set for LogicOp, Independant Alpha Blend, and Blending.
 198  * It needs to be called from numerous places where we
 199  * could change the LogicOp or Independant Alpha Blend without subsequent
 200  * calls to glEnable.
 201  */
 202 static void
 203 i915EvalLogicOpBlendState(struct gl_context * ctx)
 204 {
 205    struct i915_context *i915 = I915_CONTEXT(ctx);
 206    GLuint dw0, dw1;
 207
 208    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 209    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 210
 211    if (ctx->Color.ColorLogicOpEnabled) {
 212       dw0 |= S5_LOGICOP_ENABLE;
 213       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 214    }
 215    else {
 216       dw0 &= ~S5_LOGICOP_ENABLE;
 217
 218       if (ctx->Color.BlendEnabled) {
 219          dw1 |= S6_CBUF_BLEND_ENABLE;
 220       }
 221       else {
 222          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 223       }
 224    }
 225    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 226        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 227       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 228       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 229
 230       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 231    }
 232 }
 233
 234 static void
 235 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 236 {
 237    struct i915_context *i915 = I915_CONTEXT(ctx);
 238    GLubyte r, g, b, a;
 239    GLuint dw;
 240
 241    DBG("%s\n", __FUNCTION__);
 242
 243    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 244    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 245    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 246    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 247
 248    dw = (a << 24) | (r << 16) | (g << 8) | b;
 249    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 250       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 251       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 252    }
 253 }
 254
 255
 256 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 257 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 258 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 259 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 260
 261
 262
 263 static GLuint
 264 translate_blend_equation(GLenum mode)
 265 {
 266    switch (mode) {
 267    case GL_FUNC_ADD:
 268       return BLENDFUNC_ADD;
 269    case GL_MIN:
 270       return BLENDFUNC_MIN;
 271    case GL_MAX:
 272       return BLENDFUNC_MAX;
 273    case GL_FUNC_SUBTRACT:
 274       return BLENDFUNC_SUBTRACT;
 275    case GL_FUNC_REVERSE_SUBTRACT:
 276       return BLENDFUNC_REVERSE_SUBTRACT;
 277    default:
 278       return 0;
 279    }
 280 }
 281
 282 static void
 283 i915UpdateBlendState(struct gl_context * ctx)
 284 {
 285    struct i915_context *i915 = I915_CONTEXT(ctx);
 286    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 287                  ~(IAB_SRC_FACTOR_MASK |
 288                    IAB_DST_FACTOR_MASK |
 289                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 290
 291    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 292                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 293                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 294
 295    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 296    GLuint eqA = ctx->Color.Blend[0].EquationA;
 297    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 298    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 299    GLuint srcA = ctx->Color.Blend[0].SrcA;
 300    GLuint dstA = ctx->Color.Blend[0].DstA;
 301
 302    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 303       srcRGB = dstRGB = GL_ONE;
 304    }
 305
 306    if (eqA == GL_MIN || eqA == GL_MAX) {
 307       srcA = dstA = GL_ONE;
 308    }
 309
 310    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 311    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 312    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 313
 314    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 315    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 316    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 317
 318    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 319       iab |= IAB_ENABLE;
 320
 321    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 322       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 323       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 324    }
 325    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 326       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 327       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 328    }
 329
 330    /* This will catch a logicop blend equation */
 331    i915EvalLogicOpBlendState(ctx);
 332 }
 333
 334
 335 static void
 336 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 337                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 338 {
 339    i915UpdateBlendState(ctx);
 340 }
 341
 342
 343 static void
 344 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 345 {
 346    i915UpdateBlendState(ctx);
 347 }
 348
 349
 350 static void
 351 i915DepthFunc(struct gl_context * ctx, GLenum func)
 352 {
 353    struct i915_context *i915 = I915_CONTEXT(ctx);
 354    int test = intel_translate_compare_func(func);
 355    GLuint dw;
 356
 357    DBG("%s\n", __FUNCTION__);
 358
 359    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 360    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 361    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 362    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 363       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 364       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 365    }
 366 }
 367
 368 static void
 369 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 370 {
 371    struct i915_context *i915 = I915_CONTEXT(ctx);
 372    GLuint dw;
 373
 374    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 375
 376    if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 377       flag = false;
 378
 379    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 380    if (flag && ctx->Depth.Test)
 381       dw |= S6_DEPTH_WRITE_ENABLE;
 382    else
 383       dw &= ~S6_DEPTH_WRITE_ENABLE;
 384    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 385       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 386       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 387    }
 388 }
 389
 390
 391
 392 /**
 393  * Update the viewport transformation matrix.  Depends on:
 394  *  - viewport pos/size
 395  *  - depthrange
 396  *  - window pos/size or FBO size
 397  */
 398 void
 399 intelCalcViewport(struct gl_context * ctx)
 400 {
 401    struct intel_context *intel = intel_context(ctx);
 402
 403    if (ctx->DrawBuffer->Name == 0) {
 404       _math_matrix_viewport(&intel->ViewportMatrix,
 405                             ctx->Viewport.X,
 406                             ctx->DrawBuffer->Height - ctx->Viewport.Y,
 407                             ctx->Viewport.Width,
 408                             -ctx->Viewport.Height,
 409                             ctx->Viewport.Near,
 410                             ctx->Viewport.Far,
 411                             1.0);
 412    } else {
 413       _math_matrix_viewport(&intel->ViewportMatrix,
 414                             ctx->Viewport.X,
 415                             ctx->Viewport.Y,
 416                             ctx->Viewport.Width,
 417                             ctx->Viewport.Height,
 418                             ctx->Viewport.Near,
 419                             ctx->Viewport.Far,
 420                             1.0);
 421    }
 422 }
 423
 424
 425 /** Called from ctx->Driver.Viewport() */
 426 static void
 427 i915Viewport(struct gl_context * ctx,
 428               GLint x, GLint y, GLsizei width, GLsizei height)
 429 {
 430    intelCalcViewport(ctx);
 431 }
 432
 433
 434 /** Called from ctx->Driver.DepthRange() */
 435 static void
 436 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 437 {
 438    intelCalcViewport(ctx);
 439 }
 440
 441
 442 /* =============================================================
 443  * Polygon stipple
 444  *
 445  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 446  * Fortunately stipple is usually a repeating pattern.
 447  */
 448 static void
 449 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 450 {
 451    struct i915_context *i915 = I915_CONTEXT(ctx);
 452    const GLubyte *m;
 453    GLubyte p[4];
 454    int i, j, k;
 455    int active = (ctx->Polygon.StippleFlag &&
 456                  i915->intel.reduced_primitive == GL_TRIANGLES);
 457    GLuint newMask;
 458
 459    if (active) {
 460       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 461       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 462    }
 463
 464    /* Use the already unpacked stipple data from the context rather than the
 465     * uninterpreted mask passed in.
 466     */
 467    mask = (const GLubyte *)ctx->PolygonStipple;
 468    m = mask;
 469
 470    p[0] = mask[12] & 0xf;
 471    p[0] |= p[0] << 4;
 472    p[1] = mask[8] & 0xf;
 473    p[1] |= p[1] << 4;
 474    p[2] = mask[4] & 0xf;
 475    p[2] |= p[2] << 4;
 476    p[3] = mask[0] & 0xf;
 477    p[3] |= p[3] << 4;
 478
 479    for (k = 0; k < 8; k++)
 480       for (j = 3; j >= 0; j--)
 481          for (i = 0; i < 4; i++, m++)
 482             if (*m != p[j]) {
 483                i915->intel.hw_stipple = 0;
 484                return;
 485             }
 486
 487    newMask = (((p[0] & 0xf) << 0) |
 488               ((p[1] & 0xf) << 4) |
 489               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 490
 491
 492    if (newMask == 0xffff || newMask == 0x0) {
 493       /* this is needed to make conform pass */
 494       i915->intel.hw_stipple = 0;
 495       return;
 496    }
 497
 498    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 499    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 500    i915->intel.hw_stipple = 1;
 501
 502    if (active)
 503       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 504 }
 505
 506
 507 /* =============================================================
 508  * Hardware clipping
 509  */
 510 static void
 511 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 512 {
 513    struct i915_context *i915 = I915_CONTEXT(ctx);
 514    int x1, y1, x2, y2;
 515
 516    if (!ctx->DrawBuffer)
 517       return;
 518
 519    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 520
 521    if (ctx->DrawBuffer->Name == 0) {
 522       x1 = x;
 523       y1 = ctx->DrawBuffer->Height - (y + h);
 524       x2 = x + w - 1;
 525       y2 = y1 + h - 1;
 526       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 527    }
 528    else {
 529       /* FBO - not inverted
 530        */
 531       x1 = x;
 532       y1 = y;
 533       x2 = x + w - 1;
 534       y2 = y + h - 1;
 535       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 536    }
 537
 538    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 539    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 540    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 541    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 542
 543    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 544
 545    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 546    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 547    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 548 }
 549
 550 static void
 551 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 552 {
 553    struct i915_context *i915 = I915_CONTEXT(ctx);
 554    int tmp = intel_translate_logic_op(opcode);
 555
 556    DBG("%s\n", __FUNCTION__);
 557
 558    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 559    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 560    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 561 }
 562
 563
 564
 565 static void
 566 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 567 {
 568    struct i915_context *i915 = I915_CONTEXT(ctx);
 569    GLuint mode, dw;
 570
 571    DBG("%s %d\n", __FUNCTION__,
 572        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 573
 574    if (!ctx->Polygon.CullFlag) {
 575       mode = S4_CULLMODE_NONE;
 576    }
 577    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 578       mode = S4_CULLMODE_CW;
 579
 580       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 581          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 582       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 583          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 584       if (ctx->Polygon.FrontFace != GL_CCW)
 585          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 586    }
 587    else {
 588       mode = S4_CULLMODE_BOTH;
 589    }
 590
 591    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 592    dw &= ~S4_CULLMODE_MASK;
 593    dw |= mode;
 594    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 595       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 596       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 597    }
 598 }
 599
 600 static void
 601 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 602 {
 603    struct i915_context *i915 = I915_CONTEXT(ctx);
 604    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 605    int width;
 606
 607    DBG("%s\n", __FUNCTION__);
 608
 609    width = (int) (widthf * 2);
 610    width = CLAMP(width, 1, 0xf);
 611    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 612
 613    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 614       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 615       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 616    }
 617 }
 618
 619 static void
 620 i915PointSize(struct gl_context * ctx, GLfloat size)
 621 {
 622    struct i915_context *i915 = I915_CONTEXT(ctx);
 623    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 624    GLint point_size = (int) round(size);
 625
 626    DBG("%s\n", __FUNCTION__);
 627
 628    point_size = CLAMP(point_size, 1, 255);
 629    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 630
 631    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 632       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 633       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 634    }
 635 }
 636
 637
 638 static void
 639 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 640 {
 641    struct i915_context *i915 = I915_CONTEXT(ctx);
 642
 643    switch (pname) {
 644    case GL_POINT_SPRITE_COORD_ORIGIN:
 645       /* This could be supported, but it would require modifying the fragment
 646        * program to invert the y component of the texture coordinate by
 647        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 648        */
 649       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 650                (params[0] != GL_UPPER_LEFT));
 651       break;
 652    }
 653 }
 654
 655
 656 /* =============================================================
 657  * Color masks
 658  */
 659
 660 static void
 661 i915ColorMask(struct gl_context * ctx,
 662               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 663 {
 664    struct i915_context *i915 = I915_CONTEXT(ctx);
 665    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 666
 667    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 668        a);
 669
 670    if (!r)
 671       tmp |= S5_WRITEDISABLE_RED;
 672    if (!g)
 673       tmp |= S5_WRITEDISABLE_GREEN;
 674    if (!b)
 675       tmp |= S5_WRITEDISABLE_BLUE;
 676    if (!a)
 677       tmp |= S5_WRITEDISABLE_ALPHA;
 678
 679    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 680       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 681       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 682    }
 683 }
 684
 685 static void
 686 update_specular(struct gl_context * ctx)
 687 {
 688    /* A hack to trigger the rebuild of the fragment program.
 689     */
 690    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 691 }
 692
 693 static void
 694 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 695 {
 696    DBG("%s\n", __FUNCTION__);
 697
 698    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 699       update_specular(ctx);
 700    }
 701 }
 702
 703 static void
 704 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 705 {
 706    struct i915_context *i915 = I915_CONTEXT(ctx);
 707    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 708
 709    if (mode == GL_SMOOTH) {
 710       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 711                                              S4_FLATSHADE_COLOR |
 712                                              S4_FLATSHADE_SPECULAR);
 713    }
 714    else {
 715       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 716                                             S4_FLATSHADE_COLOR |
 717                                             S4_FLATSHADE_SPECULAR);
 718    }
 719 }
 720
 721 /* =============================================================
 722  * Fog
 723  *
 724  * This empty function remains because _mesa_init_driver_state calls
 725  * dd_function_table::Fogfv unconditionally.  We have to have some function
 726  * there so that it doesn't try to call a NULL pointer.
 727  */
 728 static void
 729 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 730 {
 731    (void) ctx;
 732    (void) pname;
 733    (void) param;
 734 }
 735
 736 /* =============================================================
 737  */
 738
 739 static void
 740 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 741 {
 742    struct i915_context *i915 = I915_CONTEXT(ctx);
 743    GLuint dw;
 744
 745    switch (cap) {
 746    case GL_TEXTURE_2D:
 747       break;
 748
 749    case GL_LIGHTING:
 750    case GL_COLOR_SUM:
 751       update_specular(ctx);
 752       break;
 753
 754    case GL_ALPHA_TEST:
 755       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 756       if (state)
 757          dw |= S6_ALPHA_TEST_ENABLE;
 758       else
 759          dw &= ~S6_ALPHA_TEST_ENABLE;
 760       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 761          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 762          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 763       }
 764       break;
 765
 766    case GL_BLEND:
 767       i915EvalLogicOpBlendState(ctx);
 768       break;
 769
 770    case GL_COLOR_LOGIC_OP:
 771       i915EvalLogicOpBlendState(ctx);
 772
 773       /* Logicop doesn't seem to work at 16bpp:
 774        */
 775       if (ctx->Visual.rgbBits == 16)
 776          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 777       break;
 778
 779    case GL_FRAGMENT_PROGRAM_ARB:
 780       break;
 781
 782    case GL_DITHER:
 783       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 784       if (state)
 785          dw |= S5_COLOR_DITHER_ENABLE;
 786       else
 787          dw &= ~S5_COLOR_DITHER_ENABLE;
 788       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 789          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 790          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 791       }
 792       break;
 793
 794    case GL_DEPTH_TEST:
 795       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 796
 797       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 798          state = false;
 799
 800       if (state)
 801          dw |= S6_DEPTH_TEST_ENABLE;
 802       else
 803          dw &= ~S6_DEPTH_TEST_ENABLE;
 804       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 805          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 806          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 807       }
 808
 809       i915DepthMask(ctx, ctx->Depth.Mask);
 810       break;
 811
 812    case GL_SCISSOR_TEST:
 813       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 814       if (state)
 815          i915->state.Buffer[I915_DESTREG_SENABLE] =
 816             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 817       else
 818          i915->state.Buffer[I915_DESTREG_SENABLE] =
 819             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 820       break;
 821
 822    case GL_LINE_SMOOTH:
 823       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 824       if (state)
 825          dw |= S4_LINE_ANTIALIAS_ENABLE;
 826       else
 827          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 828       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 829          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 830          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 831       }
 832       break;
 833
 834    case GL_CULL_FACE:
 835       i915CullFaceFrontFace(ctx, 0);
 836       break;
 837
 838    case GL_STENCIL_TEST:
 839       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.stencilBits)
 840          state = false;
 841
 842       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 843       if (state)
 844          dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 845       else
 846          dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 847       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 848          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 849          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 850       }
 851       break;
 852
 853    case GL_POLYGON_STIPPLE:
 854       /* The stipple command worked on my 855GM box, but not my 845G.
 855        * I'll do more testing later to find out exactly which hardware
 856        * supports it.  Disabled for now.
 857        */
 858       if (i915->intel.hw_stipple &&
 859           i915->intel.reduced_primitive == GL_TRIANGLES) {
 860          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 861          if (state)
 862             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 863          else
 864             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 865       }
 866       break;
 867
 868    case GL_POLYGON_SMOOTH:
 869       break;
 870
 871    case GL_POINT_SPRITE:
 872       /* This state change is handled in i915_reduced_primitive_state because
 873        * the hardware bit should only be set when rendering points.
 874        */
 875          dw = i915->state.Ctx[I915_CTXREG_LIS4];
 876       if (state)
 877          dw |= S4_SPRITE_POINT_ENABLE;
 878       else
 879          dw &= ~S4_SPRITE_POINT_ENABLE;
 880       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 881          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 882          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 883       }
 884       break;
 885
 886    case GL_POINT_SMOOTH:
 887       break;
 888
 889    default:
 890       ;
 891    }
 892 }
 893
 894
 895 static void
 896 i915_init_packets(struct i915_context *i915)
 897 {
 898    /* Zero all state */
 899    memset(&i915->state, 0, sizeof(i915->state));
 900
 901
 902    {
 903       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 904       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 905       /* Probably don't want to upload all this stuff every time one
 906        * piece changes.
 907        */
 908       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 909                                          I1_LOAD_S(2) |
 910                                          I1_LOAD_S(4) |
 911                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 912       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 913       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 914       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 915
 916       if (i915->intel.ctx.Visual.rgbBits == 16)
 917          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 918
 919
 920       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 921                                            (2 << S6_TRISTRIP_PV_SHIFT));
 922
 923       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 924                                              ENABLE_LOGIC_OP_FUNC |
 925                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 926                                              ENABLE_STENCIL_TEST_MASK |
 927                                              STENCIL_TEST_MASK(0xff) |
 928                                              ENABLE_STENCIL_WRITE_MASK |
 929                                              STENCIL_WRITE_MASK(0xff));
 930
 931       i915->state.Blend[I915_BLENDREG_IAB] =
 932          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 933           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 934
 935       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
 936          _3DSTATE_CONST_BLEND_COLOR_CMD;
 937       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 938
 939       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 940          _3DSTATE_BACKFACE_STENCIL_MASKS |
 941          BFM_ENABLE_STENCIL_TEST_MASK |
 942          BFM_ENABLE_STENCIL_WRITE_MASK |
 943          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
 944          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
 945       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
 946          _3DSTATE_BACKFACE_STENCIL_OPS |
 947          BFO_ENABLE_STENCIL_REF |
 948          BFO_ENABLE_STENCIL_FUNCS |
 949          BFO_ENABLE_STENCIL_TWO_SIDE;
 950    }
 951
 952    {
 953       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 954       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 955    }
 956
 957    {
 958       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 959
 960       /* scissor */
 961       i915->state.Buffer[I915_DESTREG_SENABLE] =
 962          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 963       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 964       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 965       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 966    }
 967
 968    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
 969       ENABLE_POINT_RASTER_RULE |
 970       OGL_POINT_RASTER_RULE |
 971       ENABLE_LINE_STRIP_PROVOKE_VRTX |
 972       ENABLE_TRI_FAN_PROVOKE_VRTX |
 973       LINE_STRIP_PROVOKE_VRTX(1) |
 974       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
 975
 976 #if 0
 977    {
 978       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 979       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 980       i915->state.Default[I915_DEFREG_C1] = 0;
 981       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 982       i915->state.Default[I915_DEFREG_S1] = 0;
 983       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 984       i915->state.Default[I915_DEFREG_Z1] = 0;
 985    }
 986 #endif
 987
 988
 989    /* These will be emitted every at the head of every buffer, unless
 990     * we get hardware contexts working.
 991     */
 992    i915->state.active = (I915_UPLOAD_PROGRAM |
 993                          I915_UPLOAD_STIPPLE |
 994                          I915_UPLOAD_CTX |
 995                          I915_UPLOAD_BLEND |
 996                          I915_UPLOAD_BUFFERS |
 997                          I915_UPLOAD_INVARIENT |
 998                          I915_UPLOAD_RASTER_RULES);
 999 }
1000
1001 void
1002 i915_update_provoking_vertex(struct gl_context * ctx)
1003 {
1004    struct i915_context *i915 = I915_CONTEXT(ctx);
1005
1006    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1007    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1008
1009    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1010    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1011                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1012
1013    /* _NEW_LIGHT */
1014    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1015       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1016                                                      TRI_FAN_PROVOKE_VRTX(2));
1017       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1018    } else {
1019       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1020                                                      TRI_FAN_PROVOKE_VRTX(1));
1021       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1022     }
1023 }
1024
1025 void
1026 i915InitStateFunctions(struct dd_function_table *functions)
1027 {
1028    functions->AlphaFunc = i915AlphaFunc;
1029    functions->BlendColor = i915BlendColor;
1030    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1031    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1032    functions->ColorMask = i915ColorMask;
1033    functions->CullFace = i915CullFaceFrontFace;
1034    functions->DepthFunc = i915DepthFunc;
1035    functions->DepthMask = i915DepthMask;
1036    functions->Enable = i915Enable;
1037    functions->Fogfv = i915Fogfv;
1038    functions->FrontFace = i915CullFaceFrontFace;
1039    functions->LightModelfv = i915LightModelfv;
1040    functions->LineWidth = i915LineWidth;
1041    functions->LogicOpcode = i915LogicOp;
1042    functions->PointSize = i915PointSize;
1043    functions->PointParameterfv = i915PointParameterfv;
1044    functions->PolygonStipple = i915PolygonStipple;
1045    functions->Scissor = i915Scissor;
1046    functions->ShadeModel = i915ShadeModel;
1047    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1048    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1049    functions->StencilOpSeparate = i915StencilOpSeparate;
1050    functions->DepthRange = i915DepthRange;
1051    functions->Viewport = i915Viewport;
1052 }
1053
1054
1055 void
1056 i915InitState(struct i915_context *i915)
1057 {
1058    struct gl_context *ctx = &i915->intel.ctx;
1059
1060    i915_init_packets(i915);
1061
1062    _mesa_init_driver_state(ctx);
1063 }