src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "drivers/common/driverfuncs.h"
  40
  41 #include "intel_fbo.h"
  42 #include "intel_screen.h"
  43 #include "intel_batchbuffer.h"
  44 #include "intel_buffers.h"
  45
  46 #include "i915_context.h"
  47 #include "i915_reg.h"
  48
  49 #define FILE_DEBUG_FLAG DEBUG_STATE
  50
  51 void
  52 i915_update_stencil(struct gl_context * ctx)
  53 {
  54    struct i915_context *i915 = I915_CONTEXT(ctx);
  55    GLuint front_ref, front_writemask, front_mask;
  56    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  57    GLuint back_ref, back_writemask, back_mask;
  58    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  59    GLuint dirty = 0;
  60
  61    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  62     * appropriately.
  63     */
  64    /* _NEW_POLYGON | _NEW_STENCIL */
  65    if (ctx->Polygon.FrontFace == GL_CW) {
  66       front_ref = ctx->Stencil.Ref[0];
  67       front_mask = ctx->Stencil.ValueMask[0];
  68       front_writemask = ctx->Stencil.WriteMask[0];
  69       front_func = ctx->Stencil.Function[0];
  70       front_fail = ctx->Stencil.FailFunc[0];
  71       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  72       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  73       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  74       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  75       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  76       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  77       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  78       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  80    } else {
  81       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  82       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  83       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  84       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  85       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  86       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  88       back_ref = ctx->Stencil.Ref[0];
  89       back_mask = ctx->Stencil.ValueMask[0];
  90       back_writemask = ctx->Stencil.WriteMask[0];
  91       back_func = ctx->Stencil.Function[0];
  92       back_fail = ctx->Stencil.FailFunc[0];
  93       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  94       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  95    }
  96 #define set_ctx_bits(reg, mask, set) do{ \
  97    GLuint dw = i915->state.Ctx[reg]; \
  98    dw &= ~(mask); \
  99    dw |= (set); \
 100    dirty |= dw != i915->state.Ctx[reg]; \
 101 } while(0)
 102
 103    /* Set front state. */
 104    set_ctx_bits(I915_CTXREG_STATE4,
 105                 MODE4_ENABLE_STENCIL_TEST_MASK |
 106                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 107                 ENABLE_STENCIL_TEST_MASK |
 108                 ENABLE_STENCIL_WRITE_MASK |
 109                 STENCIL_TEST_MASK(front_mask) |
 110                 STENCIL_WRITE_MASK(front_writemask));
 111
 112    set_ctx_bits(I915_CTXREG_LIS5,
 113                 S5_STENCIL_REF_MASK |
 114                 S5_STENCIL_TEST_FUNC_MASK |
 115                 S5_STENCIL_FAIL_MASK |
 116                 S5_STENCIL_PASS_Z_FAIL_MASK |
 117                 S5_STENCIL_PASS_Z_PASS_MASK,
 118                 (front_ref << S5_STENCIL_REF_SHIFT) |
 119                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 120                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 121                 (intel_translate_stencil_op(front_pass_z_fail) <<
 122                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 123                 (intel_translate_stencil_op(front_pass_z_pass) <<
 124                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 125
 126    /* Set back state if different from front. */
 127    if (ctx->Stencil._TestTwoSide) {
 128       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 129                    BFO_STENCIL_REF_MASK |
 130                    BFO_STENCIL_TEST_MASK |
 131                    BFO_STENCIL_FAIL_MASK |
 132                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 133                    BFO_STENCIL_PASS_Z_PASS_MASK,
 134                    BFO_STENCIL_TWO_SIDE |
 135                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 136                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 137                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 138                    (intel_translate_stencil_op(back_pass_z_fail) <<
 139                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 140                    (intel_translate_stencil_op(back_pass_z_pass) <<
 141                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 142
 143       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 144                    BFM_STENCIL_TEST_MASK_MASK |
 145                    BFM_STENCIL_WRITE_MASK_MASK,
 146                    BFM_STENCIL_TEST_MASK(back_mask) |
 147                    BFM_STENCIL_WRITE_MASK(back_writemask));
 148    } else {
 149       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 150                    BFO_STENCIL_TWO_SIDE, 0);
 151    }
 152
 153 #undef set_ctx_bits
 154
 155    if (dirty)
 156       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 157 }
 158
 159 static void
 160 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 161                         GLuint mask)
 162 {
 163 }
 164
 165 static void
 166 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 167 {
 168 }
 169
 170 static void
 171 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 172                       GLenum zpass)
 173 {
 174 }
 175
 176 static void
 177 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 178 {
 179    struct i915_context *i915 = I915_CONTEXT(ctx);
 180    int test = intel_translate_compare_func(func);
 181    GLubyte refByte;
 182    GLuint dw;
 183
 184    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 185
 186    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 187    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 188    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 189           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 190    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 191       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 192       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 193    }
 194 }
 195
 196 /* This function makes sure that the proper enables are
 197  * set for LogicOp, Independant Alpha Blend, and Blending.
 198  * It needs to be called from numerous places where we
 199  * could change the LogicOp or Independant Alpha Blend without subsequent
 200  * calls to glEnable.
 201  */
 202 static void
 203 i915EvalLogicOpBlendState(struct gl_context * ctx)
 204 {
 205    struct i915_context *i915 = I915_CONTEXT(ctx);
 206    GLuint dw0, dw1;
 207
 208    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 209    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 210
 211    if (RGBA_LOGICOP_ENABLED(ctx)) {
 212       dw0 |= S5_LOGICOP_ENABLE;
 213       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 214    }
 215    else {
 216       dw0 &= ~S5_LOGICOP_ENABLE;
 217
 218       if (ctx->Color.BlendEnabled) {
 219          dw1 |= S6_CBUF_BLEND_ENABLE;
 220       }
 221       else {
 222          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 223       }
 224    }
 225    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 226        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 227       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 228       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 229
 230       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 231    }
 232 }
 233
 234 static void
 235 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 236 {
 237    struct i915_context *i915 = I915_CONTEXT(ctx);
 238    GLubyte r, g, b, a;
 239    GLuint dw;
 240
 241    DBG("%s\n", __FUNCTION__);
 242
 243    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 244    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 245    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 246    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 247
 248    dw = (a << 24) | (r << 16) | (g << 8) | b;
 249    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 250       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 251       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 252    }
 253 }
 254
 255
 256 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 257 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 258 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 259 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 260
 261
 262
 263 static GLuint
 264 translate_blend_equation(GLenum mode)
 265 {
 266    switch (mode) {
 267    case GL_FUNC_ADD:
 268       return BLENDFUNC_ADD;
 269    case GL_MIN:
 270       return BLENDFUNC_MIN;
 271    case GL_MAX:
 272       return BLENDFUNC_MAX;
 273    case GL_FUNC_SUBTRACT:
 274       return BLENDFUNC_SUBTRACT;
 275    case GL_FUNC_REVERSE_SUBTRACT:
 276       return BLENDFUNC_REVERSE_SUBTRACT;
 277    default:
 278       return 0;
 279    }
 280 }
 281
 282 static void
 283 i915UpdateBlendState(struct gl_context * ctx)
 284 {
 285    struct i915_context *i915 = I915_CONTEXT(ctx);
 286    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 287                  ~(IAB_SRC_FACTOR_MASK |
 288                    IAB_DST_FACTOR_MASK |
 289                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 290
 291    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 292                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 293                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 294
 295    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 296    GLuint eqA = ctx->Color.Blend[0].EquationA;
 297    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 298    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 299    GLuint srcA = ctx->Color.Blend[0].SrcA;
 300    GLuint dstA = ctx->Color.Blend[0].DstA;
 301
 302    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 303       srcRGB = dstRGB = GL_ONE;
 304    }
 305
 306    if (eqA == GL_MIN || eqA == GL_MAX) {
 307       srcA = dstA = GL_ONE;
 308    }
 309
 310    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 311    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 312    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 313
 314    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 315    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 316    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 317
 318    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 319       iab |= IAB_ENABLE;
 320
 321    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 322       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 323       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 324    }
 325    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 326       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 327       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 328    }
 329
 330    /* This will catch a logicop blend equation */
 331    i915EvalLogicOpBlendState(ctx);
 332 }
 333
 334
 335 static void
 336 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 337                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 338 {
 339    i915UpdateBlendState(ctx);
 340 }
 341
 342
 343 static void
 344 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 345 {
 346    i915UpdateBlendState(ctx);
 347 }
 348
 349
 350 static void
 351 i915DepthFunc(struct gl_context * ctx, GLenum func)
 352 {
 353    struct i915_context *i915 = I915_CONTEXT(ctx);
 354    int test = intel_translate_compare_func(func);
 355    GLuint dw;
 356
 357    DBG("%s\n", __FUNCTION__);
 358
 359    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 360    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 361    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 362    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 363       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 364       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 365    }
 366 }
 367
 368 static void
 369 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 370 {
 371    struct i915_context *i915 = I915_CONTEXT(ctx);
 372    GLuint dw;
 373
 374    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 375
 376    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 377    if (flag && ctx->Depth.Test)
 378       dw |= S6_DEPTH_WRITE_ENABLE;
 379    else
 380       dw &= ~S6_DEPTH_WRITE_ENABLE;
 381    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 382       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 383       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 384    }
 385 }
 386
 387
 388
 389 /**
 390  * Update the viewport transformation matrix.  Depends on:
 391  *  - viewport pos/size
 392  *  - depthrange
 393  *  - window pos/size or FBO size
 394  */
 395 void
 396 intelCalcViewport(struct gl_context * ctx)
 397 {
 398    struct intel_context *intel = intel_context(ctx);
 399    const GLfloat *v = ctx->Viewport._WindowMap.m;
 400    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 401    GLfloat *m = intel->ViewportMatrix.m;
 402    GLfloat yScale, yBias;
 403
 404    if (ctx->DrawBuffer->Name) {
 405       /* User created FBO */
 406       /* y=0=bottom */
 407       yScale = 1.0;
 408       yBias = 0.0;
 409    }
 410    else {
 411       /* window buffer, y=0=top */
 412       yScale = -1.0;
 413       yBias = ctx->DrawBuffer->Height;
 414    }
 415
 416    m[MAT_SX] = v[MAT_SX];
 417    m[MAT_TX] = v[MAT_TX];
 418
 419    m[MAT_SY] = v[MAT_SY] * yScale;
 420    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 421
 422    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 423    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 424 }
 425
 426
 427 /** Called from ctx->Driver.Viewport() */
 428 static void
 429 i915Viewport(struct gl_context * ctx,
 430               GLint x, GLint y, GLsizei width, GLsizei height)
 431 {
 432    intelCalcViewport(ctx);
 433 }
 434
 435
 436 /** Called from ctx->Driver.DepthRange() */
 437 static void
 438 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 439 {
 440    intelCalcViewport(ctx);
 441 }
 442
 443
 444 /* =============================================================
 445  * Polygon stipple
 446  *
 447  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 448  * Fortunately stipple is usually a repeating pattern.
 449  */
 450 static void
 451 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 452 {
 453    struct i915_context *i915 = I915_CONTEXT(ctx);
 454    const GLubyte *m;
 455    GLubyte p[4];
 456    int i, j, k;
 457    int active = (ctx->Polygon.StippleFlag &&
 458                  i915->intel.reduced_primitive == GL_TRIANGLES);
 459    GLuint newMask;
 460
 461    if (active) {
 462       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 463       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 464    }
 465
 466    /* Use the already unpacked stipple data from the context rather than the
 467     * uninterpreted mask passed in.
 468     */
 469    mask = (const GLubyte *)ctx->PolygonStipple;
 470    m = mask;
 471
 472    p[0] = mask[12] & 0xf;
 473    p[0] |= p[0] << 4;
 474    p[1] = mask[8] & 0xf;
 475    p[1] |= p[1] << 4;
 476    p[2] = mask[4] & 0xf;
 477    p[2] |= p[2] << 4;
 478    p[3] = mask[0] & 0xf;
 479    p[3] |= p[3] << 4;
 480
 481    for (k = 0; k < 8; k++)
 482       for (j = 3; j >= 0; j--)
 483          for (i = 0; i < 4; i++, m++)
 484             if (*m != p[j]) {
 485                i915->intel.hw_stipple = 0;
 486                return;
 487             }
 488
 489    newMask = (((p[0] & 0xf) << 0) |
 490               ((p[1] & 0xf) << 4) |
 491               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 492
 493
 494    if (newMask == 0xffff || newMask == 0x0) {
 495       /* this is needed to make conform pass */
 496       i915->intel.hw_stipple = 0;
 497       return;
 498    }
 499
 500    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 501    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 502    i915->intel.hw_stipple = 1;
 503
 504    if (active)
 505       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 506 }
 507
 508
 509 /* =============================================================
 510  * Hardware clipping
 511  */
 512 static void
 513 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 514 {
 515    struct i915_context *i915 = I915_CONTEXT(ctx);
 516    int x1, y1, x2, y2;
 517
 518    if (!ctx->DrawBuffer)
 519       return;
 520
 521    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 522
 523    if (ctx->DrawBuffer->Name == 0) {
 524       x1 = x;
 525       y1 = ctx->DrawBuffer->Height - (y + h);
 526       x2 = x + w - 1;
 527       y2 = y1 + h - 1;
 528       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 529    }
 530    else {
 531       /* FBO - not inverted
 532        */
 533       x1 = x;
 534       y1 = y;
 535       x2 = x + w - 1;
 536       y2 = y + h - 1;
 537       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 538    }
 539
 540    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 541    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 542    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 543    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 544
 545    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 546
 547    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 548    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 549    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 550 }
 551
 552 static void
 553 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 554 {
 555    struct i915_context *i915 = I915_CONTEXT(ctx);
 556    int tmp = intel_translate_logic_op(opcode);
 557
 558    DBG("%s\n", __FUNCTION__);
 559
 560    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 561    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 562    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 563 }
 564
 565
 566
 567 static void
 568 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 569 {
 570    struct i915_context *i915 = I915_CONTEXT(ctx);
 571    GLuint mode, dw;
 572
 573    DBG("%s %d\n", __FUNCTION__,
 574        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 575
 576    if (!ctx->Polygon.CullFlag) {
 577       mode = S4_CULLMODE_NONE;
 578    }
 579    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 580       mode = S4_CULLMODE_CW;
 581
 582       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 583          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 584       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 585          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 586       if (ctx->Polygon.FrontFace != GL_CCW)
 587          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 588    }
 589    else {
 590       mode = S4_CULLMODE_BOTH;
 591    }
 592
 593    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 594    dw &= ~S4_CULLMODE_MASK;
 595    dw |= mode;
 596    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 597       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 598       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 599    }
 600 }
 601
 602 static void
 603 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 604 {
 605    struct i915_context *i915 = I915_CONTEXT(ctx);
 606    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 607    int width;
 608
 609    DBG("%s\n", __FUNCTION__);
 610
 611    width = (int) (widthf * 2);
 612    width = CLAMP(width, 1, 0xf);
 613    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 614
 615    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 616       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 617       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 618    }
 619 }
 620
 621 static void
 622 i915PointSize(struct gl_context * ctx, GLfloat size)
 623 {
 624    struct i915_context *i915 = I915_CONTEXT(ctx);
 625    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 626    GLint point_size = (int) round(size);
 627
 628    DBG("%s\n", __FUNCTION__);
 629
 630    point_size = CLAMP(point_size, 1, 255);
 631    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 632
 633    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 634       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 635       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 636    }
 637 }
 638
 639
 640 static void
 641 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 642 {
 643    struct i915_context *i915 = I915_CONTEXT(ctx);
 644
 645    switch (pname) {
 646    case GL_POINT_SPRITE_COORD_ORIGIN:
 647       /* This could be supported, but it would require modifying the fragment
 648        * program to invert the y component of the texture coordinate by
 649        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 650        */
 651       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 652                (params[0] != GL_UPPER_LEFT));
 653       break;
 654    }
 655 }
 656
 657
 658 /* =============================================================
 659  * Color masks
 660  */
 661
 662 static void
 663 i915ColorMask(struct gl_context * ctx,
 664               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 665 {
 666    struct i915_context *i915 = I915_CONTEXT(ctx);
 667    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 668
 669    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 670        a);
 671
 672    if (!r)
 673       tmp |= S5_WRITEDISABLE_RED;
 674    if (!g)
 675       tmp |= S5_WRITEDISABLE_GREEN;
 676    if (!b)
 677       tmp |= S5_WRITEDISABLE_BLUE;
 678    if (!a)
 679       tmp |= S5_WRITEDISABLE_ALPHA;
 680
 681    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 682       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 683       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 684    }
 685 }
 686
 687 static void
 688 update_specular(struct gl_context * ctx)
 689 {
 690    /* A hack to trigger the rebuild of the fragment program.
 691     */
 692    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 693 }
 694
 695 static void
 696 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 697 {
 698    DBG("%s\n", __FUNCTION__);
 699
 700    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 701       update_specular(ctx);
 702    }
 703 }
 704
 705 static void
 706 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 707 {
 708    struct i915_context *i915 = I915_CONTEXT(ctx);
 709    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 710
 711    if (mode == GL_SMOOTH) {
 712       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 713                                              S4_FLATSHADE_COLOR |
 714                                              S4_FLATSHADE_SPECULAR);
 715    }
 716    else {
 717       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 718                                             S4_FLATSHADE_COLOR |
 719                                             S4_FLATSHADE_SPECULAR);
 720    }
 721 }
 722
 723 /* =============================================================
 724  * Fog
 725  */
 726 void
 727 i915_update_fog(struct gl_context * ctx)
 728 {
 729    struct i915_context *i915 = I915_CONTEXT(ctx);
 730    GLenum mode;
 731    GLboolean enabled;
 732    GLboolean try_pixel_fog;
 733    GLuint dw;
 734
 735    if (ctx->FragmentProgram._Current) {
 736       /* Pull in static fog state from program */
 737       mode = ctx->FragmentProgram._Current->FogOption;
 738       enabled = (mode != GL_NONE);
 739       try_pixel_fog = 0;
 740    }
 741    else {
 742       enabled = ctx->Fog.Enabled;
 743       mode = ctx->Fog.Mode;
 744 #if 0
 745       /* XXX - DISABLED -- Need ortho fallback */
 746       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
 747                        && ctx->Hint.Fog == GL_NICEST);
 748 #else
 749       try_pixel_fog = 0;
 750 #endif
 751    }
 752
 753    if (!enabled) {
 754       i915->vertex_fog = I915_FOG_NONE;
 755    }
 756    else if (try_pixel_fog) {
 757       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 758       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 759       i915->vertex_fog = I915_FOG_PIXEL;
 760
 761       switch (mode) {
 762       case GL_LINEAR:
 763          if (ctx->Fog.End <= ctx->Fog.Start) {
 764             /* XXX - this won't work with fragment programs.  Need to
 765              * either fallback or append fog instructions to end of
 766              * program in the case of linear fog.
 767              */
 768             printf("vertex fog!\n");
 769             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 770             i915->vertex_fog = I915_FOG_VERTEX;
 771          }
 772          else {
 773             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 774             GLfloat c1 = ctx->Fog.End * c2;
 775
 776             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 777             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 778             i915->state.Fog[I915_FOGREG_MODE1] |=
 779                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 780
 781             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 782                i915->state.Fog[I915_FOGREG_MODE2]
 783                   = (GLuint) (c2 * FMC2_C2_ONE);
 784             }
 785             else {
 786                fi_type fi;
 787                fi.f = c2;
 788                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 789             }
 790          }
 791          break;
 792       case GL_EXP:
 793          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 794          break;
 795       case GL_EXP2:
 796          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 797          break;
 798       default:
 799          break;
 800       }
 801    }
 802    else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 803       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 804       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 805       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 806       i915->vertex_fog = I915_FOG_VERTEX;
 807    }
 808
 809    I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 810    dw = i915->state.Ctx[I915_CTXREG_LIS5];
 811    if (enabled)
 812       dw |= S5_FOG_ENABLE;
 813    else
 814       dw &= ~S5_FOG_ENABLE;
 815    if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 816       i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 817       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 818    }
 819
 820    /* Always enable pixel fog.  Vertex fog using fog coord will conflict
 821     * with fog code appended onto fragment program.
 822     */
 823     _tnl_allow_vertex_fog( ctx, 0 );
 824     _tnl_allow_pixel_fog( ctx, 1 );
 825 }
 826
 827 static void
 828 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 829 {
 830    struct i915_context *i915 = I915_CONTEXT(ctx);
 831
 832    switch (pname) {
 833    case GL_FOG_COORDINATE_SOURCE_EXT:
 834    case GL_FOG_MODE:
 835    case GL_FOG_START:
 836    case GL_FOG_END:
 837       break;
 838
 839    case GL_FOG_DENSITY:
 840       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 841
 842       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 843          i915->state.Fog[I915_FOGREG_MODE3] =
 844             (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
 845       }
 846       else {
 847          fi_type fi;
 848          fi.f = ctx->Fog.Density;
 849          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 850       }
 851       break;
 852
 853    case GL_FOG_COLOR:
 854       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 855       i915->state.Fog[I915_FOGREG_COLOR] =
 856          (_3DSTATE_FOG_COLOR_CMD |
 857           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 858           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 859           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 860       break;
 861
 862    default:
 863       break;
 864    }
 865 }
 866
 867 static void
 868 i915Hint(struct gl_context * ctx, GLenum target, GLenum state)
 869 {
 870    switch (target) {
 871    case GL_FOG_HINT:
 872       break;
 873    default:
 874       break;
 875    }
 876 }
 877
 878 /* =============================================================
 879  */
 880
 881 static void
 882 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 883 {
 884    struct i915_context *i915 = I915_CONTEXT(ctx);
 885    GLuint dw;
 886
 887    switch (cap) {
 888    case GL_TEXTURE_2D:
 889       break;
 890
 891    case GL_LIGHTING:
 892    case GL_COLOR_SUM:
 893       update_specular(ctx);
 894       break;
 895
 896    case GL_ALPHA_TEST:
 897       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 898       if (state)
 899          dw |= S6_ALPHA_TEST_ENABLE;
 900       else
 901          dw &= ~S6_ALPHA_TEST_ENABLE;
 902       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 903          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 904          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 905       }
 906       break;
 907
 908    case GL_BLEND:
 909       i915EvalLogicOpBlendState(ctx);
 910       break;
 911
 912    case GL_COLOR_LOGIC_OP:
 913       i915EvalLogicOpBlendState(ctx);
 914
 915       /* Logicop doesn't seem to work at 16bpp:
 916        */
 917       if (ctx->Visual.rgbBits == 16)
 918          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 919       break;
 920
 921    case GL_FRAGMENT_PROGRAM_ARB:
 922       break;
 923
 924    case GL_DITHER:
 925       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 926       if (state)
 927          dw |= S5_COLOR_DITHER_ENABLE;
 928       else
 929          dw &= ~S5_COLOR_DITHER_ENABLE;
 930       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 931          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 932          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 933       }
 934       break;
 935
 936    case GL_DEPTH_TEST:
 937       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 938       if (state)
 939          dw |= S6_DEPTH_TEST_ENABLE;
 940       else
 941          dw &= ~S6_DEPTH_TEST_ENABLE;
 942       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 943          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 944          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 945       }
 946
 947       i915DepthMask(ctx, ctx->Depth.Mask);
 948       break;
 949
 950    case GL_SCISSOR_TEST:
 951       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 952       if (state)
 953          i915->state.Buffer[I915_DESTREG_SENABLE] =
 954             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 955       else
 956          i915->state.Buffer[I915_DESTREG_SENABLE] =
 957             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 958       break;
 959
 960    case GL_LINE_SMOOTH:
 961       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 962       if (state)
 963          dw |= S4_LINE_ANTIALIAS_ENABLE;
 964       else
 965          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 966       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 967          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 968          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 969       }
 970       break;
 971
 972    case GL_FOG:
 973       break;
 974
 975    case GL_CULL_FACE:
 976       i915CullFaceFrontFace(ctx, 0);
 977       break;
 978
 979    case GL_STENCIL_TEST:
 980       {
 981          GLboolean hw_stencil = GL_FALSE;
 982          if (ctx->DrawBuffer) {
 983             struct intel_renderbuffer *irbStencil
 984                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 985             hw_stencil = (irbStencil && irbStencil->region);
 986          }
 987          if (hw_stencil) {
 988             dw = i915->state.Ctx[I915_CTXREG_LIS5];
 989             if (state)
 990                dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 991             else
 992                dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 993             if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 994                i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 995                I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 996             }
 997          }
 998          else {
 999             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
1000          }
1001       }
1002       break;
1003
1004    case GL_POLYGON_STIPPLE:
1005       /* The stipple command worked on my 855GM box, but not my 845G.
1006        * I'll do more testing later to find out exactly which hardware
1007        * supports it.  Disabled for now.
1008        */
1009       if (i915->intel.hw_stipple &&
1010           i915->intel.reduced_primitive == GL_TRIANGLES) {
1011          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1012          if (state)
1013             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
1014          else
1015             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
1016       }
1017       break;
1018
1019    case GL_POLYGON_SMOOTH:
1020       break;
1021
1022    case GL_POINT_SPRITE:
1023       /* This state change is handled in i915_reduced_primitive_state because
1024        * the hardware bit should only be set when rendering points.
1025        */
1026          dw = i915->state.Ctx[I915_CTXREG_LIS4];
1027       if (state)
1028          dw |= S4_SPRITE_POINT_ENABLE;
1029       else
1030          dw &= ~S4_SPRITE_POINT_ENABLE;
1031       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
1032          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
1033          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1034       }
1035       break;
1036
1037    case GL_POINT_SMOOTH:
1038       break;
1039
1040    default:
1041       ;
1042    }
1043 }
1044
1045
1046 static void
1047 i915_init_packets(struct i915_context *i915)
1048 {
1049    /* Zero all state */
1050    memset(&i915->state, 0, sizeof(i915->state));
1051
1052
1053    {
1054       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1055       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
1056       /* Probably don't want to upload all this stuff every time one
1057        * piece changes.
1058        */
1059       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
1060                                          I1_LOAD_S(2) |
1061                                          I1_LOAD_S(4) |
1062                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
1063       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
1064       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
1065       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
1066
1067       if (i915->intel.ctx.Visual.rgbBits == 16)
1068          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
1069
1070
1071       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
1072                                            (2 << S6_TRISTRIP_PV_SHIFT));
1073
1074       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1075                                              ENABLE_LOGIC_OP_FUNC |
1076                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
1077                                              ENABLE_STENCIL_TEST_MASK |
1078                                              STENCIL_TEST_MASK(0xff) |
1079                                              ENABLE_STENCIL_WRITE_MASK |
1080                                              STENCIL_WRITE_MASK(0xff));
1081
1082       i915->state.Blend[I915_BLENDREG_IAB] =
1083          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
1084           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
1085
1086       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
1087          _3DSTATE_CONST_BLEND_COLOR_CMD;
1088       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
1089
1090       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
1091          _3DSTATE_BACKFACE_STENCIL_MASKS |
1092          BFM_ENABLE_STENCIL_TEST_MASK |
1093          BFM_ENABLE_STENCIL_WRITE_MASK |
1094          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
1095          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
1096       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
1097          _3DSTATE_BACKFACE_STENCIL_OPS |
1098          BFO_ENABLE_STENCIL_REF |
1099          BFO_ENABLE_STENCIL_FUNCS |
1100          BFO_ENABLE_STENCIL_TWO_SIDE;
1101    }
1102
1103    {
1104       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1105       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
1106    }
1107
1108
1109    {
1110       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
1111       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
1112       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
1113                                             FMC1_FOGFUNC_VERTEX |
1114                                             FMC1_FOGINDEX_MODIFY_ENABLE |
1115                                             FMC1_FOGINDEX_W |
1116                                             FMC1_C1_C2_MODIFY_ENABLE |
1117                                             FMC1_DENSITY_MODIFY_ENABLE);
1118       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
1119    }
1120
1121    {
1122       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1123
1124       /* scissor */
1125       i915->state.Buffer[I915_DESTREG_SENABLE] =
1126          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
1127       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1128       i915->state.Buffer[I915_DESTREG_SR1] = 0;
1129       i915->state.Buffer[I915_DESTREG_SR2] = 0;
1130    }
1131
1132    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
1133       ENABLE_POINT_RASTER_RULE |
1134       OGL_POINT_RASTER_RULE |
1135       ENABLE_LINE_STRIP_PROVOKE_VRTX |
1136       ENABLE_TRI_FAN_PROVOKE_VRTX |
1137       LINE_STRIP_PROVOKE_VRTX(1) |
1138       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
1139
1140 #if 0
1141    {
1142       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1143       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1144       i915->state.Default[I915_DEFREG_C1] = 0;
1145       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1146       i915->state.Default[I915_DEFREG_S1] = 0;
1147       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1148       i915->state.Default[I915_DEFREG_Z1] = 0;
1149    }
1150 #endif
1151
1152
1153    /* These will be emitted every at the head of every buffer, unless
1154     * we get hardware contexts working.
1155     */
1156    i915->state.active = (I915_UPLOAD_PROGRAM |
1157                          I915_UPLOAD_STIPPLE |
1158                          I915_UPLOAD_CTX |
1159                          I915_UPLOAD_BLEND |
1160                          I915_UPLOAD_BUFFERS |
1161                          I915_UPLOAD_INVARIENT |
1162                          I915_UPLOAD_RASTER_RULES);
1163 }
1164
1165 void
1166 i915_update_provoking_vertex(struct gl_context * ctx)
1167 {
1168    struct i915_context *i915 = I915_CONTEXT(ctx);
1169
1170    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1171    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1172
1173    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1174    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1175                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1176
1177    /* _NEW_LIGHT */
1178    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1179       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1180                                                      TRI_FAN_PROVOKE_VRTX(2));
1181       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1182    } else {
1183       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1184                                                      TRI_FAN_PROVOKE_VRTX(1));
1185       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1186     }
1187 }
1188
1189 void
1190 i915InitStateFunctions(struct dd_function_table *functions)
1191 {
1192    functions->AlphaFunc = i915AlphaFunc;
1193    functions->BlendColor = i915BlendColor;
1194    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1195    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1196    functions->ColorMask = i915ColorMask;
1197    functions->CullFace = i915CullFaceFrontFace;
1198    functions->DepthFunc = i915DepthFunc;
1199    functions->DepthMask = i915DepthMask;
1200    functions->Enable = i915Enable;
1201    functions->Fogfv = i915Fogfv;
1202    functions->FrontFace = i915CullFaceFrontFace;
1203    functions->Hint = i915Hint;
1204    functions->LightModelfv = i915LightModelfv;
1205    functions->LineWidth = i915LineWidth;
1206    functions->LogicOpcode = i915LogicOp;
1207    functions->PointSize = i915PointSize;
1208    functions->PointParameterfv = i915PointParameterfv;
1209    functions->PolygonStipple = i915PolygonStipple;
1210    functions->Scissor = i915Scissor;
1211    functions->ShadeModel = i915ShadeModel;
1212    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1213    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1214    functions->StencilOpSeparate = i915StencilOpSeparate;
1215    functions->DepthRange = i915DepthRange;
1216    functions->Viewport = i915Viewport;
1217 }
1218
1219
1220 void
1221 i915InitState(struct i915_context *i915)
1222 {
1223    struct gl_context *ctx = &i915->intel.ctx;
1224
1225    i915_init_packets(i915);
1226
1227    _mesa_init_driver_state(ctx);
1228 }