fix off-by-one in load_state_immediate
[mesa.git] / src / mesa / drivers / dri / i915 / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "glheader.h"
30 #include "context.h"
31 #include "macros.h"
32 #include "enums.h"
33 #include "dd.h"
34 #include "tnl/tnl.h"
35 #include "tnl/t_context.h"
36
37 #include "texmem.h"
38
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41
42 #include "i915_context.h"
43 #include "i915_reg.h"
44
45
46
47 static void
48 i915StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func, GLint ref,
49 GLuint mask)
50 {
51 i915ContextPtr i915 = I915_CONTEXT(ctx);
52 int test = intel_translate_compare_func( func );
53
54 mask = mask & 0xff;
55
56 if (INTEL_DEBUG&DEBUG_DRI)
57 fprintf(stderr, "%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
58 _mesa_lookup_enum_by_nr(func), ref, mask);
59
60
61 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
62 i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
63 i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
64 STENCIL_TEST_MASK(mask));
65
66 i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
67 S5_STENCIL_TEST_FUNC_MASK);
68
69 i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
70 (test << S5_STENCIL_TEST_FUNC_SHIFT));
71 }
72
73 static void
74 i915StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
75 {
76 i915ContextPtr i915 = I915_CONTEXT(ctx);
77
78 if (INTEL_DEBUG&DEBUG_DRI)
79 fprintf(stderr, "%s : mask 0x%x\n", __FUNCTION__, mask);
80
81 mask = mask & 0xff;
82
83 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
84 i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
85 i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
86 STENCIL_WRITE_MASK(mask));
87 }
88
89
90 static void
91 i915StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, GLenum zfail,
92 GLenum zpass)
93 {
94 i915ContextPtr i915 = I915_CONTEXT(ctx);
95 int fop = intel_translate_stencil_op(fail);
96 int dfop = intel_translate_stencil_op(zfail);
97 int dpop = intel_translate_stencil_op(zpass);
98
99
100 if (INTEL_DEBUG&DEBUG_DRI)
101 fprintf(stderr, "%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
102 _mesa_lookup_enum_by_nr(fail),
103 _mesa_lookup_enum_by_nr(zfail),
104 _mesa_lookup_enum_by_nr(zpass));
105
106 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
107
108 i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
109 S5_STENCIL_PASS_Z_FAIL_MASK |
110 S5_STENCIL_PASS_Z_PASS_MASK);
111
112 i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
113 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
114 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
115 }
116
117 static void i915AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
118 {
119 i915ContextPtr i915 = I915_CONTEXT(ctx);
120 int test = intel_translate_compare_func( func );
121 GLubyte refByte;
122
123 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
124
125 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
126 i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
127 S6_ALPHA_REF_MASK);
128 i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
129 (((GLuint)refByte) << S6_ALPHA_REF_SHIFT));
130 }
131
132 /* This function makes sure that the proper enables are
133 * set for LogicOp, Independant Alpha Blend, and Blending.
134 * It needs to be called from numerous places where we
135 * could change the LogicOp or Independant Alpha Blend without subsequent
136 * calls to glEnable.
137 */
138 static void i915EvalLogicOpBlendState(GLcontext *ctx)
139 {
140 i915ContextPtr i915 = I915_CONTEXT(ctx);
141
142 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
143
144 if (RGBA_LOGICOP_ENABLED(ctx)) {
145 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
146 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
147 } else {
148 i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
149
150 if (ctx->Color.BlendEnabled) {
151 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
152 } else {
153 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
154 }
155 }
156 }
157
158 static void i915BlendColor(GLcontext *ctx, const GLfloat color[4])
159 {
160 i915ContextPtr i915 = I915_CONTEXT(ctx);
161 GLubyte r, g, b, a;
162
163 if (INTEL_DEBUG&DEBUG_DRI)
164 fprintf(stderr, "%s\n", __FUNCTION__);
165
166 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
167 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
168 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
169 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
170
171 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
172 i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = (a<<24) | (r<<16) | (g<<8) | b;
173 }
174
175
176 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
177 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
178 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
179 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
180
181
182
183 static GLuint translate_blend_equation( GLenum mode )
184 {
185 switch (mode) {
186 case GL_FUNC_ADD: return BLENDFUNC_ADD;
187 case GL_MIN: return BLENDFUNC_MIN;
188 case GL_MAX: return BLENDFUNC_MAX;
189 case GL_FUNC_SUBTRACT: return BLENDFUNC_SUBTRACT;
190 case GL_FUNC_REVERSE_SUBTRACT: return BLENDFUNC_REVERSE_SUBTRACT;
191 default: return 0;
192 }
193 }
194
195 static void i915UpdateBlendState( GLcontext *ctx )
196 {
197 i915ContextPtr i915 = I915_CONTEXT(ctx);
198 GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
199 ~(IAB_SRC_FACTOR_MASK |
200 IAB_DST_FACTOR_MASK |
201 (BLENDFUNC_MASK << IAB_FUNC_SHIFT) |
202 IAB_ENABLE));
203
204 GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
205 ~(S6_CBUF_SRC_BLEND_FACT_MASK |
206 S6_CBUF_DST_BLEND_FACT_MASK |
207 S6_CBUF_BLEND_FUNC_MASK));
208
209 GLuint eqRGB = ctx->Color.BlendEquationRGB;
210 GLuint eqA = ctx->Color.BlendEquationA;
211 GLuint srcRGB = ctx->Color.BlendSrcRGB;
212 GLuint dstRGB = ctx->Color.BlendDstRGB;
213 GLuint srcA = ctx->Color.BlendSrcA;
214 GLuint dstA = ctx->Color.BlendDstA;
215
216 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
217 srcRGB = dstRGB = GL_ONE;
218 }
219
220 if (eqA == GL_MIN || eqA == GL_MAX) {
221 srcA = dstA = GL_ONE;
222 }
223
224 lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
225 lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
226 lis6 |= translate_blend_equation( eqRGB ) << S6_CBUF_BLEND_FUNC_SHIFT;
227
228 iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
229 iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
230 iab |= translate_blend_equation( eqA ) << IAB_FUNC_SHIFT;
231
232 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
233 iab |= IAB_ENABLE;
234
235 if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
236 lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
237 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
238 i915->state.Ctx[I915_CTXREG_IAB] = iab;
239 i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
240 }
241
242 /* This will catch a logicop blend equation */
243 i915EvalLogicOpBlendState(ctx);
244 }
245
246
247 static void i915BlendFuncSeparate(GLcontext *ctx, GLenum srcRGB,
248 GLenum dstRGB, GLenum srcA,
249 GLenum dstA )
250 {
251 i915UpdateBlendState( ctx );
252 }
253
254
255 static void i915BlendEquationSeparate(GLcontext *ctx, GLenum eqRGB,
256 GLenum eqA)
257 {
258 i915UpdateBlendState( ctx );
259 }
260
261
262 static void i915DepthFunc(GLcontext *ctx, GLenum func)
263 {
264 i915ContextPtr i915 = I915_CONTEXT(ctx);
265 int test = intel_translate_compare_func( func );
266
267 if (INTEL_DEBUG&DEBUG_DRI)
268 fprintf(stderr, "%s\n", __FUNCTION__);
269
270 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
271 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
272 i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
273 }
274
275 static void i915DepthMask(GLcontext *ctx, GLboolean flag)
276 {
277 i915ContextPtr i915 = I915_CONTEXT(ctx);
278
279 if (INTEL_DEBUG&DEBUG_DRI)
280 fprintf(stderr, "%s flag (%d)\n", __FUNCTION__, flag);
281
282 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
283
284 if (flag && ctx->Depth.Test)
285 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
286 else
287 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
288 }
289
290 /* =============================================================
291 * Polygon stipple
292 *
293 * The i915 supports a 4x4 stipple natively, GL wants 32x32.
294 * Fortunately stipple is usually a repeating pattern.
295 */
296 static void i915PolygonStipple( GLcontext *ctx, const GLubyte *mask )
297 {
298 i915ContextPtr i915 = I915_CONTEXT(ctx);
299 const GLubyte *m = mask;
300 GLubyte p[4];
301 int i,j,k;
302 int active = (ctx->Polygon.StippleFlag &&
303 i915->intel.reduced_primitive == GL_TRIANGLES);
304 GLuint newMask;
305
306 if (active) {
307 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
308 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
309 }
310
311 p[0] = mask[12] & 0xf; p[0] |= p[0] << 4;
312 p[1] = mask[8] & 0xf; p[1] |= p[1] << 4;
313 p[2] = mask[4] & 0xf; p[2] |= p[2] << 4;
314 p[3] = mask[0] & 0xf; p[3] |= p[3] << 4;
315
316 for (k = 0 ; k < 8 ; k++)
317 for (j = 3 ; j >= 0; j--)
318 for (i = 0 ; i < 4 ; i++, m++)
319 if (*m != p[j]) {
320 i915->intel.hw_stipple = 0;
321 return;
322 }
323
324 newMask = (((p[0] & 0xf) << 0) |
325 ((p[1] & 0xf) << 4) |
326 ((p[2] & 0xf) << 8) |
327 ((p[3] & 0xf) << 12));
328
329
330 if (newMask == 0xffff || newMask == 0x0) {
331 /* this is needed to make conform pass */
332 i915->intel.hw_stipple = 0;
333 return;
334 }
335
336 i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
337 i915->state.Stipple[I915_STPREG_ST1] |= newMask;
338 i915->intel.hw_stipple = 1;
339
340 if (active)
341 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
342 }
343
344
345 /* =============================================================
346 * Hardware clipping
347 */
348 static void i915Scissor(GLcontext *ctx, GLint x, GLint y,
349 GLsizei w, GLsizei h)
350 {
351 i915ContextPtr i915 = I915_CONTEXT(ctx);
352 intelScreenPrivate *screen = i915->intel.intelScreen;
353 int x1, y1, x2, y2;
354
355 if (!i915->intel.driDrawable)
356 return;
357
358 x1 = x;
359 y1 = i915->intel.driDrawable->h - (y + h);
360 x2 = x + w - 1;
361 y2 = y1 + h - 1;
362
363 if (INTEL_DEBUG&DEBUG_DRI)
364 fprintf(stderr, "[%s] x(%d) y(%d) w(%d) h(%d)\n", __FUNCTION__,
365 x, y, w, h);
366
367 if (x1 < 0) x1 = 0;
368 if (y1 < 0) y1 = 0;
369 if (x2 < 0) x2 = 0;
370 if (y2 < 0) y2 = 0;
371
372 if (x2 >= screen->width) x2 = screen->width-1;
373 if (y2 >= screen->height) y2 = screen->height-1;
374 if (x1 >= screen->width) x1 = screen->width-1;
375 if (y1 >= screen->height) y1 = screen->height-1;
376
377
378 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
379 i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
380 i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
381 }
382
383 static void i915LogicOp(GLcontext *ctx, GLenum opcode)
384 {
385 i915ContextPtr i915 = I915_CONTEXT(ctx);
386 int tmp = intel_translate_logic_op(opcode);
387
388 if (INTEL_DEBUG&DEBUG_DRI)
389 fprintf(stderr, "%s\n", __FUNCTION__);
390
391 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
392 i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
393 i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
394 }
395
396
397
398 static void i915CullFaceFrontFace(GLcontext *ctx, GLenum unused)
399 {
400 i915ContextPtr i915 = I915_CONTEXT(ctx);
401 GLuint mode;
402
403 if (INTEL_DEBUG&DEBUG_DRI)
404 fprintf(stderr, "%s\n", __FUNCTION__);
405
406 if (!ctx->Polygon.CullFlag) {
407 mode = S4_CULLMODE_NONE;
408 }
409 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
410 mode = S4_CULLMODE_CW;
411
412 if (ctx->Polygon.CullFaceMode == GL_FRONT)
413 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
414 if (ctx->Polygon.FrontFace != GL_CCW)
415 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
416 }
417 else {
418 mode = S4_CULLMODE_BOTH;
419 }
420
421 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
422 i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
423 i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
424 }
425
426 static void i915LineWidth( GLcontext *ctx, GLfloat widthf )
427 {
428 i915ContextPtr i915 = I915_CONTEXT( ctx );
429 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
430 int width;
431
432 if (INTEL_DEBUG&DEBUG_DRI)
433 fprintf(stderr, "%s\n", __FUNCTION__);
434
435 width = (int)(widthf * 2);
436 CLAMP_SELF(width, 1, 0xf);
437 lis4 |= width << S4_LINE_WIDTH_SHIFT;
438
439 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
440 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
441 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
442 }
443 }
444
445 static void i915PointSize(GLcontext *ctx, GLfloat size)
446 {
447 i915ContextPtr i915 = I915_CONTEXT(ctx);
448 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
449 GLint point_size = (int)size;
450
451 if (INTEL_DEBUG&DEBUG_DRI)
452 fprintf(stderr, "%s\n", __FUNCTION__);
453
454 CLAMP_SELF(point_size, 1, 255);
455 lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
456
457 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
458 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
459 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
460 }
461 }
462
463
464 /* =============================================================
465 * Color masks
466 */
467
468 static void i915ColorMask(GLcontext *ctx,
469 GLboolean r, GLboolean g,
470 GLboolean b, GLboolean a)
471 {
472 i915ContextPtr i915 = I915_CONTEXT( ctx );
473 GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
474
475 if (INTEL_DEBUG&DEBUG_DRI)
476 fprintf(stderr, "%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
477
478 if (!r) tmp |= S5_WRITEDISABLE_RED;
479 if (!g) tmp |= S5_WRITEDISABLE_GREEN;
480 if (!b) tmp |= S5_WRITEDISABLE_BLUE;
481 if (!a) tmp |= S5_WRITEDISABLE_ALPHA;
482
483 if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
484 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
485 i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
486 }
487 }
488
489 static void update_specular( GLcontext *ctx )
490 {
491 /* A hack to trigger the rebuild of the fragment program.
492 */
493 INTEL_CONTEXT(ctx)->NewGLState |= _NEW_TEXTURE;
494 I915_CONTEXT(ctx)->tex_program.translated = 0;
495 }
496
497 static void i915LightModelfv(GLcontext *ctx, GLenum pname,
498 const GLfloat *param)
499 {
500 if (INTEL_DEBUG&DEBUG_DRI)
501 fprintf(stderr, "%s\n", __FUNCTION__);
502
503 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
504 update_specular( ctx );
505 }
506 }
507
508 static void i915ShadeModel(GLcontext *ctx, GLenum mode)
509 {
510 i915ContextPtr i915 = I915_CONTEXT(ctx);
511 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
512
513 if (mode == GL_SMOOTH) {
514 i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
515 S4_FLATSHADE_COLOR |
516 S4_FLATSHADE_SPECULAR);
517 } else {
518 i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
519 S4_FLATSHADE_COLOR |
520 S4_FLATSHADE_SPECULAR);
521 }
522 }
523
524 /* =============================================================
525 * Fog
526 */
527 void i915_update_fog( GLcontext *ctx )
528 {
529 i915ContextPtr i915 = I915_CONTEXT(ctx);
530 GLenum mode;
531 GLboolean enabled;
532 GLboolean try_pixel_fog;
533
534 if (ctx->FragmentProgram._Active) {
535 /* Pull in static fog state from program */
536
537 mode = ctx->FragmentProgram._Current->FogOption;
538 enabled = (mode != GL_NONE);
539 try_pixel_fog = 0;
540 }
541 else {
542 enabled = ctx->Fog.Enabled;
543 mode = ctx->Fog.Mode;
544
545 try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT &&
546 ctx->Hint.Fog == GL_NICEST &&
547 0); /* XXX - DISABLE -- Need ortho fallback */
548 }
549
550 if (!enabled) {
551 i915->vertex_fog = I915_FOG_NONE;
552 }
553 else if (try_pixel_fog) {
554
555 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
556 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
557 i915->vertex_fog = I915_FOG_PIXEL;
558
559 switch (mode) {
560 case GL_LINEAR:
561 if (ctx->Fog.End <= ctx->Fog.Start) {
562 /* XXX - this won't work with fragment programs. Need to
563 * either fallback or append fog instructions to end of
564 * program in the case of linear fog.
565 */
566 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
567 i915->vertex_fog = I915_FOG_VERTEX;
568 }
569 else {
570 GLfloat c1 = ctx->Fog.End/(ctx->Fog.End-ctx->Fog.Start);
571 GLfloat c2 = 1.0/(ctx->Fog.End-ctx->Fog.Start);
572
573 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
574 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
575 i915->state.Fog[I915_FOGREG_MODE1] |=
576 ((GLuint)(c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
577
578 if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
579 i915->state.Fog[I915_FOGREG_MODE2] = (GLuint)(c2 * FMC2_C2_ONE);
580 }
581 else {
582 union { float f; int i; } fi;
583 fi.f = c2;
584 i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
585 }
586 }
587 break;
588 case GL_EXP:
589 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
590 break;
591 case GL_EXP2:
592 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
593 break;
594 default:
595 break;
596 }
597 }
598 else /* if (i915->vertex_fog != I915_FOG_VERTEX) */ {
599 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
600 i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
601 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
602 i915->vertex_fog = I915_FOG_VERTEX;
603 }
604
605 {
606 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
607 I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
608 if (enabled)
609 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
610 else
611 i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
612 }
613
614 /* always enbale pixel fog
615 * vertex fog use precaculted fog coord will conflict with appended
616 * fog program
617 */
618 _tnl_allow_vertex_fog( ctx, 0 );
619 _tnl_allow_pixel_fog( ctx, 1 );
620 }
621
622 static void i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param)
623 {
624 i915ContextPtr i915 = I915_CONTEXT(ctx);
625
626 switch (pname) {
627 case GL_FOG_COORDINATE_SOURCE_EXT:
628 case GL_FOG_MODE:
629 case GL_FOG_START:
630 case GL_FOG_END:
631 break;
632
633 case GL_FOG_DENSITY:
634 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
635
636 if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
637 i915->state.Fog[I915_FOGREG_MODE3] = (GLuint)(ctx->Fog.Density *
638 FMC3_D_ONE);
639 }
640 else {
641 union { float f; int i; } fi;
642 fi.f = ctx->Fog.Density;
643 i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
644 }
645 break;
646
647 case GL_FOG_COLOR:
648 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
649 i915->state.Fog[I915_FOGREG_COLOR] =
650 (_3DSTATE_FOG_COLOR_CMD |
651 ((GLubyte)(ctx->Fog.Color[0]*255.0F) << 16) |
652 ((GLubyte)(ctx->Fog.Color[1]*255.0F) << 8) |
653 ((GLubyte)(ctx->Fog.Color[2]*255.0F) << 0));
654 break;
655
656 default:
657 break;
658 }
659 }
660
661 static void i915Hint(GLcontext *ctx, GLenum target, GLenum state)
662 {
663 switch (target) {
664 case GL_FOG_HINT:
665 break;
666 default:
667 break;
668 }
669 }
670
671 /* =============================================================
672 */
673
674 static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
675 {
676 i915ContextPtr i915 = I915_CONTEXT(ctx);
677
678 switch(cap) {
679 case GL_TEXTURE_2D:
680 break;
681
682 case GL_LIGHTING:
683 case GL_COLOR_SUM:
684 update_specular( ctx );
685 break;
686
687 case GL_ALPHA_TEST:
688 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
689 if (state)
690 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
691 else
692 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
693 break;
694
695 case GL_BLEND:
696 i915EvalLogicOpBlendState(ctx);
697 break;
698
699 case GL_COLOR_LOGIC_OP:
700 i915EvalLogicOpBlendState(ctx);
701
702 /* Logicop doesn't seem to work at 16bpp:
703 */
704 if (i915->intel.intelScreen->cpp == 2)
705 FALLBACK( &i915->intel, I915_FALLBACK_LOGICOP, state );
706 break;
707
708 case GL_FRAGMENT_PROGRAM_ARB:
709 break;
710
711 case GL_DITHER:
712 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
713 if (state)
714 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
715 else
716 i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
717 break;
718
719 case GL_DEPTH_TEST:
720 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
721 if (state)
722 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
723 else
724 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
725
726 i915DepthMask( ctx, ctx->Depth.Mask );
727 break;
728
729 case GL_SCISSOR_TEST:
730 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
731 if (state)
732 i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
733 ENABLE_SCISSOR_RECT);
734 else
735 i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
736 DISABLE_SCISSOR_RECT);
737 break;
738
739 case GL_LINE_SMOOTH:
740 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
741 if (state)
742 i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
743 else
744 i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
745 break;
746
747 case GL_FOG:
748 break;
749
750 case GL_CULL_FACE:
751 i915CullFaceFrontFace(ctx, 0);
752 break;
753
754 case GL_STENCIL_TEST:
755 if (i915->intel.hw_stencil) {
756 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
757 if (state)
758 i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
759 S5_STENCIL_WRITE_ENABLE);
760 else
761 i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
762 S5_STENCIL_WRITE_ENABLE);
763 } else {
764 FALLBACK( &i915->intel, I915_FALLBACK_STENCIL, state );
765 }
766 break;
767
768 case GL_POLYGON_STIPPLE:
769 /* The stipple command worked on my 855GM box, but not my 845G.
770 * I'll do more testing later to find out exactly which hardware
771 * supports it. Disabled for now.
772 */
773 if (i915->intel.hw_stipple &&
774 i915->intel.reduced_primitive == GL_TRIANGLES)
775 {
776 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
777 if (state)
778 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
779 else
780 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
781 }
782 break;
783
784 case GL_POLYGON_SMOOTH:
785 FALLBACK( &i915->intel, I915_FALLBACK_POLYGON_SMOOTH, state );
786 break;
787
788 case GL_POINT_SMOOTH:
789 FALLBACK( &i915->intel, I915_FALLBACK_POINT_SMOOTH, state );
790 break;
791
792 default:
793 ;
794 }
795 }
796
797
798 static void i915_init_packets( i915ContextPtr i915 )
799 {
800 intelScreenPrivate *screen = i915->intel.intelScreen;
801
802 /* Zero all state */
803 memset(&i915->state, 0, sizeof(i915->state));
804
805
806 {
807 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
808 /* Probably don't want to upload all this stuff every time one
809 * piece changes.
810 */
811 i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
812 I1_LOAD_S(2) |
813 I1_LOAD_S(4) |
814 I1_LOAD_S(5) |
815 I1_LOAD_S(6) |
816 (3));
817 i915->state.Ctx[I915_CTXREG_LIS2] = 0;
818 i915->state.Ctx[I915_CTXREG_LIS4] = 0;
819 i915->state.Ctx[I915_CTXREG_LIS5] = 0;
820
821 if (screen->cpp == 2)
822 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
823
824
825 i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
826 (2 << S6_TRISTRIP_PV_SHIFT));
827
828 i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
829 ENABLE_LOGIC_OP_FUNC |
830 LOGIC_OP_FUNC(LOGICOP_COPY) |
831 ENABLE_STENCIL_TEST_MASK |
832 STENCIL_TEST_MASK(0xff) |
833 ENABLE_STENCIL_WRITE_MASK |
834 STENCIL_WRITE_MASK(0xff));
835
836
837 i915->state.Ctx[I915_CTXREG_IAB] = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
838 IAB_MODIFY_ENABLE |
839 IAB_MODIFY_FUNC |
840 IAB_MODIFY_SRC_FACTOR |
841 IAB_MODIFY_DST_FACTOR);
842
843 i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
844 i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
845
846 }
847
848 {
849 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
850 i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
851 }
852
853
854 {
855 I915_STATECHANGE(i915, I915_UPLOAD_FOG);
856 i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
857 i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
858 FMC1_FOGFUNC_VERTEX |
859 FMC1_FOGINDEX_MODIFY_ENABLE |
860 FMC1_FOGINDEX_W |
861 FMC1_C1_C2_MODIFY_ENABLE |
862 FMC1_DENSITY_MODIFY_ENABLE);
863 i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
864 }
865
866
867 {
868 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
869 /* color buffer offset/stride */
870 i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
871 i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
872 (BUF_3D_ID_COLOR_BACK |
873 BUF_3D_PITCH(screen->front.pitch) | /* pitch in bytes */
874 BUF_3D_USE_FENCE);
875 /*i915->state.Buffer[I915_DESTREG_CBUFADDR2] is the offset */
876
877
878 /* depth/Z buffer offset/stride */
879 i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
880 i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
881 (BUF_3D_ID_DEPTH |
882 BUF_3D_PITCH(screen->depth.pitch) | /* pitch in bytes */
883 BUF_3D_USE_FENCE);
884 i915->state.Buffer[I915_DESTREG_DBUFADDR2] = screen->depth.offset;
885
886
887 i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
888
889 /* color/depth pixel format */
890 switch (screen->fbFormat) {
891 case DV_PF_555:
892 case DV_PF_565:
893 i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
894 DSTORG_VERT_BIAS(0x8) | /* .5 */
895 LOD_PRECLAMP_OGL |
896 TEX_DEFAULT_COLOR_OGL |
897 DITHER_FULL_ALWAYS |
898 screen->fbFormat |
899 DEPTH_FRMT_16_FIXED);
900 break;
901 case DV_PF_8888:
902 i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
903 DSTORG_VERT_BIAS(0x8) | /* .5 */
904 LOD_PRECLAMP_OGL |
905 TEX_DEFAULT_COLOR_OGL |
906 screen->fbFormat |
907 DEPTH_FRMT_24_FIXED_8_OTHER);
908 break;
909 }
910
911 /* scissor */
912 i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
913 DISABLE_SCISSOR_RECT);
914 i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
915 i915->state.Buffer[I915_DESTREG_SR1] = 0;
916 i915->state.Buffer[I915_DESTREG_SR2] = 0;
917 }
918
919
920 /* These will be emitted every at the head of every buffer, unless
921 * we get hardware contexts working.
922 */
923 i915->state.active = (I915_UPLOAD_PROGRAM |
924 I915_UPLOAD_STIPPLE |
925 I915_UPLOAD_CTX |
926 I915_UPLOAD_BUFFERS |
927 I915_UPLOAD_INVARIENT);
928 }
929
930 void i915InitStateFunctions( struct dd_function_table *functions )
931 {
932 functions->AlphaFunc = i915AlphaFunc;
933 functions->BlendColor = i915BlendColor;
934 functions->BlendEquationSeparate = i915BlendEquationSeparate;
935 functions->BlendFuncSeparate = i915BlendFuncSeparate;
936 functions->ColorMask = i915ColorMask;
937 functions->CullFace = i915CullFaceFrontFace;
938 functions->DepthFunc = i915DepthFunc;
939 functions->DepthMask = i915DepthMask;
940 functions->Enable = i915Enable;
941 functions->Fogfv = i915Fogfv;
942 functions->FrontFace = i915CullFaceFrontFace;
943 functions->Hint = i915Hint;
944 functions->LightModelfv = i915LightModelfv;
945 functions->LineWidth = i915LineWidth;
946 functions->LogicOpcode = i915LogicOp;
947 functions->PointSize = i915PointSize;
948 functions->PolygonStipple = i915PolygonStipple;
949 functions->Scissor = i915Scissor;
950 functions->ShadeModel = i915ShadeModel;
951 functions->StencilFuncSeparate = i915StencilFuncSeparate;
952 functions->StencilMaskSeparate = i915StencilMaskSeparate;
953 functions->StencilOpSeparate = i915StencilOpSeparate;
954 }
955
956
957 void i915InitState( i915ContextPtr i915 )
958 {
959 GLcontext *ctx = &i915->intel.ctx;
960
961 i915_init_packets( i915 );
962
963 intelInitState( ctx );
964
965 memcpy( &i915->initial, &i915->state, sizeof(i915->state) );
966 i915->current = &i915->state;
967 }
968
969
970
971
972
973
974