src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "drivers/common/driverfuncs.h"
  40
  41 #include "intel_fbo.h"
  42 #include "intel_screen.h"
  43 #include "intel_batchbuffer.h"
  44
  45 #include "i915_context.h"
  46 #include "i915_reg.h"
  47
  48 #define FILE_DEBUG_FLAG DEBUG_STATE
  49
  50 static void
  51 i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  52                         GLuint mask)
  53 {
  54    struct i915_context *i915 = I915_CONTEXT(ctx);
  55    int test = intel_translate_compare_func(func);
  56
  57    mask = mask & 0xff;
  58
  59    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  60        _mesa_lookup_enum_by_nr(func), ref, mask);
  61
  62
  63    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  64    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  65    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  66                                            STENCIL_TEST_MASK(mask));
  67
  68    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
  69                                           S5_STENCIL_TEST_FUNC_MASK);
  70
  71    i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
  72                                          (test <<
  73                                           S5_STENCIL_TEST_FUNC_SHIFT));
  74 }
  75
  76 static void
  77 i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  78 {
  79    struct i915_context *i915 = I915_CONTEXT(ctx);
  80
  81    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  82
  83    mask = mask & 0xff;
  84
  85    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  86    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  87    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  88                                            STENCIL_WRITE_MASK(mask));
  89 }
  90
  91
  92 static void
  93 i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  94                       GLenum zpass)
  95 {
  96    struct i915_context *i915 = I915_CONTEXT(ctx);
  97    int fop = intel_translate_stencil_op(fail);
  98    int dfop = intel_translate_stencil_op(zfail);
  99    int dpop = intel_translate_stencil_op(zpass);
 100
 101
 102    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
 103        _mesa_lookup_enum_by_nr(fail),
 104        _mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
 105
 106    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 107
 108    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
 109                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 110                                           S5_STENCIL_PASS_Z_PASS_MASK);
 111
 112    i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
 113                                          (dfop <<
 114                                           S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 115                                          (dpop <<
 116                                           S5_STENCIL_PASS_Z_PASS_SHIFT));
 117 }
 118
 119 static void
 120 i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 121 {
 122    struct i915_context *i915 = I915_CONTEXT(ctx);
 123    int test = intel_translate_compare_func(func);
 124    GLubyte refByte;
 125
 126    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 127
 128    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 129    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 130                                           S6_ALPHA_REF_MASK);
 131    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 132                                          (((GLuint) refByte) <<
 133                                           S6_ALPHA_REF_SHIFT));
 134 }
 135
 136 /* This function makes sure that the proper enables are
 137  * set for LogicOp, Independant Alpha Blend, and Blending.
 138  * It needs to be called from numerous places where we
 139  * could change the LogicOp or Independant Alpha Blend without subsequent
 140  * calls to glEnable.
 141  */
 142 static void
 143 i915EvalLogicOpBlendState(GLcontext * ctx)
 144 {
 145    struct i915_context *i915 = I915_CONTEXT(ctx);
 146
 147    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 148
 149    if (RGBA_LOGICOP_ENABLED(ctx)) {
 150       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 151       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 152    }
 153    else {
 154       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 155
 156       if (ctx->Color.BlendEnabled) {
 157          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 158       }
 159       else {
 160          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 161       }
 162    }
 163 }
 164
 165 static void
 166 i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 167 {
 168    struct i915_context *i915 = I915_CONTEXT(ctx);
 169    GLubyte r, g, b, a;
 170
 171    DBG("%s\n", __FUNCTION__);
 172
 173    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 174    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 175    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 176    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 177
 178    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 179    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 180       (a << 24) | (r << 16) | (g << 8) | b;
 181 }
 182
 183
 184 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 185 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 186 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 187 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 188
 189
 190
 191 static GLuint
 192 translate_blend_equation(GLenum mode)
 193 {
 194    switch (mode) {
 195    case GL_FUNC_ADD:
 196       return BLENDFUNC_ADD;
 197    case GL_MIN:
 198       return BLENDFUNC_MIN;
 199    case GL_MAX:
 200       return BLENDFUNC_MAX;
 201    case GL_FUNC_SUBTRACT:
 202       return BLENDFUNC_SUBTRACT;
 203    case GL_FUNC_REVERSE_SUBTRACT:
 204       return BLENDFUNC_REVERSE_SUBTRACT;
 205    default:
 206       return 0;
 207    }
 208 }
 209
 210 static void
 211 i915UpdateBlendState(GLcontext * ctx)
 212 {
 213    struct i915_context *i915 = I915_CONTEXT(ctx);
 214    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 215                  ~(IAB_SRC_FACTOR_MASK |
 216                    IAB_DST_FACTOR_MASK |
 217                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 218
 219    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 220                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 221                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 222
 223    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 224    GLuint eqA = ctx->Color.BlendEquationA;
 225    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 226    GLuint dstRGB = ctx->Color.BlendDstRGB;
 227    GLuint srcA = ctx->Color.BlendSrcA;
 228    GLuint dstA = ctx->Color.BlendDstA;
 229
 230    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 231       srcRGB = dstRGB = GL_ONE;
 232    }
 233
 234    if (eqA == GL_MIN || eqA == GL_MAX) {
 235       srcA = dstA = GL_ONE;
 236    }
 237
 238    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 239    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 240    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 241
 242    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 243    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 244    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 245
 246    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 247       iab |= IAB_ENABLE;
 248
 249    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 250        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 251       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 252       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 253       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 254    }
 255
 256    /* This will catch a logicop blend equation */
 257    i915EvalLogicOpBlendState(ctx);
 258 }
 259
 260
 261 static void
 262 i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
 263                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 264 {
 265    i915UpdateBlendState(ctx);
 266 }
 267
 268
 269 static void
 270 i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 271 {
 272    i915UpdateBlendState(ctx);
 273 }
 274
 275
 276 static void
 277 i915DepthFunc(GLcontext * ctx, GLenum func)
 278 {
 279    struct i915_context *i915 = I915_CONTEXT(ctx);
 280    int test = intel_translate_compare_func(func);
 281
 282    DBG("%s\n", __FUNCTION__);
 283
 284    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 285    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 286    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 287 }
 288
 289 static void
 290 i915DepthMask(GLcontext * ctx, GLboolean flag)
 291 {
 292    struct i915_context *i915 = I915_CONTEXT(ctx);
 293
 294    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 295
 296    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 297
 298    if (flag && ctx->Depth.Test)
 299       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 300    else
 301       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 302 }
 303
 304 /* =============================================================
 305  * Polygon stipple
 306  *
 307  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 308  * Fortunately stipple is usually a repeating pattern.
 309  */
 310 static void
 311 i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 312 {
 313    struct i915_context *i915 = I915_CONTEXT(ctx);
 314    const GLubyte *m;
 315    GLubyte p[4];
 316    int i, j, k;
 317    int active = (ctx->Polygon.StippleFlag &&
 318                  i915->intel.reduced_primitive == GL_TRIANGLES);
 319    GLuint newMask;
 320
 321    if (active) {
 322       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 323       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 324    }
 325
 326    /* Use the already unpacked stipple data from the context rather than the
 327     * uninterpreted mask passed in.
 328     */
 329    mask = (const GLubyte *)ctx->PolygonStipple;
 330    m = mask;
 331
 332    p[0] = mask[12] & 0xf;
 333    p[0] |= p[0] << 4;
 334    p[1] = mask[8] & 0xf;
 335    p[1] |= p[1] << 4;
 336    p[2] = mask[4] & 0xf;
 337    p[2] |= p[2] << 4;
 338    p[3] = mask[0] & 0xf;
 339    p[3] |= p[3] << 4;
 340
 341    for (k = 0; k < 8; k++)
 342       for (j = 3; j >= 0; j--)
 343          for (i = 0; i < 4; i++, m++)
 344             if (*m != p[j]) {
 345                i915->intel.hw_stipple = 0;
 346                return;
 347             }
 348
 349    newMask = (((p[0] & 0xf) << 0) |
 350               ((p[1] & 0xf) << 4) |
 351               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 352
 353
 354    if (newMask == 0xffff || newMask == 0x0) {
 355       /* this is needed to make conform pass */
 356       i915->intel.hw_stipple = 0;
 357       return;
 358    }
 359
 360    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 361    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 362    i915->intel.hw_stipple = 1;
 363
 364    if (active)
 365       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 366 }
 367
 368
 369 /* =============================================================
 370  * Hardware clipping
 371  */
 372 static void
 373 i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 374 {
 375    struct i915_context *i915 = I915_CONTEXT(ctx);
 376    int x1, y1, x2, y2;
 377
 378    if (!ctx->DrawBuffer)
 379       return;
 380
 381    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 382
 383    if (ctx->DrawBuffer->Name == 0) {
 384       x1 = x;
 385       y1 = ctx->DrawBuffer->Height - (y + h);
 386       x2 = x + w - 1;
 387       y2 = y1 + h - 1;
 388       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 389    }
 390    else {
 391       /* FBO - not inverted
 392        */
 393       x1 = x;
 394       y1 = y;
 395       x2 = x + w - 1;
 396       y2 = y + h - 1;
 397       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 398    }
 399
 400    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 401    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 402    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 403    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 404
 405    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 406
 407    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 408    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 409    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 410 }
 411
 412 static void
 413 i915LogicOp(GLcontext * ctx, GLenum opcode)
 414 {
 415    struct i915_context *i915 = I915_CONTEXT(ctx);
 416    int tmp = intel_translate_logic_op(opcode);
 417
 418    DBG("%s\n", __FUNCTION__);
 419
 420    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 421    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 422    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 423 }
 424
 425
 426
 427 static void
 428 i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 429 {
 430    struct i915_context *i915 = I915_CONTEXT(ctx);
 431    GLuint mode;
 432
 433    DBG("%s %d\n", __FUNCTION__,
 434        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 435
 436    if (!ctx->Polygon.CullFlag) {
 437       mode = S4_CULLMODE_NONE;
 438    }
 439    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 440       mode = S4_CULLMODE_CW;
 441
 442       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 443          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 444       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 445          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 446       if (ctx->Polygon.FrontFace != GL_CCW)
 447          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 448    }
 449    else {
 450       mode = S4_CULLMODE_BOTH;
 451    }
 452
 453    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 454    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 455    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 456 }
 457
 458 static void
 459 i915LineWidth(GLcontext * ctx, GLfloat widthf)
 460 {
 461    struct i915_context *i915 = I915_CONTEXT(ctx);
 462    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 463    int width;
 464
 465    DBG("%s\n", __FUNCTION__);
 466
 467    width = (int) (widthf * 2);
 468    CLAMP_SELF(width, 1, 0xf);
 469    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 470
 471    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 472       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 473       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 474    }
 475 }
 476
 477 static void
 478 i915PointSize(GLcontext * ctx, GLfloat size)
 479 {
 480    struct i915_context *i915 = I915_CONTEXT(ctx);
 481    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 482    GLint point_size = (int) size;
 483
 484    DBG("%s\n", __FUNCTION__);
 485
 486    CLAMP_SELF(point_size, 1, 255);
 487    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 488
 489    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 490       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 491       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 492    }
 493 }
 494
 495
 496 /* =============================================================
 497  * Color masks
 498  */
 499
 500 static void
 501 i915ColorMask(GLcontext * ctx,
 502               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 503 {
 504    struct i915_context *i915 = I915_CONTEXT(ctx);
 505    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 506
 507    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 508        a);
 509
 510    if (!r)
 511       tmp |= S5_WRITEDISABLE_RED;
 512    if (!g)
 513       tmp |= S5_WRITEDISABLE_GREEN;
 514    if (!b)
 515       tmp |= S5_WRITEDISABLE_BLUE;
 516    if (!a)
 517       tmp |= S5_WRITEDISABLE_ALPHA;
 518
 519    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 520       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 521       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 522    }
 523 }
 524
 525 static void
 526 update_specular(GLcontext * ctx)
 527 {
 528    /* A hack to trigger the rebuild of the fragment program.
 529     */
 530    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 531 }
 532
 533 static void
 534 i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 535 {
 536    DBG("%s\n", __FUNCTION__);
 537
 538    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 539       update_specular(ctx);
 540    }
 541 }
 542
 543 static void
 544 i915ShadeModel(GLcontext * ctx, GLenum mode)
 545 {
 546    struct i915_context *i915 = I915_CONTEXT(ctx);
 547    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 548
 549    if (mode == GL_SMOOTH) {
 550       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 551                                              S4_FLATSHADE_COLOR |
 552                                              S4_FLATSHADE_SPECULAR);
 553    }
 554    else {
 555       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 556                                             S4_FLATSHADE_COLOR |
 557                                             S4_FLATSHADE_SPECULAR);
 558    }
 559 }
 560
 561 /* =============================================================
 562  * Fog
 563  */
 564 void
 565 i915_update_fog(GLcontext * ctx)
 566 {
 567    struct i915_context *i915 = I915_CONTEXT(ctx);
 568    GLenum mode;
 569    GLboolean enabled;
 570    GLboolean try_pixel_fog;
 571
 572    if (ctx->FragmentProgram._Current) {
 573       /* Pull in static fog state from program */
 574       mode = ctx->FragmentProgram._Current->FogOption;
 575       enabled = (mode != GL_NONE);
 576       try_pixel_fog = 0;
 577    }
 578    else {
 579       enabled = ctx->Fog.Enabled;
 580       mode = ctx->Fog.Mode;
 581 #if 0
 582       /* XXX - DISABLED -- Need ortho fallback */
 583       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
 584                        && ctx->Hint.Fog == GL_NICEST);
 585 #else
 586       try_pixel_fog = 0;
 587 #endif
 588    }
 589
 590    if (!enabled) {
 591       i915->vertex_fog = I915_FOG_NONE;
 592    }
 593    else if (try_pixel_fog) {
 594       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 595       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 596       i915->vertex_fog = I915_FOG_PIXEL;
 597
 598       switch (mode) {
 599       case GL_LINEAR:
 600          if (ctx->Fog.End <= ctx->Fog.Start) {
 601             /* XXX - this won't work with fragment programs.  Need to
 602              * either fallback or append fog instructions to end of
 603              * program in the case of linear fog.
 604              */
 605             printf("vertex fog!\n");
 606             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 607             i915->vertex_fog = I915_FOG_VERTEX;
 608          }
 609          else {
 610             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 611             GLfloat c1 = ctx->Fog.End * c2;
 612
 613             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 614             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 615             i915->state.Fog[I915_FOGREG_MODE1] |=
 616                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 617
 618             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 619                i915->state.Fog[I915_FOGREG_MODE2]
 620                   = (GLuint) (c2 * FMC2_C2_ONE);
 621             }
 622             else {
 623                fi_type fi;
 624                fi.f = c2;
 625                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 626             }
 627          }
 628          break;
 629       case GL_EXP:
 630          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 631          break;
 632       case GL_EXP2:
 633          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 634          break;
 635       default:
 636          break;
 637       }
 638    }
 639    else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 640       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 641       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 642       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 643       i915->vertex_fog = I915_FOG_VERTEX;
 644    }
 645
 646    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 647    I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 648    if (enabled)
 649       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 650    else
 651       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 652
 653    /* Always enable pixel fog.  Vertex fog using fog coord will conflict
 654     * with fog code appended onto fragment program.
 655     */
 656     _tnl_allow_vertex_fog( ctx, 0 );
 657     _tnl_allow_pixel_fog( ctx, 1 );
 658 }
 659
 660 static void
 661 i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 662 {
 663    struct i915_context *i915 = I915_CONTEXT(ctx);
 664
 665    switch (pname) {
 666    case GL_FOG_COORDINATE_SOURCE_EXT:
 667    case GL_FOG_MODE:
 668    case GL_FOG_START:
 669    case GL_FOG_END:
 670       break;
 671
 672    case GL_FOG_DENSITY:
 673       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 674
 675       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 676          i915->state.Fog[I915_FOGREG_MODE3] =
 677             (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
 678       }
 679       else {
 680          fi_type fi;
 681          fi.f = ctx->Fog.Density;
 682          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 683       }
 684       break;
 685
 686    case GL_FOG_COLOR:
 687       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 688       i915->state.Fog[I915_FOGREG_COLOR] =
 689          (_3DSTATE_FOG_COLOR_CMD |
 690           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 691           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 692           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 693       break;
 694
 695    default:
 696       break;
 697    }
 698 }
 699
 700 static void
 701 i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 702 {
 703    switch (target) {
 704    case GL_FOG_HINT:
 705       break;
 706    default:
 707       break;
 708    }
 709 }
 710
 711 /* =============================================================
 712  */
 713
 714 static void
 715 i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 716 {
 717    struct i915_context *i915 = I915_CONTEXT(ctx);
 718
 719    switch (cap) {
 720    case GL_TEXTURE_2D:
 721       break;
 722
 723    case GL_LIGHTING:
 724    case GL_COLOR_SUM:
 725       update_specular(ctx);
 726       break;
 727
 728    case GL_ALPHA_TEST:
 729       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 730       if (state)
 731          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 732       else
 733          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 734       break;
 735
 736    case GL_BLEND:
 737       i915EvalLogicOpBlendState(ctx);
 738       break;
 739
 740    case GL_COLOR_LOGIC_OP:
 741       i915EvalLogicOpBlendState(ctx);
 742
 743       /* Logicop doesn't seem to work at 16bpp:
 744        */
 745       if (ctx->Visual.rgbBits == 16)
 746          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 747       break;
 748
 749    case GL_FRAGMENT_PROGRAM_ARB:
 750       break;
 751
 752    case GL_DITHER:
 753       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 754       if (state)
 755          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 756       else
 757          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 758       break;
 759
 760    case GL_DEPTH_TEST:
 761       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 762       if (state)
 763          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 764       else
 765          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 766
 767       i915DepthMask(ctx, ctx->Depth.Mask);
 768       break;
 769
 770    case GL_SCISSOR_TEST:
 771       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 772       if (state)
 773          i915->state.Buffer[I915_DESTREG_SENABLE] =
 774             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 775       else
 776          i915->state.Buffer[I915_DESTREG_SENABLE] =
 777             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 778       break;
 779
 780    case GL_LINE_SMOOTH:
 781       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 782       if (state)
 783          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 784       else
 785          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 786       break;
 787
 788    case GL_FOG:
 789       break;
 790
 791    case GL_CULL_FACE:
 792       i915CullFaceFrontFace(ctx, 0);
 793       break;
 794
 795    case GL_STENCIL_TEST:
 796       {
 797          GLboolean hw_stencil = GL_FALSE;
 798          if (ctx->DrawBuffer) {
 799             struct intel_renderbuffer *irbStencil
 800                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 801             hw_stencil = (irbStencil && irbStencil->region);
 802          }
 803          if (hw_stencil) {
 804             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 805             if (state)
 806                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 807                                                      S5_STENCIL_WRITE_ENABLE);
 808             else
 809                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 810                                                       S5_STENCIL_WRITE_ENABLE);
 811          }
 812          else {
 813             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 814          }
 815       }
 816       break;
 817
 818    case GL_POLYGON_STIPPLE:
 819       /* The stipple command worked on my 855GM box, but not my 845G.
 820        * I'll do more testing later to find out exactly which hardware
 821        * supports it.  Disabled for now.
 822        */
 823       if (i915->intel.hw_stipple &&
 824           i915->intel.reduced_primitive == GL_TRIANGLES) {
 825          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 826          if (state)
 827             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 828          else
 829             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 830       }
 831       break;
 832
 833    case GL_POLYGON_SMOOTH:
 834       break;
 835
 836    case GL_POINT_SMOOTH:
 837       break;
 838
 839    default:
 840       ;
 841    }
 842 }
 843
 844
 845 static void
 846 i915_init_packets(struct i915_context *i915)
 847 {
 848    /* Zero all state */
 849    memset(&i915->state, 0, sizeof(i915->state));
 850
 851
 852    {
 853       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 854       /* Probably don't want to upload all this stuff every time one
 855        * piece changes.
 856        */
 857       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 858                                          I1_LOAD_S(2) |
 859                                          I1_LOAD_S(4) |
 860                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 861       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 862       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 863       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 864
 865       if (i915->intel.ctx.Visual.rgbBits == 16)
 866          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 867
 868
 869       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 870                                            (2 << S6_TRISTRIP_PV_SHIFT));
 871
 872       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 873                                              ENABLE_LOGIC_OP_FUNC |
 874                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 875                                              ENABLE_STENCIL_TEST_MASK |
 876                                              STENCIL_TEST_MASK(0xff) |
 877                                              ENABLE_STENCIL_WRITE_MASK |
 878                                              STENCIL_WRITE_MASK(0xff));
 879
 880       i915->state.Ctx[I915_CTXREG_IAB] =
 881          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 882           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 883
 884       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
 885          _3DSTATE_CONST_BLEND_COLOR_CMD;
 886       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
 887
 888    }
 889
 890    {
 891       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 892       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 893    }
 894
 895
 896    {
 897       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 898       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
 899       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
 900                                             FMC1_FOGFUNC_VERTEX |
 901                                             FMC1_FOGINDEX_MODIFY_ENABLE |
 902                                             FMC1_FOGINDEX_W |
 903                                             FMC1_C1_C2_MODIFY_ENABLE |
 904                                             FMC1_DENSITY_MODIFY_ENABLE);
 905       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
 906    }
 907
 908    {
 909       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 910
 911       /* scissor */
 912       i915->state.Buffer[I915_DESTREG_SENABLE] =
 913          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 914       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 915       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 916       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 917    }
 918
 919
 920 #if 0
 921    {
 922       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 923       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 924       i915->state.Default[I915_DEFREG_C1] = 0;
 925       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 926       i915->state.Default[I915_DEFREG_S1] = 0;
 927       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 928       i915->state.Default[I915_DEFREG_Z1] = 0;
 929    }
 930 #endif
 931
 932
 933    /* These will be emitted every at the head of every buffer, unless
 934     * we get hardware contexts working.
 935     */
 936    i915->state.active = (I915_UPLOAD_PROGRAM |
 937                          I915_UPLOAD_STIPPLE |
 938                          I915_UPLOAD_CTX |
 939                          I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
 940 }
 941
 942 void
 943 i915InitStateFunctions(struct dd_function_table *functions)
 944 {
 945    functions->AlphaFunc = i915AlphaFunc;
 946    functions->BlendColor = i915BlendColor;
 947    functions->BlendEquationSeparate = i915BlendEquationSeparate;
 948    functions->BlendFuncSeparate = i915BlendFuncSeparate;
 949    functions->ColorMask = i915ColorMask;
 950    functions->CullFace = i915CullFaceFrontFace;
 951    functions->DepthFunc = i915DepthFunc;
 952    functions->DepthMask = i915DepthMask;
 953    functions->Enable = i915Enable;
 954    functions->Fogfv = i915Fogfv;
 955    functions->FrontFace = i915CullFaceFrontFace;
 956    functions->Hint = i915Hint;
 957    functions->LightModelfv = i915LightModelfv;
 958    functions->LineWidth = i915LineWidth;
 959    functions->LogicOpcode = i915LogicOp;
 960    functions->PointSize = i915PointSize;
 961    functions->PolygonStipple = i915PolygonStipple;
 962    functions->Scissor = i915Scissor;
 963    functions->ShadeModel = i915ShadeModel;
 964    functions->StencilFuncSeparate = i915StencilFuncSeparate;
 965    functions->StencilMaskSeparate = i915StencilMaskSeparate;
 966    functions->StencilOpSeparate = i915StencilOpSeparate;
 967 }
 968
 969
 970 void
 971 i915InitState(struct i915_context *i915)
 972 {
 973    GLcontext *ctx = &i915->intel.ctx;
 974
 975    i915_init_packets(i915);
 976
 977    _mesa_init_driver_state(ctx);
 978
 979    memcpy(&i915->initial, &i915->state, sizeof(i915->state));
 980    i915->current = &i915->state;
 981 }