1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
34 #include "main/state.h"
36 #include "tnl/t_context.h"
40 #include "drivers/common/driverfuncs.h"
42 #include "intel_fbo.h"
43 #include "intel_screen.h"
44 #include "intel_batchbuffer.h"
45 #include "intel_buffers.h"
47 #include "i915_context.h"
50 #define FILE_DEBUG_FLAG DEBUG_STATE
53 i915_update_stencil(struct gl_context
* ctx
)
55 struct i915_context
*i915
= I915_CONTEXT(ctx
);
56 GLuint front_ref
, front_writemask
, front_mask
;
57 GLenum front_func
, front_fail
, front_pass_z_fail
, front_pass_z_pass
;
58 GLuint back_ref
, back_writemask
, back_mask
;
59 GLenum back_func
, back_fail
, back_pass_z_fail
, back_pass_z_pass
;
62 /* The 915 considers CW to be "front" for two-sided stencil, so choose
65 /* _NEW_POLYGON | _NEW_STENCIL */
66 if (ctx
->Polygon
.FrontFace
== GL_CW
) {
67 front_ref
= ctx
->Stencil
.Ref
[0];
68 front_mask
= ctx
->Stencil
.ValueMask
[0];
69 front_writemask
= ctx
->Stencil
.WriteMask
[0];
70 front_func
= ctx
->Stencil
.Function
[0];
71 front_fail
= ctx
->Stencil
.FailFunc
[0];
72 front_pass_z_fail
= ctx
->Stencil
.ZFailFunc
[0];
73 front_pass_z_pass
= ctx
->Stencil
.ZPassFunc
[0];
74 back_ref
= ctx
->Stencil
.Ref
[ctx
->Stencil
._BackFace
];
75 back_mask
= ctx
->Stencil
.ValueMask
[ctx
->Stencil
._BackFace
];
76 back_writemask
= ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
];
77 back_func
= ctx
->Stencil
.Function
[ctx
->Stencil
._BackFace
];
78 back_fail
= ctx
->Stencil
.FailFunc
[ctx
->Stencil
._BackFace
];
79 back_pass_z_fail
= ctx
->Stencil
.ZFailFunc
[ctx
->Stencil
._BackFace
];
80 back_pass_z_pass
= ctx
->Stencil
.ZPassFunc
[ctx
->Stencil
._BackFace
];
82 front_ref
= ctx
->Stencil
.Ref
[ctx
->Stencil
._BackFace
];
83 front_mask
= ctx
->Stencil
.ValueMask
[ctx
->Stencil
._BackFace
];
84 front_writemask
= ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
];
85 front_func
= ctx
->Stencil
.Function
[ctx
->Stencil
._BackFace
];
86 front_fail
= ctx
->Stencil
.FailFunc
[ctx
->Stencil
._BackFace
];
87 front_pass_z_fail
= ctx
->Stencil
.ZFailFunc
[ctx
->Stencil
._BackFace
];
88 front_pass_z_pass
= ctx
->Stencil
.ZPassFunc
[ctx
->Stencil
._BackFace
];
89 back_ref
= ctx
->Stencil
.Ref
[0];
90 back_mask
= ctx
->Stencil
.ValueMask
[0];
91 back_writemask
= ctx
->Stencil
.WriteMask
[0];
92 back_func
= ctx
->Stencil
.Function
[0];
93 back_fail
= ctx
->Stencil
.FailFunc
[0];
94 back_pass_z_fail
= ctx
->Stencil
.ZFailFunc
[0];
95 back_pass_z_pass
= ctx
->Stencil
.ZPassFunc
[0];
97 #define set_ctx_bits(reg, mask, set) do{ \
98 GLuint dw = i915->state.Ctx[reg]; \
101 dirty |= dw != i915->state.Ctx[reg]; \
102 i915->state.Ctx[reg] = dw; \
105 /* Set front state. */
106 set_ctx_bits(I915_CTXREG_STATE4
,
107 MODE4_ENABLE_STENCIL_TEST_MASK
|
108 MODE4_ENABLE_STENCIL_WRITE_MASK
,
109 ENABLE_STENCIL_TEST_MASK
|
110 ENABLE_STENCIL_WRITE_MASK
|
111 STENCIL_TEST_MASK(front_mask
) |
112 STENCIL_WRITE_MASK(front_writemask
));
114 set_ctx_bits(I915_CTXREG_LIS5
,
115 S5_STENCIL_REF_MASK
|
116 S5_STENCIL_TEST_FUNC_MASK
|
117 S5_STENCIL_FAIL_MASK
|
118 S5_STENCIL_PASS_Z_FAIL_MASK
|
119 S5_STENCIL_PASS_Z_PASS_MASK
,
120 (front_ref
<< S5_STENCIL_REF_SHIFT
) |
121 (intel_translate_compare_func(front_func
) << S5_STENCIL_TEST_FUNC_SHIFT
) |
122 (intel_translate_stencil_op(front_fail
) << S5_STENCIL_FAIL_SHIFT
) |
123 (intel_translate_stencil_op(front_pass_z_fail
) <<
124 S5_STENCIL_PASS_Z_FAIL_SHIFT
) |
125 (intel_translate_stencil_op(front_pass_z_pass
) <<
126 S5_STENCIL_PASS_Z_PASS_SHIFT
));
128 /* Set back state if different from front. */
129 if (ctx
->Stencil
._TestTwoSide
) {
130 set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS
,
131 BFO_STENCIL_REF_MASK
|
132 BFO_STENCIL_TEST_MASK
|
133 BFO_STENCIL_FAIL_MASK
|
134 BFO_STENCIL_PASS_Z_FAIL_MASK
|
135 BFO_STENCIL_PASS_Z_PASS_MASK
,
136 BFO_STENCIL_TWO_SIDE
|
137 (back_ref
<< BFO_STENCIL_REF_SHIFT
) |
138 (intel_translate_compare_func(back_func
) << BFO_STENCIL_TEST_SHIFT
) |
139 (intel_translate_stencil_op(back_fail
) << BFO_STENCIL_FAIL_SHIFT
) |
140 (intel_translate_stencil_op(back_pass_z_fail
) <<
141 BFO_STENCIL_PASS_Z_FAIL_SHIFT
) |
142 (intel_translate_stencil_op(back_pass_z_pass
) <<
143 BFO_STENCIL_PASS_Z_PASS_SHIFT
));
145 set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS
,
146 BFM_STENCIL_TEST_MASK_MASK
|
147 BFM_STENCIL_WRITE_MASK_MASK
,
148 BFM_STENCIL_TEST_MASK(back_mask
) |
149 BFM_STENCIL_WRITE_MASK(back_writemask
));
151 set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS
,
152 BFO_STENCIL_TWO_SIDE
, 0);
158 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
162 i915StencilFuncSeparate(struct gl_context
* ctx
, GLenum face
, GLenum func
, GLint ref
,
168 i915StencilMaskSeparate(struct gl_context
* ctx
, GLenum face
, GLuint mask
)
173 i915StencilOpSeparate(struct gl_context
* ctx
, GLenum face
, GLenum fail
, GLenum zfail
,
179 i915AlphaFunc(struct gl_context
* ctx
, GLenum func
, GLfloat ref
)
181 struct i915_context
*i915
= I915_CONTEXT(ctx
);
182 int test
= intel_translate_compare_func(func
);
186 UNCLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
188 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
189 dw
&= ~(S6_ALPHA_TEST_FUNC_MASK
| S6_ALPHA_REF_MASK
);
190 dw
|= ((test
<< S6_ALPHA_TEST_FUNC_SHIFT
) |
191 (((GLuint
) refByte
) << S6_ALPHA_REF_SHIFT
));
192 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
193 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw
;
194 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
198 /* This function makes sure that the proper enables are
199 * set for LogicOp, Independant Alpha Blend, and Blending.
200 * It needs to be called from numerous places where we
201 * could change the LogicOp or Independant Alpha Blend without subsequent
205 i915EvalLogicOpBlendState(struct gl_context
* ctx
)
207 struct i915_context
*i915
= I915_CONTEXT(ctx
);
210 dw0
= i915
->state
.Ctx
[I915_CTXREG_LIS5
];
211 dw1
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
213 if (_mesa_rgba_logicop_enabled(ctx
)) {
214 dw0
|= S5_LOGICOP_ENABLE
;
215 dw1
&= ~S6_CBUF_BLEND_ENABLE
;
218 dw0
&= ~S5_LOGICOP_ENABLE
;
220 if (ctx
->Color
.BlendEnabled
) {
221 dw1
|= S6_CBUF_BLEND_ENABLE
;
224 dw1
&= ~S6_CBUF_BLEND_ENABLE
;
227 if (dw0
!= i915
->state
.Ctx
[I915_CTXREG_LIS5
] ||
228 dw1
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
229 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = dw0
;
230 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw1
;
232 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
237 i915BlendColor(struct gl_context
* ctx
, const GLfloat color
[4])
239 struct i915_context
*i915
= I915_CONTEXT(ctx
);
243 DBG("%s\n", __FUNCTION__
);
245 UNCLAMPED_FLOAT_TO_UBYTE(r
, color
[RCOMP
]);
246 UNCLAMPED_FLOAT_TO_UBYTE(g
, color
[GCOMP
]);
247 UNCLAMPED_FLOAT_TO_UBYTE(b
, color
[BCOMP
]);
248 UNCLAMPED_FLOAT_TO_UBYTE(a
, color
[ACOMP
]);
250 dw
= (a
<< 24) | (r
<< 16) | (g
<< 8) | b
;
251 if (dw
!= i915
->state
.Blend
[I915_BLENDREG_BLENDCOLOR1
]) {
252 i915
->state
.Blend
[I915_BLENDREG_BLENDCOLOR1
] = dw
;
253 I915_STATECHANGE(i915
, I915_UPLOAD_BLEND
);
258 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
259 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
260 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
261 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
266 translate_blend_equation(GLenum mode
)
270 return BLENDFUNC_ADD
;
272 return BLENDFUNC_MIN
;
274 return BLENDFUNC_MAX
;
275 case GL_FUNC_SUBTRACT
:
276 return BLENDFUNC_SUBTRACT
;
277 case GL_FUNC_REVERSE_SUBTRACT
:
278 return BLENDFUNC_REVERSE_SUBTRACT
;
285 i915UpdateBlendState(struct gl_context
* ctx
)
287 struct i915_context
*i915
= I915_CONTEXT(ctx
);
288 GLuint iab
= (i915
->state
.Blend
[I915_BLENDREG_IAB
] &
289 ~(IAB_SRC_FACTOR_MASK
|
290 IAB_DST_FACTOR_MASK
|
291 (BLENDFUNC_MASK
<< IAB_FUNC_SHIFT
) | IAB_ENABLE
));
293 GLuint lis6
= (i915
->state
.Ctx
[I915_CTXREG_LIS6
] &
294 ~(S6_CBUF_SRC_BLEND_FACT_MASK
|
295 S6_CBUF_DST_BLEND_FACT_MASK
| S6_CBUF_BLEND_FUNC_MASK
));
297 GLuint eqRGB
= ctx
->Color
.Blend
[0].EquationRGB
;
298 GLuint eqA
= ctx
->Color
.Blend
[0].EquationA
;
299 GLuint srcRGB
= ctx
->Color
.Blend
[0].SrcRGB
;
300 GLuint dstRGB
= ctx
->Color
.Blend
[0].DstRGB
;
301 GLuint srcA
= ctx
->Color
.Blend
[0].SrcA
;
302 GLuint dstA
= ctx
->Color
.Blend
[0].DstA
;
304 if (eqRGB
== GL_MIN
|| eqRGB
== GL_MAX
) {
305 srcRGB
= dstRGB
= GL_ONE
;
308 if (eqA
== GL_MIN
|| eqA
== GL_MAX
) {
309 srcA
= dstA
= GL_ONE
;
312 lis6
|= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB
));
313 lis6
|= DST_BLND_FACT(intel_translate_blend_factor(dstRGB
));
314 lis6
|= translate_blend_equation(eqRGB
) << S6_CBUF_BLEND_FUNC_SHIFT
;
316 iab
|= SRC_ABLND_FACT(intel_translate_blend_factor(srcA
));
317 iab
|= DST_ABLND_FACT(intel_translate_blend_factor(dstA
));
318 iab
|= translate_blend_equation(eqA
) << IAB_FUNC_SHIFT
;
320 if (srcA
!= srcRGB
|| dstA
!= dstRGB
|| eqA
!= eqRGB
)
323 if (iab
!= i915
->state
.Blend
[I915_BLENDREG_IAB
]) {
324 i915
->state
.Blend
[I915_BLENDREG_IAB
] = iab
;
325 I915_STATECHANGE(i915
, I915_UPLOAD_BLEND
);
327 if (lis6
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
328 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = lis6
;
329 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
332 /* This will catch a logicop blend equation */
333 i915EvalLogicOpBlendState(ctx
);
338 i915BlendFuncSeparate(struct gl_context
* ctx
, GLenum srcRGB
,
339 GLenum dstRGB
, GLenum srcA
, GLenum dstA
)
341 i915UpdateBlendState(ctx
);
346 i915BlendEquationSeparate(struct gl_context
* ctx
, GLenum eqRGB
, GLenum eqA
)
348 i915UpdateBlendState(ctx
);
353 i915DepthFunc(struct gl_context
* ctx
, GLenum func
)
355 struct i915_context
*i915
= I915_CONTEXT(ctx
);
356 int test
= intel_translate_compare_func(func
);
359 DBG("%s\n", __FUNCTION__
);
361 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
362 dw
&= ~S6_DEPTH_TEST_FUNC_MASK
;
363 dw
|= test
<< S6_DEPTH_TEST_FUNC_SHIFT
;
364 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
365 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
366 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw
;
371 i915DepthMask(struct gl_context
* ctx
, GLboolean flag
)
373 struct i915_context
*i915
= I915_CONTEXT(ctx
);
376 DBG("%s flag (%d)\n", __FUNCTION__
, flag
);
378 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
379 if (flag
&& ctx
->Depth
.Test
)
380 dw
|= S6_DEPTH_WRITE_ENABLE
;
382 dw
&= ~S6_DEPTH_WRITE_ENABLE
;
383 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
384 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
385 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw
;
392 * Update the viewport transformation matrix. Depends on:
393 * - viewport pos/size
395 * - window pos/size or FBO size
398 intelCalcViewport(struct gl_context
* ctx
)
400 struct intel_context
*intel
= intel_context(ctx
);
401 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
402 const GLfloat depthScale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
403 GLfloat
*m
= intel
->ViewportMatrix
.m
;
404 GLfloat yScale
, yBias
;
406 if (ctx
->DrawBuffer
->Name
) {
407 /* User created FBO */
413 /* window buffer, y=0=top */
415 yBias
= ctx
->DrawBuffer
->Height
;
418 m
[MAT_SX
] = v
[MAT_SX
];
419 m
[MAT_TX
] = v
[MAT_TX
];
421 m
[MAT_SY
] = v
[MAT_SY
] * yScale
;
422 m
[MAT_TY
] = v
[MAT_TY
] * yScale
+ yBias
;
424 m
[MAT_SZ
] = v
[MAT_SZ
] * depthScale
;
425 m
[MAT_TZ
] = v
[MAT_TZ
] * depthScale
;
429 /** Called from ctx->Driver.Viewport() */
431 i915Viewport(struct gl_context
* ctx
,
432 GLint x
, GLint y
, GLsizei width
, GLsizei height
)
434 intelCalcViewport(ctx
);
438 /** Called from ctx->Driver.DepthRange() */
440 i915DepthRange(struct gl_context
* ctx
, GLclampd nearval
, GLclampd farval
)
442 intelCalcViewport(ctx
);
446 /* =============================================================
449 * The i915 supports a 4x4 stipple natively, GL wants 32x32.
450 * Fortunately stipple is usually a repeating pattern.
453 i915PolygonStipple(struct gl_context
* ctx
, const GLubyte
* mask
)
455 struct i915_context
*i915
= I915_CONTEXT(ctx
);
459 int active
= (ctx
->Polygon
.StippleFlag
&&
460 i915
->intel
.reduced_primitive
== GL_TRIANGLES
);
464 I915_STATECHANGE(i915
, I915_UPLOAD_STIPPLE
);
465 i915
->state
.Stipple
[I915_STPREG_ST1
] &= ~ST1_ENABLE
;
468 /* Use the already unpacked stipple data from the context rather than the
469 * uninterpreted mask passed in.
471 mask
= (const GLubyte
*)ctx
->PolygonStipple
;
474 p
[0] = mask
[12] & 0xf;
476 p
[1] = mask
[8] & 0xf;
478 p
[2] = mask
[4] & 0xf;
480 p
[3] = mask
[0] & 0xf;
483 for (k
= 0; k
< 8; k
++)
484 for (j
= 3; j
>= 0; j
--)
485 for (i
= 0; i
< 4; i
++, m
++)
487 i915
->intel
.hw_stipple
= 0;
491 newMask
= (((p
[0] & 0xf) << 0) |
492 ((p
[1] & 0xf) << 4) |
493 ((p
[2] & 0xf) << 8) | ((p
[3] & 0xf) << 12));
496 if (newMask
== 0xffff || newMask
== 0x0) {
497 /* this is needed to make conform pass */
498 i915
->intel
.hw_stipple
= 0;
502 i915
->state
.Stipple
[I915_STPREG_ST1
] &= ~0xffff;
503 i915
->state
.Stipple
[I915_STPREG_ST1
] |= newMask
;
504 i915
->intel
.hw_stipple
= 1;
507 i915
->state
.Stipple
[I915_STPREG_ST1
] |= ST1_ENABLE
;
511 /* =============================================================
515 i915Scissor(struct gl_context
* ctx
, GLint x
, GLint y
, GLsizei w
, GLsizei h
)
517 struct i915_context
*i915
= I915_CONTEXT(ctx
);
520 if (!ctx
->DrawBuffer
)
523 DBG("%s %d,%d %dx%d\n", __FUNCTION__
, x
, y
, w
, h
);
525 if (ctx
->DrawBuffer
->Name
== 0) {
527 y1
= ctx
->DrawBuffer
->Height
- (y
+ h
);
530 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
533 /* FBO - not inverted
539 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
542 x1
= CLAMP(x1
, 0, ctx
->DrawBuffer
->Width
- 1);
543 y1
= CLAMP(y1
, 0, ctx
->DrawBuffer
->Height
- 1);
544 x2
= CLAMP(x2
, 0, ctx
->DrawBuffer
->Width
- 1);
545 y2
= CLAMP(y2
, 0, ctx
->DrawBuffer
->Height
- 1);
547 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__
, x1
, x2
, y1
, y2
);
549 I915_STATECHANGE(i915
, I915_UPLOAD_BUFFERS
);
550 i915
->state
.Buffer
[I915_DESTREG_SR1
] = (y1
<< 16) | (x1
& 0xffff);
551 i915
->state
.Buffer
[I915_DESTREG_SR2
] = (y2
<< 16) | (x2
& 0xffff);
555 i915LogicOp(struct gl_context
* ctx
, GLenum opcode
)
557 struct i915_context
*i915
= I915_CONTEXT(ctx
);
558 int tmp
= intel_translate_logic_op(opcode
);
560 DBG("%s\n", __FUNCTION__
);
562 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
563 i915
->state
.Ctx
[I915_CTXREG_STATE4
] &= ~LOGICOP_MASK
;
564 i915
->state
.Ctx
[I915_CTXREG_STATE4
] |= LOGIC_OP_FUNC(tmp
);
570 i915CullFaceFrontFace(struct gl_context
* ctx
, GLenum unused
)
572 struct i915_context
*i915
= I915_CONTEXT(ctx
);
575 DBG("%s %d\n", __FUNCTION__
,
576 ctx
->DrawBuffer
? ctx
->DrawBuffer
->Name
: 0);
578 if (!ctx
->Polygon
.CullFlag
) {
579 mode
= S4_CULLMODE_NONE
;
581 else if (ctx
->Polygon
.CullFaceMode
!= GL_FRONT_AND_BACK
) {
582 mode
= S4_CULLMODE_CW
;
584 if (ctx
->DrawBuffer
&& ctx
->DrawBuffer
->Name
!= 0)
585 mode
^= (S4_CULLMODE_CW
^ S4_CULLMODE_CCW
);
586 if (ctx
->Polygon
.CullFaceMode
== GL_FRONT
)
587 mode
^= (S4_CULLMODE_CW
^ S4_CULLMODE_CCW
);
588 if (ctx
->Polygon
.FrontFace
!= GL_CCW
)
589 mode
^= (S4_CULLMODE_CW
^ S4_CULLMODE_CCW
);
592 mode
= S4_CULLMODE_BOTH
;
595 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS4
];
596 dw
&= ~S4_CULLMODE_MASK
;
598 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS4
]) {
599 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = dw
;
600 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
605 i915LineWidth(struct gl_context
* ctx
, GLfloat widthf
)
607 struct i915_context
*i915
= I915_CONTEXT(ctx
);
608 int lis4
= i915
->state
.Ctx
[I915_CTXREG_LIS4
] & ~S4_LINE_WIDTH_MASK
;
611 DBG("%s\n", __FUNCTION__
);
613 width
= (int) (widthf
* 2);
614 width
= CLAMP(width
, 1, 0xf);
615 lis4
|= width
<< S4_LINE_WIDTH_SHIFT
;
617 if (lis4
!= i915
->state
.Ctx
[I915_CTXREG_LIS4
]) {
618 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
619 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = lis4
;
624 i915PointSize(struct gl_context
* ctx
, GLfloat size
)
626 struct i915_context
*i915
= I915_CONTEXT(ctx
);
627 int lis4
= i915
->state
.Ctx
[I915_CTXREG_LIS4
] & ~S4_POINT_WIDTH_MASK
;
628 GLint point_size
= (int) round(size
);
630 DBG("%s\n", __FUNCTION__
);
632 point_size
= CLAMP(point_size
, 1, 255);
633 lis4
|= point_size
<< S4_POINT_WIDTH_SHIFT
;
635 if (lis4
!= i915
->state
.Ctx
[I915_CTXREG_LIS4
]) {
636 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
637 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = lis4
;
643 i915PointParameterfv(struct gl_context
* ctx
, GLenum pname
, const GLfloat
*params
)
645 struct i915_context
*i915
= I915_CONTEXT(ctx
);
648 case GL_POINT_SPRITE_COORD_ORIGIN
:
649 /* This could be supported, but it would require modifying the fragment
650 * program to invert the y component of the texture coordinate by
651 * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
653 FALLBACK(&i915
->intel
, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN
,
654 (params
[0] != GL_UPPER_LEFT
));
660 /* =============================================================
665 i915ColorMask(struct gl_context
* ctx
,
666 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
668 struct i915_context
*i915
= I915_CONTEXT(ctx
);
669 GLuint tmp
= i915
->state
.Ctx
[I915_CTXREG_LIS5
] & ~S5_WRITEDISABLE_MASK
;
671 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__
, r
, g
, b
,
675 tmp
|= S5_WRITEDISABLE_RED
;
677 tmp
|= S5_WRITEDISABLE_GREEN
;
679 tmp
|= S5_WRITEDISABLE_BLUE
;
681 tmp
|= S5_WRITEDISABLE_ALPHA
;
683 if (tmp
!= i915
->state
.Ctx
[I915_CTXREG_LIS5
]) {
684 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
685 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = tmp
;
690 update_specular(struct gl_context
* ctx
)
692 /* A hack to trigger the rebuild of the fragment program.
694 intel_context(ctx
)->NewGLState
|= _NEW_TEXTURE
;
698 i915LightModelfv(struct gl_context
* ctx
, GLenum pname
, const GLfloat
* param
)
700 DBG("%s\n", __FUNCTION__
);
702 if (pname
== GL_LIGHT_MODEL_COLOR_CONTROL
) {
703 update_specular(ctx
);
708 i915ShadeModel(struct gl_context
* ctx
, GLenum mode
)
710 struct i915_context
*i915
= I915_CONTEXT(ctx
);
711 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
713 if (mode
== GL_SMOOTH
) {
714 i915
->state
.Ctx
[I915_CTXREG_LIS4
] &= ~(S4_FLATSHADE_ALPHA
|
716 S4_FLATSHADE_SPECULAR
);
719 i915
->state
.Ctx
[I915_CTXREG_LIS4
] |= (S4_FLATSHADE_ALPHA
|
721 S4_FLATSHADE_SPECULAR
);
725 /* =============================================================
729 i915_update_fog(struct gl_context
* ctx
)
731 struct i915_context
*i915
= I915_CONTEXT(ctx
);
736 if (ctx
->FragmentProgram
._Current
) {
737 /* Pull in static fog state from program */
742 enabled
= ctx
->Fog
.Enabled
;
743 mode
= ctx
->Fog
.Mode
;
747 i915
->vertex_fog
= I915_FOG_NONE
;
749 else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
750 I915_STATECHANGE(i915
, I915_UPLOAD_FOG
);
751 i915
->state
.Fog
[I915_FOGREG_MODE1
] &= ~FMC1_FOGFUNC_MASK
;
752 i915
->state
.Fog
[I915_FOGREG_MODE1
] |= FMC1_FOGFUNC_VERTEX
;
753 i915
->vertex_fog
= I915_FOG_VERTEX
;
756 I915_ACTIVESTATE(i915
, I915_UPLOAD_FOG
, enabled
);
757 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS5
];
761 dw
&= ~S5_FOG_ENABLE
;
762 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS5
]) {
763 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = dw
;
764 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
767 /* Always enable pixel fog. Vertex fog using fog coord will conflict
768 * with fog code appended onto fragment program.
770 _tnl_allow_vertex_fog( ctx
, 0 );
771 _tnl_allow_pixel_fog( ctx
, 1 );
775 i915Fogfv(struct gl_context
* ctx
, GLenum pname
, const GLfloat
* param
)
777 struct i915_context
*i915
= I915_CONTEXT(ctx
);
780 case GL_FOG_COORDINATE_SOURCE_EXT
:
787 I915_STATECHANGE(i915
, I915_UPLOAD_FOG
);
789 if (i915
->state
.Fog
[I915_FOGREG_MODE1
] & FMC1_FOGINDEX_Z
) {
790 i915
->state
.Fog
[I915_FOGREG_MODE3
] =
791 (GLuint
) (ctx
->Fog
.Density
* FMC3_D_ONE
);
795 fi
.f
= ctx
->Fog
.Density
;
796 i915
->state
.Fog
[I915_FOGREG_MODE3
] = fi
.i
;
801 I915_STATECHANGE(i915
, I915_UPLOAD_FOG
);
802 i915
->state
.Fog
[I915_FOGREG_COLOR
] =
803 (_3DSTATE_FOG_COLOR_CMD
|
804 ((GLubyte
) (ctx
->Fog
.Color
[0] * 255.0F
) << 16) |
805 ((GLubyte
) (ctx
->Fog
.Color
[1] * 255.0F
) << 8) |
806 ((GLubyte
) (ctx
->Fog
.Color
[2] * 255.0F
) << 0));
815 i915Hint(struct gl_context
* ctx
, GLenum target
, GLenum state
)
825 /* =============================================================
829 i915Enable(struct gl_context
* ctx
, GLenum cap
, GLboolean state
)
831 struct i915_context
*i915
= I915_CONTEXT(ctx
);
840 update_specular(ctx
);
844 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
846 dw
|= S6_ALPHA_TEST_ENABLE
;
848 dw
&= ~S6_ALPHA_TEST_ENABLE
;
849 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
850 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw
;
851 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
856 i915EvalLogicOpBlendState(ctx
);
859 case GL_COLOR_LOGIC_OP
:
860 i915EvalLogicOpBlendState(ctx
);
862 /* Logicop doesn't seem to work at 16bpp:
864 if (ctx
->Visual
.rgbBits
== 16)
865 FALLBACK(&i915
->intel
, I915_FALLBACK_LOGICOP
, state
);
868 case GL_FRAGMENT_PROGRAM_ARB
:
872 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS5
];
874 dw
|= S5_COLOR_DITHER_ENABLE
;
876 dw
&= ~S5_COLOR_DITHER_ENABLE
;
877 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS5
]) {
878 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = dw
;
879 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
884 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS6
];
886 dw
|= S6_DEPTH_TEST_ENABLE
;
888 dw
&= ~S6_DEPTH_TEST_ENABLE
;
889 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS6
]) {
890 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = dw
;
891 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
894 i915DepthMask(ctx
, ctx
->Depth
.Mask
);
897 case GL_SCISSOR_TEST
:
898 I915_STATECHANGE(i915
, I915_UPLOAD_BUFFERS
);
900 i915
->state
.Buffer
[I915_DESTREG_SENABLE
] =
901 (_3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
);
903 i915
->state
.Buffer
[I915_DESTREG_SENABLE
] =
904 (_3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
);
908 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS4
];
910 dw
|= S4_LINE_ANTIALIAS_ENABLE
;
912 dw
&= ~S4_LINE_ANTIALIAS_ENABLE
;
913 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS4
]) {
914 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = dw
;
915 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
923 i915CullFaceFrontFace(ctx
, 0);
926 case GL_STENCIL_TEST
:
928 GLboolean hw_stencil
= GL_FALSE
;
929 if (ctx
->DrawBuffer
) {
930 struct intel_renderbuffer
*irbStencil
931 = intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
932 hw_stencil
= (irbStencil
&& irbStencil
->region
);
935 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS5
];
937 dw
|= (S5_STENCIL_TEST_ENABLE
| S5_STENCIL_WRITE_ENABLE
);
939 dw
&= ~(S5_STENCIL_TEST_ENABLE
| S5_STENCIL_WRITE_ENABLE
);
940 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS5
]) {
941 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = dw
;
942 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
946 FALLBACK(&i915
->intel
, I915_FALLBACK_STENCIL
, state
);
951 case GL_POLYGON_STIPPLE
:
952 /* The stipple command worked on my 855GM box, but not my 845G.
953 * I'll do more testing later to find out exactly which hardware
954 * supports it. Disabled for now.
956 if (i915
->intel
.hw_stipple
&&
957 i915
->intel
.reduced_primitive
== GL_TRIANGLES
) {
958 I915_STATECHANGE(i915
, I915_UPLOAD_STIPPLE
);
960 i915
->state
.Stipple
[I915_STPREG_ST1
] |= ST1_ENABLE
;
962 i915
->state
.Stipple
[I915_STPREG_ST1
] &= ~ST1_ENABLE
;
966 case GL_POLYGON_SMOOTH
:
969 case GL_POINT_SPRITE
:
970 /* This state change is handled in i915_reduced_primitive_state because
971 * the hardware bit should only be set when rendering points.
973 dw
= i915
->state
.Ctx
[I915_CTXREG_LIS4
];
975 dw
|= S4_SPRITE_POINT_ENABLE
;
977 dw
&= ~S4_SPRITE_POINT_ENABLE
;
978 if (dw
!= i915
->state
.Ctx
[I915_CTXREG_LIS4
]) {
979 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = dw
;
980 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
984 case GL_POINT_SMOOTH
:
994 i915_init_packets(struct i915_context
*i915
)
997 memset(&i915
->state
, 0, sizeof(i915
->state
));
1001 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
1002 I915_STATECHANGE(i915
, I915_UPLOAD_BLEND
);
1003 /* Probably don't want to upload all this stuff every time one
1006 i915
->state
.Ctx
[I915_CTXREG_LI
] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1
|
1009 I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
1010 i915
->state
.Ctx
[I915_CTXREG_LIS2
] = 0;
1011 i915
->state
.Ctx
[I915_CTXREG_LIS4
] = 0;
1012 i915
->state
.Ctx
[I915_CTXREG_LIS5
] = 0;
1014 if (i915
->intel
.ctx
.Visual
.rgbBits
== 16)
1015 i915
->state
.Ctx
[I915_CTXREG_LIS5
] |= S5_COLOR_DITHER_ENABLE
;
1018 i915
->state
.Ctx
[I915_CTXREG_LIS6
] = (S6_COLOR_WRITE_ENABLE
|
1019 (2 << S6_TRISTRIP_PV_SHIFT
));
1021 i915
->state
.Ctx
[I915_CTXREG_STATE4
] = (_3DSTATE_MODES_4_CMD
|
1022 ENABLE_LOGIC_OP_FUNC
|
1023 LOGIC_OP_FUNC(LOGICOP_COPY
) |
1024 ENABLE_STENCIL_TEST_MASK
|
1025 STENCIL_TEST_MASK(0xff) |
1026 ENABLE_STENCIL_WRITE_MASK
|
1027 STENCIL_WRITE_MASK(0xff));
1029 i915
->state
.Blend
[I915_BLENDREG_IAB
] =
1030 (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
| IAB_MODIFY_ENABLE
|
1031 IAB_MODIFY_FUNC
| IAB_MODIFY_SRC_FACTOR
| IAB_MODIFY_DST_FACTOR
);
1033 i915
->state
.Blend
[I915_BLENDREG_BLENDCOLOR0
] =
1034 _3DSTATE_CONST_BLEND_COLOR_CMD
;
1035 i915
->state
.Blend
[I915_BLENDREG_BLENDCOLOR1
] = 0;
1037 i915
->state
.Ctx
[I915_CTXREG_BF_STENCIL_MASKS
] =
1038 _3DSTATE_BACKFACE_STENCIL_MASKS
|
1039 BFM_ENABLE_STENCIL_TEST_MASK
|
1040 BFM_ENABLE_STENCIL_WRITE_MASK
|
1041 (0xff << BFM_STENCIL_WRITE_MASK_SHIFT
) |
1042 (0xff << BFM_STENCIL_TEST_MASK_SHIFT
);
1043 i915
->state
.Ctx
[I915_CTXREG_BF_STENCIL_OPS
] =
1044 _3DSTATE_BACKFACE_STENCIL_OPS
|
1045 BFO_ENABLE_STENCIL_REF
|
1046 BFO_ENABLE_STENCIL_FUNCS
|
1047 BFO_ENABLE_STENCIL_TWO_SIDE
;
1051 I915_STATECHANGE(i915
, I915_UPLOAD_STIPPLE
);
1052 i915
->state
.Stipple
[I915_STPREG_ST0
] = _3DSTATE_STIPPLE
;
1057 I915_STATECHANGE(i915
, I915_UPLOAD_FOG
);
1058 i915
->state
.Fog
[I915_FOGREG_MODE0
] = _3DSTATE_FOG_MODE_CMD
;
1059 i915
->state
.Fog
[I915_FOGREG_MODE1
] = (FMC1_FOGFUNC_MODIFY_ENABLE
|
1060 FMC1_FOGFUNC_VERTEX
|
1061 FMC1_FOGINDEX_MODIFY_ENABLE
|
1063 FMC1_C1_C2_MODIFY_ENABLE
|
1064 FMC1_DENSITY_MODIFY_ENABLE
);
1065 i915
->state
.Fog
[I915_FOGREG_COLOR
] = _3DSTATE_FOG_COLOR_CMD
;
1069 i915
->state
.Buffer
[I915_DESTREG_DV0
] = _3DSTATE_DST_BUF_VARS_CMD
;
1072 i915
->state
.Buffer
[I915_DESTREG_SENABLE
] =
1073 (_3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
);
1074 i915
->state
.Buffer
[I915_DESTREG_SR0
] = _3DSTATE_SCISSOR_RECT_0_CMD
;
1075 i915
->state
.Buffer
[I915_DESTREG_SR1
] = 0;
1076 i915
->state
.Buffer
[I915_DESTREG_SR2
] = 0;
1079 i915
->state
.RasterRules
[I915_RASTER_RULES
] = _3DSTATE_RASTER_RULES_CMD
|
1080 ENABLE_POINT_RASTER_RULE
|
1081 OGL_POINT_RASTER_RULE
|
1082 ENABLE_LINE_STRIP_PROVOKE_VRTX
|
1083 ENABLE_TRI_FAN_PROVOKE_VRTX
|
1084 LINE_STRIP_PROVOKE_VRTX(1) |
1085 TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D
| TEXKILL_4D
;
1089 I915_STATECHANGE(i915
, I915_UPLOAD_DEFAULTS
);
1090 i915
->state
.Default
[I915_DEFREG_C0
] = _3DSTATE_DEFAULT_DIFFUSE
;
1091 i915
->state
.Default
[I915_DEFREG_C1
] = 0;
1092 i915
->state
.Default
[I915_DEFREG_S0
] = _3DSTATE_DEFAULT_SPECULAR
;
1093 i915
->state
.Default
[I915_DEFREG_S1
] = 0;
1094 i915
->state
.Default
[I915_DEFREG_Z0
] = _3DSTATE_DEFAULT_Z
;
1095 i915
->state
.Default
[I915_DEFREG_Z1
] = 0;
1100 /* These will be emitted every at the head of every buffer, unless
1101 * we get hardware contexts working.
1103 i915
->state
.active
= (I915_UPLOAD_PROGRAM
|
1104 I915_UPLOAD_STIPPLE
|
1107 I915_UPLOAD_BUFFERS
|
1108 I915_UPLOAD_INVARIENT
|
1109 I915_UPLOAD_RASTER_RULES
);
1113 i915_update_provoking_vertex(struct gl_context
* ctx
)
1115 struct i915_context
*i915
= I915_CONTEXT(ctx
);
1117 I915_STATECHANGE(i915
, I915_UPLOAD_CTX
);
1118 i915
->state
.Ctx
[I915_CTXREG_LIS6
] &= ~(S6_TRISTRIP_PV_MASK
);
1120 I915_STATECHANGE(i915
, I915_UPLOAD_RASTER_RULES
);
1121 i915
->state
.RasterRules
[I915_RASTER_RULES
] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK
|
1122 TRI_FAN_PROVOKE_VRTX_MASK
);
1125 if (ctx
->Light
.ProvokingVertex
== GL_LAST_VERTEX_CONVENTION
) {
1126 i915
->state
.RasterRules
[I915_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1127 TRI_FAN_PROVOKE_VRTX(2));
1128 i915
->state
.Ctx
[I915_CTXREG_LIS6
] |= (2 << S6_TRISTRIP_PV_SHIFT
);
1130 i915
->state
.RasterRules
[I915_RASTER_RULES
] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1131 TRI_FAN_PROVOKE_VRTX(1));
1132 i915
->state
.Ctx
[I915_CTXREG_LIS6
] |= (0 << S6_TRISTRIP_PV_SHIFT
);
1137 i915InitStateFunctions(struct dd_function_table
*functions
)
1139 functions
->AlphaFunc
= i915AlphaFunc
;
1140 functions
->BlendColor
= i915BlendColor
;
1141 functions
->BlendEquationSeparate
= i915BlendEquationSeparate
;
1142 functions
->BlendFuncSeparate
= i915BlendFuncSeparate
;
1143 functions
->ColorMask
= i915ColorMask
;
1144 functions
->CullFace
= i915CullFaceFrontFace
;
1145 functions
->DepthFunc
= i915DepthFunc
;
1146 functions
->DepthMask
= i915DepthMask
;
1147 functions
->Enable
= i915Enable
;
1148 functions
->Fogfv
= i915Fogfv
;
1149 functions
->FrontFace
= i915CullFaceFrontFace
;
1150 functions
->Hint
= i915Hint
;
1151 functions
->LightModelfv
= i915LightModelfv
;
1152 functions
->LineWidth
= i915LineWidth
;
1153 functions
->LogicOpcode
= i915LogicOp
;
1154 functions
->PointSize
= i915PointSize
;
1155 functions
->PointParameterfv
= i915PointParameterfv
;
1156 functions
->PolygonStipple
= i915PolygonStipple
;
1157 functions
->Scissor
= i915Scissor
;
1158 functions
->ShadeModel
= i915ShadeModel
;
1159 functions
->StencilFuncSeparate
= i915StencilFuncSeparate
;
1160 functions
->StencilMaskSeparate
= i915StencilMaskSeparate
;
1161 functions
->StencilOpSeparate
= i915StencilOpSeparate
;
1162 functions
->DepthRange
= i915DepthRange
;
1163 functions
->Viewport
= i915Viewport
;
1168 i915InitState(struct i915_context
*i915
)
1170 struct gl_context
*ctx
= &i915
->intel
.ctx
;
1172 i915_init_packets(i915
);
1174 _mesa_init_driver_state(ctx
);