src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "main/state.h"
  35 #include "tnl/tnl.h"
  36 #include "tnl/t_context.h"
  37
  38 #include "texmem.h"
  39
  40 #include "drivers/common/driverfuncs.h"
  41
  42 #include "intel_fbo.h"
  43 #include "intel_screen.h"
  44 #include "intel_batchbuffer.h"
  45 #include "intel_buffers.h"
  46
  47 #include "i915_context.h"
  48 #include "i915_reg.h"
  49
  50 #define FILE_DEBUG_FLAG DEBUG_STATE
  51
  52 void
  53 i915_update_stencil(struct gl_context * ctx)
  54 {
  55    struct i915_context *i915 = I915_CONTEXT(ctx);
  56    GLuint front_ref, front_writemask, front_mask;
  57    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  58    GLuint back_ref, back_writemask, back_mask;
  59    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  60    GLuint dirty = 0;
  61
  62    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  63     * appropriately.
  64     */
  65    /* _NEW_POLYGON | _NEW_STENCIL */
  66    if (ctx->Polygon.FrontFace == GL_CW) {
  67       front_ref = ctx->Stencil.Ref[0];
  68       front_mask = ctx->Stencil.ValueMask[0];
  69       front_writemask = ctx->Stencil.WriteMask[0];
  70       front_func = ctx->Stencil.Function[0];
  71       front_fail = ctx->Stencil.FailFunc[0];
  72       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  73       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  74       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  75       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  76       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  77       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  78       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  81    } else {
  82       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  83       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  84       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  85       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  86       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  89       back_ref = ctx->Stencil.Ref[0];
  90       back_mask = ctx->Stencil.ValueMask[0];
  91       back_writemask = ctx->Stencil.WriteMask[0];
  92       back_func = ctx->Stencil.Function[0];
  93       back_fail = ctx->Stencil.FailFunc[0];
  94       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  95       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  96    }
  97 #define set_ctx_bits(reg, mask, set) do{ \
  98    GLuint dw = i915->state.Ctx[reg]; \
  99    dw &= ~(mask); \
 100    dw |= (set); \
 101    dirty |= dw != i915->state.Ctx[reg]; \
 102    i915->state.Ctx[reg] = dw; \
 103 } while(0)
 104
 105    /* Set front state. */
 106    set_ctx_bits(I915_CTXREG_STATE4,
 107                 MODE4_ENABLE_STENCIL_TEST_MASK |
 108                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 109                 ENABLE_STENCIL_TEST_MASK |
 110                 ENABLE_STENCIL_WRITE_MASK |
 111                 STENCIL_TEST_MASK(front_mask) |
 112                 STENCIL_WRITE_MASK(front_writemask));
 113
 114    set_ctx_bits(I915_CTXREG_LIS5,
 115                 S5_STENCIL_REF_MASK |
 116                 S5_STENCIL_TEST_FUNC_MASK |
 117                 S5_STENCIL_FAIL_MASK |
 118                 S5_STENCIL_PASS_Z_FAIL_MASK |
 119                 S5_STENCIL_PASS_Z_PASS_MASK,
 120                 (front_ref << S5_STENCIL_REF_SHIFT) |
 121                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 122                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 123                 (intel_translate_stencil_op(front_pass_z_fail) <<
 124                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 125                 (intel_translate_stencil_op(front_pass_z_pass) <<
 126                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 127
 128    /* Set back state if different from front. */
 129    if (ctx->Stencil._TestTwoSide) {
 130       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 131                    BFO_STENCIL_REF_MASK |
 132                    BFO_STENCIL_TEST_MASK |
 133                    BFO_STENCIL_FAIL_MASK |
 134                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 135                    BFO_STENCIL_PASS_Z_PASS_MASK,
 136                    BFO_STENCIL_TWO_SIDE |
 137                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 138                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 139                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 140                    (intel_translate_stencil_op(back_pass_z_fail) <<
 141                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 142                    (intel_translate_stencil_op(back_pass_z_pass) <<
 143                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 144
 145       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 146                    BFM_STENCIL_TEST_MASK_MASK |
 147                    BFM_STENCIL_WRITE_MASK_MASK,
 148                    BFM_STENCIL_TEST_MASK(back_mask) |
 149                    BFM_STENCIL_WRITE_MASK(back_writemask));
 150    } else {
 151       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 152                    BFO_STENCIL_TWO_SIDE, 0);
 153    }
 154
 155 #undef set_ctx_bits
 156
 157    if (dirty)
 158       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 159 }
 160
 161 static void
 162 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 163                         GLuint mask)
 164 {
 165 }
 166
 167 static void
 168 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 169 {
 170 }
 171
 172 static void
 173 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 174                       GLenum zpass)
 175 {
 176 }
 177
 178 static void
 179 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 180 {
 181    struct i915_context *i915 = I915_CONTEXT(ctx);
 182    int test = intel_translate_compare_func(func);
 183    GLubyte refByte;
 184    GLuint dw;
 185
 186    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 187
 188    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 189    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 190    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 191           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 192    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 193       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 194       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 195    }
 196 }
 197
 198 /* This function makes sure that the proper enables are
 199  * set for LogicOp, Independant Alpha Blend, and Blending.
 200  * It needs to be called from numerous places where we
 201  * could change the LogicOp or Independant Alpha Blend without subsequent
 202  * calls to glEnable.
 203  */
 204 static void
 205 i915EvalLogicOpBlendState(struct gl_context * ctx)
 206 {
 207    struct i915_context *i915 = I915_CONTEXT(ctx);
 208    GLuint dw0, dw1;
 209
 210    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 211    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 212
 213    if (_mesa_rgba_logicop_enabled(ctx)) {
 214       dw0 |= S5_LOGICOP_ENABLE;
 215       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 216    }
 217    else {
 218       dw0 &= ~S5_LOGICOP_ENABLE;
 219
 220       if (ctx->Color.BlendEnabled) {
 221          dw1 |= S6_CBUF_BLEND_ENABLE;
 222       }
 223       else {
 224          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 225       }
 226    }
 227    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 228        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 229       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 230       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 231
 232       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 233    }
 234 }
 235
 236 static void
 237 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 238 {
 239    struct i915_context *i915 = I915_CONTEXT(ctx);
 240    GLubyte r, g, b, a;
 241    GLuint dw;
 242
 243    DBG("%s\n", __FUNCTION__);
 244
 245    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 246    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 247    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 248    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 249
 250    dw = (a << 24) | (r << 16) | (g << 8) | b;
 251    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 252       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 253       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 254    }
 255 }
 256
 257
 258 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 259 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 260 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 261 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 262
 263
 264
 265 static GLuint
 266 translate_blend_equation(GLenum mode)
 267 {
 268    switch (mode) {
 269    case GL_FUNC_ADD:
 270       return BLENDFUNC_ADD;
 271    case GL_MIN:
 272       return BLENDFUNC_MIN;
 273    case GL_MAX:
 274       return BLENDFUNC_MAX;
 275    case GL_FUNC_SUBTRACT:
 276       return BLENDFUNC_SUBTRACT;
 277    case GL_FUNC_REVERSE_SUBTRACT:
 278       return BLENDFUNC_REVERSE_SUBTRACT;
 279    default:
 280       return 0;
 281    }
 282 }
 283
 284 static void
 285 i915UpdateBlendState(struct gl_context * ctx)
 286 {
 287    struct i915_context *i915 = I915_CONTEXT(ctx);
 288    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 289                  ~(IAB_SRC_FACTOR_MASK |
 290                    IAB_DST_FACTOR_MASK |
 291                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 292
 293    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 294                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 295                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 296
 297    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 298    GLuint eqA = ctx->Color.Blend[0].EquationA;
 299    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 300    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 301    GLuint srcA = ctx->Color.Blend[0].SrcA;
 302    GLuint dstA = ctx->Color.Blend[0].DstA;
 303
 304    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 305       srcRGB = dstRGB = GL_ONE;
 306    }
 307
 308    if (eqA == GL_MIN || eqA == GL_MAX) {
 309       srcA = dstA = GL_ONE;
 310    }
 311
 312    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 313    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 314    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 315
 316    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 317    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 318    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 319
 320    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 321       iab |= IAB_ENABLE;
 322
 323    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 324       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 325       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 326    }
 327    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 328       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 329       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 330    }
 331
 332    /* This will catch a logicop blend equation */
 333    i915EvalLogicOpBlendState(ctx);
 334 }
 335
 336
 337 static void
 338 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 339                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 340 {
 341    i915UpdateBlendState(ctx);
 342 }
 343
 344
 345 static void
 346 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 347 {
 348    i915UpdateBlendState(ctx);
 349 }
 350
 351
 352 static void
 353 i915DepthFunc(struct gl_context * ctx, GLenum func)
 354 {
 355    struct i915_context *i915 = I915_CONTEXT(ctx);
 356    int test = intel_translate_compare_func(func);
 357    GLuint dw;
 358
 359    DBG("%s\n", __FUNCTION__);
 360
 361    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 362    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 363    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 364    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 365       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 366       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 367    }
 368 }
 369
 370 static void
 371 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 372 {
 373    struct i915_context *i915 = I915_CONTEXT(ctx);
 374    GLuint dw;
 375
 376    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 377
 378    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 379    if (flag && ctx->Depth.Test)
 380       dw |= S6_DEPTH_WRITE_ENABLE;
 381    else
 382       dw &= ~S6_DEPTH_WRITE_ENABLE;
 383    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 384       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 385       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 386    }
 387 }
 388
 389
 390
 391 /**
 392  * Update the viewport transformation matrix.  Depends on:
 393  *  - viewport pos/size
 394  *  - depthrange
 395  *  - window pos/size or FBO size
 396  */
 397 void
 398 intelCalcViewport(struct gl_context * ctx)
 399 {
 400    struct intel_context *intel = intel_context(ctx);
 401    const GLfloat *v = ctx->Viewport._WindowMap.m;
 402    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 403    GLfloat *m = intel->ViewportMatrix.m;
 404    GLfloat yScale, yBias;
 405
 406    if (ctx->DrawBuffer->Name) {
 407       /* User created FBO */
 408       /* y=0=bottom */
 409       yScale = 1.0;
 410       yBias = 0.0;
 411    }
 412    else {
 413       /* window buffer, y=0=top */
 414       yScale = -1.0;
 415       yBias = ctx->DrawBuffer->Height;
 416    }
 417
 418    m[MAT_SX] = v[MAT_SX];
 419    m[MAT_TX] = v[MAT_TX];
 420
 421    m[MAT_SY] = v[MAT_SY] * yScale;
 422    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 423
 424    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 425    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 426 }
 427
 428
 429 /** Called from ctx->Driver.Viewport() */
 430 static void
 431 i915Viewport(struct gl_context * ctx,
 432               GLint x, GLint y, GLsizei width, GLsizei height)
 433 {
 434    intelCalcViewport(ctx);
 435 }
 436
 437
 438 /** Called from ctx->Driver.DepthRange() */
 439 static void
 440 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 441 {
 442    intelCalcViewport(ctx);
 443 }
 444
 445
 446 /* =============================================================
 447  * Polygon stipple
 448  *
 449  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 450  * Fortunately stipple is usually a repeating pattern.
 451  */
 452 static void
 453 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 454 {
 455    struct i915_context *i915 = I915_CONTEXT(ctx);
 456    const GLubyte *m;
 457    GLubyte p[4];
 458    int i, j, k;
 459    int active = (ctx->Polygon.StippleFlag &&
 460                  i915->intel.reduced_primitive == GL_TRIANGLES);
 461    GLuint newMask;
 462
 463    if (active) {
 464       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 465       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 466    }
 467
 468    /* Use the already unpacked stipple data from the context rather than the
 469     * uninterpreted mask passed in.
 470     */
 471    mask = (const GLubyte *)ctx->PolygonStipple;
 472    m = mask;
 473
 474    p[0] = mask[12] & 0xf;
 475    p[0] |= p[0] << 4;
 476    p[1] = mask[8] & 0xf;
 477    p[1] |= p[1] << 4;
 478    p[2] = mask[4] & 0xf;
 479    p[2] |= p[2] << 4;
 480    p[3] = mask[0] & 0xf;
 481    p[3] |= p[3] << 4;
 482
 483    for (k = 0; k < 8; k++)
 484       for (j = 3; j >= 0; j--)
 485          for (i = 0; i < 4; i++, m++)
 486             if (*m != p[j]) {
 487                i915->intel.hw_stipple = 0;
 488                return;
 489             }
 490
 491    newMask = (((p[0] & 0xf) << 0) |
 492               ((p[1] & 0xf) << 4) |
 493               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 494
 495
 496    if (newMask == 0xffff || newMask == 0x0) {
 497       /* this is needed to make conform pass */
 498       i915->intel.hw_stipple = 0;
 499       return;
 500    }
 501
 502    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 503    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 504    i915->intel.hw_stipple = 1;
 505
 506    if (active)
 507       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 508 }
 509
 510
 511 /* =============================================================
 512  * Hardware clipping
 513  */
 514 static void
 515 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 516 {
 517    struct i915_context *i915 = I915_CONTEXT(ctx);
 518    int x1, y1, x2, y2;
 519
 520    if (!ctx->DrawBuffer)
 521       return;
 522
 523    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 524
 525    if (ctx->DrawBuffer->Name == 0) {
 526       x1 = x;
 527       y1 = ctx->DrawBuffer->Height - (y + h);
 528       x2 = x + w - 1;
 529       y2 = y1 + h - 1;
 530       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 531    }
 532    else {
 533       /* FBO - not inverted
 534        */
 535       x1 = x;
 536       y1 = y;
 537       x2 = x + w - 1;
 538       y2 = y + h - 1;
 539       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 540    }
 541
 542    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 543    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 544    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 545    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 546
 547    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 548
 549    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 550    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 551    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 552 }
 553
 554 static void
 555 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 556 {
 557    struct i915_context *i915 = I915_CONTEXT(ctx);
 558    int tmp = intel_translate_logic_op(opcode);
 559
 560    DBG("%s\n", __FUNCTION__);
 561
 562    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 563    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 564    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 565 }
 566
 567
 568
 569 static void
 570 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 571 {
 572    struct i915_context *i915 = I915_CONTEXT(ctx);
 573    GLuint mode, dw;
 574
 575    DBG("%s %d\n", __FUNCTION__,
 576        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 577
 578    if (!ctx->Polygon.CullFlag) {
 579       mode = S4_CULLMODE_NONE;
 580    }
 581    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 582       mode = S4_CULLMODE_CW;
 583
 584       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 585          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 586       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 587          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 588       if (ctx->Polygon.FrontFace != GL_CCW)
 589          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 590    }
 591    else {
 592       mode = S4_CULLMODE_BOTH;
 593    }
 594
 595    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 596    dw &= ~S4_CULLMODE_MASK;
 597    dw |= mode;
 598    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 599       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 600       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 601    }
 602 }
 603
 604 static void
 605 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 606 {
 607    struct i915_context *i915 = I915_CONTEXT(ctx);
 608    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 609    int width;
 610
 611    DBG("%s\n", __FUNCTION__);
 612
 613    width = (int) (widthf * 2);
 614    width = CLAMP(width, 1, 0xf);
 615    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 616
 617    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 618       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 619       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 620    }
 621 }
 622
 623 static void
 624 i915PointSize(struct gl_context * ctx, GLfloat size)
 625 {
 626    struct i915_context *i915 = I915_CONTEXT(ctx);
 627    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 628    GLint point_size = (int) round(size);
 629
 630    DBG("%s\n", __FUNCTION__);
 631
 632    point_size = CLAMP(point_size, 1, 255);
 633    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 634
 635    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 636       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 637       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 638    }
 639 }
 640
 641
 642 static void
 643 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 644 {
 645    struct i915_context *i915 = I915_CONTEXT(ctx);
 646
 647    switch (pname) {
 648    case GL_POINT_SPRITE_COORD_ORIGIN:
 649       /* This could be supported, but it would require modifying the fragment
 650        * program to invert the y component of the texture coordinate by
 651        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 652        */
 653       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 654                (params[0] != GL_UPPER_LEFT));
 655       break;
 656    }
 657 }
 658
 659
 660 /* =============================================================
 661  * Color masks
 662  */
 663
 664 static void
 665 i915ColorMask(struct gl_context * ctx,
 666               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 667 {
 668    struct i915_context *i915 = I915_CONTEXT(ctx);
 669    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 670
 671    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 672        a);
 673
 674    if (!r)
 675       tmp |= S5_WRITEDISABLE_RED;
 676    if (!g)
 677       tmp |= S5_WRITEDISABLE_GREEN;
 678    if (!b)
 679       tmp |= S5_WRITEDISABLE_BLUE;
 680    if (!a)
 681       tmp |= S5_WRITEDISABLE_ALPHA;
 682
 683    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 684       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 685       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 686    }
 687 }
 688
 689 static void
 690 update_specular(struct gl_context * ctx)
 691 {
 692    /* A hack to trigger the rebuild of the fragment program.
 693     */
 694    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 695 }
 696
 697 static void
 698 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 699 {
 700    DBG("%s\n", __FUNCTION__);
 701
 702    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 703       update_specular(ctx);
 704    }
 705 }
 706
 707 static void
 708 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 709 {
 710    struct i915_context *i915 = I915_CONTEXT(ctx);
 711    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 712
 713    if (mode == GL_SMOOTH) {
 714       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 715                                              S4_FLATSHADE_COLOR |
 716                                              S4_FLATSHADE_SPECULAR);
 717    }
 718    else {
 719       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 720                                             S4_FLATSHADE_COLOR |
 721                                             S4_FLATSHADE_SPECULAR);
 722    }
 723 }
 724
 725 /* =============================================================
 726  * Fog
 727  *
 728  * This empty function remains because _mesa_init_driver_state calls
 729  * dd_function_table::Fogfv unconditionally.  We have to have some function
 730  * there so that it doesn't try to call a NULL pointer.
 731  */
 732 static void
 733 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 734 {
 735    (void) ctx;
 736    (void) pname;
 737    (void) param;
 738 }
 739
 740 /* =============================================================
 741  */
 742
 743 static void
 744 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 745 {
 746    struct i915_context *i915 = I915_CONTEXT(ctx);
 747    GLuint dw;
 748
 749    switch (cap) {
 750    case GL_TEXTURE_2D:
 751       break;
 752
 753    case GL_LIGHTING:
 754    case GL_COLOR_SUM:
 755       update_specular(ctx);
 756       break;
 757
 758    case GL_ALPHA_TEST:
 759       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 760       if (state)
 761          dw |= S6_ALPHA_TEST_ENABLE;
 762       else
 763          dw &= ~S6_ALPHA_TEST_ENABLE;
 764       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 765          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 766          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 767       }
 768       break;
 769
 770    case GL_BLEND:
 771       i915EvalLogicOpBlendState(ctx);
 772       break;
 773
 774    case GL_COLOR_LOGIC_OP:
 775       i915EvalLogicOpBlendState(ctx);
 776
 777       /* Logicop doesn't seem to work at 16bpp:
 778        */
 779       if (ctx->Visual.rgbBits == 16)
 780          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 781       break;
 782
 783    case GL_FRAGMENT_PROGRAM_ARB:
 784       break;
 785
 786    case GL_DITHER:
 787       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 788       if (state)
 789          dw |= S5_COLOR_DITHER_ENABLE;
 790       else
 791          dw &= ~S5_COLOR_DITHER_ENABLE;
 792       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 793          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 794          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 795       }
 796       break;
 797
 798    case GL_DEPTH_TEST:
 799       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 800       if (state)
 801          dw |= S6_DEPTH_TEST_ENABLE;
 802       else
 803          dw &= ~S6_DEPTH_TEST_ENABLE;
 804       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 805          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 806          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 807       }
 808
 809       i915DepthMask(ctx, ctx->Depth.Mask);
 810       break;
 811
 812    case GL_SCISSOR_TEST:
 813       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 814       if (state)
 815          i915->state.Buffer[I915_DESTREG_SENABLE] =
 816             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 817       else
 818          i915->state.Buffer[I915_DESTREG_SENABLE] =
 819             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 820       break;
 821
 822    case GL_LINE_SMOOTH:
 823       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 824       if (state)
 825          dw |= S4_LINE_ANTIALIAS_ENABLE;
 826       else
 827          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 828       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 829          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 830          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 831       }
 832       break;
 833
 834    case GL_CULL_FACE:
 835       i915CullFaceFrontFace(ctx, 0);
 836       break;
 837
 838    case GL_STENCIL_TEST:
 839       {
 840          GLboolean hw_stencil = GL_FALSE;
 841          if (ctx->DrawBuffer) {
 842             struct intel_renderbuffer *irbStencil
 843                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 844             hw_stencil = (irbStencil && irbStencil->region);
 845          }
 846          if (hw_stencil) {
 847             dw = i915->state.Ctx[I915_CTXREG_LIS5];
 848             if (state)
 849                dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 850             else
 851                dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 852             if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 853                i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 854                I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 855             }
 856          }
 857          else {
 858             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 859          }
 860       }
 861       break;
 862
 863    case GL_POLYGON_STIPPLE:
 864       /* The stipple command worked on my 855GM box, but not my 845G.
 865        * I'll do more testing later to find out exactly which hardware
 866        * supports it.  Disabled for now.
 867        */
 868       if (i915->intel.hw_stipple &&
 869           i915->intel.reduced_primitive == GL_TRIANGLES) {
 870          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 871          if (state)
 872             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 873          else
 874             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 875       }
 876       break;
 877
 878    case GL_POLYGON_SMOOTH:
 879       break;
 880
 881    case GL_POINT_SPRITE:
 882       /* This state change is handled in i915_reduced_primitive_state because
 883        * the hardware bit should only be set when rendering points.
 884        */
 885          dw = i915->state.Ctx[I915_CTXREG_LIS4];
 886       if (state)
 887          dw |= S4_SPRITE_POINT_ENABLE;
 888       else
 889          dw &= ~S4_SPRITE_POINT_ENABLE;
 890       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 891          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 892          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 893       }
 894       break;
 895
 896    case GL_POINT_SMOOTH:
 897       break;
 898
 899    default:
 900       ;
 901    }
 902 }
 903
 904
 905 static void
 906 i915_init_packets(struct i915_context *i915)
 907 {
 908    /* Zero all state */
 909    memset(&i915->state, 0, sizeof(i915->state));
 910
 911
 912    {
 913       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 914       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 915       /* Probably don't want to upload all this stuff every time one
 916        * piece changes.
 917        */
 918       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 919                                          I1_LOAD_S(2) |
 920                                          I1_LOAD_S(4) |
 921                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 922       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 923       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 924       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 925
 926       if (i915->intel.ctx.Visual.rgbBits == 16)
 927          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 928
 929
 930       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 931                                            (2 << S6_TRISTRIP_PV_SHIFT));
 932
 933       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 934                                              ENABLE_LOGIC_OP_FUNC |
 935                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 936                                              ENABLE_STENCIL_TEST_MASK |
 937                                              STENCIL_TEST_MASK(0xff) |
 938                                              ENABLE_STENCIL_WRITE_MASK |
 939                                              STENCIL_WRITE_MASK(0xff));
 940
 941       i915->state.Blend[I915_BLENDREG_IAB] =
 942          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 943           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 944
 945       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
 946          _3DSTATE_CONST_BLEND_COLOR_CMD;
 947       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 948
 949       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 950          _3DSTATE_BACKFACE_STENCIL_MASKS |
 951          BFM_ENABLE_STENCIL_TEST_MASK |
 952          BFM_ENABLE_STENCIL_WRITE_MASK |
 953          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
 954          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
 955       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
 956          _3DSTATE_BACKFACE_STENCIL_OPS |
 957          BFO_ENABLE_STENCIL_REF |
 958          BFO_ENABLE_STENCIL_FUNCS |
 959          BFO_ENABLE_STENCIL_TWO_SIDE;
 960    }
 961
 962    {
 963       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 964       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 965    }
 966
 967    {
 968       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 969
 970       /* scissor */
 971       i915->state.Buffer[I915_DESTREG_SENABLE] =
 972          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 973       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 974       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 975       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 976    }
 977
 978    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
 979       ENABLE_POINT_RASTER_RULE |
 980       OGL_POINT_RASTER_RULE |
 981       ENABLE_LINE_STRIP_PROVOKE_VRTX |
 982       ENABLE_TRI_FAN_PROVOKE_VRTX |
 983       LINE_STRIP_PROVOKE_VRTX(1) |
 984       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
 985
 986 #if 0
 987    {
 988       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 989       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 990       i915->state.Default[I915_DEFREG_C1] = 0;
 991       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 992       i915->state.Default[I915_DEFREG_S1] = 0;
 993       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 994       i915->state.Default[I915_DEFREG_Z1] = 0;
 995    }
 996 #endif
 997
 998
 999    /* These will be emitted every at the head of every buffer, unless
1000     * we get hardware contexts working.
1001     */
1002    i915->state.active = (I915_UPLOAD_PROGRAM |
1003                          I915_UPLOAD_STIPPLE |
1004                          I915_UPLOAD_CTX |
1005                          I915_UPLOAD_BLEND |
1006                          I915_UPLOAD_BUFFERS |
1007                          I915_UPLOAD_INVARIENT |
1008                          I915_UPLOAD_RASTER_RULES);
1009 }
1010
1011 void
1012 i915_update_provoking_vertex(struct gl_context * ctx)
1013 {
1014    struct i915_context *i915 = I915_CONTEXT(ctx);
1015
1016    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1017    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1018
1019    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1020    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1021                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1022
1023    /* _NEW_LIGHT */
1024    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1025       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1026                                                      TRI_FAN_PROVOKE_VRTX(2));
1027       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1028    } else {
1029       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1030                                                      TRI_FAN_PROVOKE_VRTX(1));
1031       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1032     }
1033 }
1034
1035 void
1036 i915InitStateFunctions(struct dd_function_table *functions)
1037 {
1038    functions->AlphaFunc = i915AlphaFunc;
1039    functions->BlendColor = i915BlendColor;
1040    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1041    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1042    functions->ColorMask = i915ColorMask;
1043    functions->CullFace = i915CullFaceFrontFace;
1044    functions->DepthFunc = i915DepthFunc;
1045    functions->DepthMask = i915DepthMask;
1046    functions->Enable = i915Enable;
1047    functions->Fogfv = i915Fogfv;
1048    functions->FrontFace = i915CullFaceFrontFace;
1049    functions->LightModelfv = i915LightModelfv;
1050    functions->LineWidth = i915LineWidth;
1051    functions->LogicOpcode = i915LogicOp;
1052    functions->PointSize = i915PointSize;
1053    functions->PointParameterfv = i915PointParameterfv;
1054    functions->PolygonStipple = i915PolygonStipple;
1055    functions->Scissor = i915Scissor;
1056    functions->ShadeModel = i915ShadeModel;
1057    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1058    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1059    functions->StencilOpSeparate = i915StencilOpSeparate;
1060    functions->DepthRange = i915DepthRange;
1061    functions->Viewport = i915Viewport;
1062 }
1063
1064
1065 void
1066 i915InitState(struct i915_context *i915)
1067 {
1068    struct gl_context *ctx = &i915->intel.ctx;
1069
1070    i915_init_packets(i915);
1071
1072    _mesa_init_driver_state(ctx);
1073 }