src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "drivers/common/driverfuncs.h"
  40
  41 #include "intel_fbo.h"
  42 #include "intel_screen.h"
  43 #include "intel_batchbuffer.h"
  44 #include "intel_buffers.h"
  45
  46 #include "i915_context.h"
  47 #include "i915_reg.h"
  48
  49 #define FILE_DEBUG_FLAG DEBUG_STATE
  50
  51 static void
  52 i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  53                         GLuint mask)
  54 {
  55    struct i915_context *i915 = I915_CONTEXT(ctx);
  56    int test = intel_translate_compare_func(func);
  57
  58    mask = mask & 0xff;
  59
  60    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  61        _mesa_lookup_enum_by_nr(func), ref, mask);
  62
  63
  64    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  65    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  66    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  67                                            STENCIL_TEST_MASK(mask));
  68
  69    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
  70                                           S5_STENCIL_TEST_FUNC_MASK);
  71
  72    i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
  73                                          (test <<
  74                                           S5_STENCIL_TEST_FUNC_SHIFT));
  75 }
  76
  77 static void
  78 i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  79 {
  80    struct i915_context *i915 = I915_CONTEXT(ctx);
  81
  82    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  83
  84    mask = mask & 0xff;
  85
  86    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  87    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  88    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  89                                            STENCIL_WRITE_MASK(mask));
  90 }
  91
  92
  93 static void
  94 i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  95                       GLenum zpass)
  96 {
  97    struct i915_context *i915 = I915_CONTEXT(ctx);
  98    int fop = intel_translate_stencil_op(fail);
  99    int dfop = intel_translate_stencil_op(zfail);
 100    int dpop = intel_translate_stencil_op(zpass);
 101
 102
 103    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
 104        _mesa_lookup_enum_by_nr(fail),
 105        _mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
 106
 107    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 108
 109    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
 110                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 111                                           S5_STENCIL_PASS_Z_PASS_MASK);
 112
 113    i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
 114                                          (dfop <<
 115                                           S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 116                                          (dpop <<
 117                                           S5_STENCIL_PASS_Z_PASS_SHIFT));
 118 }
 119
 120 static void
 121 i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 122 {
 123    struct i915_context *i915 = I915_CONTEXT(ctx);
 124    int test = intel_translate_compare_func(func);
 125    GLubyte refByte;
 126
 127    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 128
 129    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 130    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 131                                           S6_ALPHA_REF_MASK);
 132    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 133                                          (((GLuint) refByte) <<
 134                                           S6_ALPHA_REF_SHIFT));
 135 }
 136
 137 /* This function makes sure that the proper enables are
 138  * set for LogicOp, Independant Alpha Blend, and Blending.
 139  * It needs to be called from numerous places where we
 140  * could change the LogicOp or Independant Alpha Blend without subsequent
 141  * calls to glEnable.
 142  */
 143 static void
 144 i915EvalLogicOpBlendState(GLcontext * ctx)
 145 {
 146    struct i915_context *i915 = I915_CONTEXT(ctx);
 147
 148    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 149
 150    if (RGBA_LOGICOP_ENABLED(ctx)) {
 151       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 152       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 153    }
 154    else {
 155       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 156
 157       if (ctx->Color.BlendEnabled) {
 158          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 159       }
 160       else {
 161          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 162       }
 163    }
 164 }
 165
 166 static void
 167 i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 168 {
 169    struct i915_context *i915 = I915_CONTEXT(ctx);
 170    GLubyte r, g, b, a;
 171
 172    DBG("%s\n", __FUNCTION__);
 173
 174    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 175    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 176    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 177    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 178
 179    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 180    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 181       (a << 24) | (r << 16) | (g << 8) | b;
 182 }
 183
 184
 185 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 186 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 187 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 188 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 189
 190
 191
 192 static GLuint
 193 translate_blend_equation(GLenum mode)
 194 {
 195    switch (mode) {
 196    case GL_FUNC_ADD:
 197       return BLENDFUNC_ADD;
 198    case GL_MIN:
 199       return BLENDFUNC_MIN;
 200    case GL_MAX:
 201       return BLENDFUNC_MAX;
 202    case GL_FUNC_SUBTRACT:
 203       return BLENDFUNC_SUBTRACT;
 204    case GL_FUNC_REVERSE_SUBTRACT:
 205       return BLENDFUNC_REVERSE_SUBTRACT;
 206    default:
 207       return 0;
 208    }
 209 }
 210
 211 static void
 212 i915UpdateBlendState(GLcontext * ctx)
 213 {
 214    struct i915_context *i915 = I915_CONTEXT(ctx);
 215    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 216                  ~(IAB_SRC_FACTOR_MASK |
 217                    IAB_DST_FACTOR_MASK |
 218                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 219
 220    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 221                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 222                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 223
 224    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 225    GLuint eqA = ctx->Color.BlendEquationA;
 226    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 227    GLuint dstRGB = ctx->Color.BlendDstRGB;
 228    GLuint srcA = ctx->Color.BlendSrcA;
 229    GLuint dstA = ctx->Color.BlendDstA;
 230
 231    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 232       srcRGB = dstRGB = GL_ONE;
 233    }
 234
 235    if (eqA == GL_MIN || eqA == GL_MAX) {
 236       srcA = dstA = GL_ONE;
 237    }
 238
 239    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 240    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 241    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 242
 243    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 244    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 245    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 246
 247    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 248       iab |= IAB_ENABLE;
 249
 250    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 251        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 252       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 253       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 254       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 255    }
 256
 257    /* This will catch a logicop blend equation */
 258    i915EvalLogicOpBlendState(ctx);
 259 }
 260
 261
 262 static void
 263 i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
 264                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 265 {
 266    i915UpdateBlendState(ctx);
 267 }
 268
 269
 270 static void
 271 i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 272 {
 273    i915UpdateBlendState(ctx);
 274 }
 275
 276
 277 static void
 278 i915DepthFunc(GLcontext * ctx, GLenum func)
 279 {
 280    struct i915_context *i915 = I915_CONTEXT(ctx);
 281    int test = intel_translate_compare_func(func);
 282
 283    DBG("%s\n", __FUNCTION__);
 284
 285    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 286    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 287    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 288 }
 289
 290 static void
 291 i915DepthMask(GLcontext * ctx, GLboolean flag)
 292 {
 293    struct i915_context *i915 = I915_CONTEXT(ctx);
 294
 295    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 296
 297    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 298
 299    if (flag && ctx->Depth.Test)
 300       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 301    else
 302       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 303 }
 304
 305
 306
 307 /**
 308  * Update the viewport transformation matrix.  Depends on:
 309  *  - viewport pos/size
 310  *  - depthrange
 311  *  - window pos/size or FBO size
 312  */
 313 void
 314 intelCalcViewport(GLcontext * ctx)
 315 {
 316    struct intel_context *intel = intel_context(ctx);
 317    const GLfloat *v = ctx->Viewport._WindowMap.m;
 318    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 319    GLfloat *m = intel->ViewportMatrix.m;
 320    GLfloat yScale, yBias;
 321
 322    if (ctx->DrawBuffer->Name) {
 323       /* User created FBO */
 324       /* y=0=bottom */
 325       yScale = 1.0;
 326       yBias = 0.0;
 327    }
 328    else {
 329       /* window buffer, y=0=top */
 330       yScale = -1.0;
 331       yBias = (intel->driDrawable) ? intel->driDrawable->h : 0.0F;
 332    }
 333
 334    m[MAT_SX] = v[MAT_SX];
 335    m[MAT_TX] = v[MAT_TX];
 336
 337    m[MAT_SY] = v[MAT_SY] * yScale;
 338    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 339
 340    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 341    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 342 }
 343
 344
 345 /** Called from ctx->Driver.Viewport() */
 346 static void
 347 i915Viewport(GLcontext * ctx,
 348               GLint x, GLint y, GLsizei width, GLsizei height)
 349 {
 350    intelCalcViewport(ctx);
 351
 352    intel_viewport(ctx, x, y, width, height);
 353 }
 354
 355
 356 /** Called from ctx->Driver.DepthRange() */
 357 static void
 358 i915DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
 359 {
 360    intelCalcViewport(ctx);
 361 }
 362
 363
 364 /* =============================================================
 365  * Polygon stipple
 366  *
 367  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 368  * Fortunately stipple is usually a repeating pattern.
 369  */
 370 static void
 371 i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 372 {
 373    struct i915_context *i915 = I915_CONTEXT(ctx);
 374    const GLubyte *m;
 375    GLubyte p[4];
 376    int i, j, k;
 377    int active = (ctx->Polygon.StippleFlag &&
 378                  i915->intel.reduced_primitive == GL_TRIANGLES);
 379    GLuint newMask;
 380
 381    if (active) {
 382       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 383       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 384    }
 385
 386    /* Use the already unpacked stipple data from the context rather than the
 387     * uninterpreted mask passed in.
 388     */
 389    mask = (const GLubyte *)ctx->PolygonStipple;
 390    m = mask;
 391
 392    p[0] = mask[12] & 0xf;
 393    p[0] |= p[0] << 4;
 394    p[1] = mask[8] & 0xf;
 395    p[1] |= p[1] << 4;
 396    p[2] = mask[4] & 0xf;
 397    p[2] |= p[2] << 4;
 398    p[3] = mask[0] & 0xf;
 399    p[3] |= p[3] << 4;
 400
 401    for (k = 0; k < 8; k++)
 402       for (j = 3; j >= 0; j--)
 403          for (i = 0; i < 4; i++, m++)
 404             if (*m != p[j]) {
 405                i915->intel.hw_stipple = 0;
 406                return;
 407             }
 408
 409    newMask = (((p[0] & 0xf) << 0) |
 410               ((p[1] & 0xf) << 4) |
 411               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 412
 413
 414    if (newMask == 0xffff || newMask == 0x0) {
 415       /* this is needed to make conform pass */
 416       i915->intel.hw_stipple = 0;
 417       return;
 418    }
 419
 420    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 421    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 422    i915->intel.hw_stipple = 1;
 423
 424    if (active)
 425       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 426 }
 427
 428
 429 /* =============================================================
 430  * Hardware clipping
 431  */
 432 static void
 433 i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 434 {
 435    struct i915_context *i915 = I915_CONTEXT(ctx);
 436    int x1, y1, x2, y2;
 437
 438    if (!ctx->DrawBuffer)
 439       return;
 440
 441    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 442
 443    if (ctx->DrawBuffer->Name == 0) {
 444       x1 = x;
 445       y1 = ctx->DrawBuffer->Height - (y + h);
 446       x2 = x + w - 1;
 447       y2 = y1 + h - 1;
 448       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 449    }
 450    else {
 451       /* FBO - not inverted
 452        */
 453       x1 = x;
 454       y1 = y;
 455       x2 = x + w - 1;
 456       y2 = y + h - 1;
 457       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 458    }
 459
 460    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 461    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 462    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 463    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 464
 465    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 466
 467    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 468    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 469    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 470 }
 471
 472 static void
 473 i915LogicOp(GLcontext * ctx, GLenum opcode)
 474 {
 475    struct i915_context *i915 = I915_CONTEXT(ctx);
 476    int tmp = intel_translate_logic_op(opcode);
 477
 478    DBG("%s\n", __FUNCTION__);
 479
 480    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 481    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 482    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 483 }
 484
 485
 486
 487 static void
 488 i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 489 {
 490    struct i915_context *i915 = I915_CONTEXT(ctx);
 491    GLuint mode;
 492
 493    DBG("%s %d\n", __FUNCTION__,
 494        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 495
 496    if (!ctx->Polygon.CullFlag) {
 497       mode = S4_CULLMODE_NONE;
 498    }
 499    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 500       mode = S4_CULLMODE_CW;
 501
 502       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 503          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 504       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 505          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 506       if (ctx->Polygon.FrontFace != GL_CCW)
 507          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 508    }
 509    else {
 510       mode = S4_CULLMODE_BOTH;
 511    }
 512
 513    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 514    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 515    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 516 }
 517
 518 static void
 519 i915LineWidth(GLcontext * ctx, GLfloat widthf)
 520 {
 521    struct i915_context *i915 = I915_CONTEXT(ctx);
 522    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 523    int width;
 524
 525    DBG("%s\n", __FUNCTION__);
 526
 527    width = (int) (widthf * 2);
 528    CLAMP_SELF(width, 1, 0xf);
 529    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 530
 531    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 532       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 533       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 534    }
 535 }
 536
 537 static void
 538 i915PointSize(GLcontext * ctx, GLfloat size)
 539 {
 540    struct i915_context *i915 = I915_CONTEXT(ctx);
 541    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 542    GLint point_size = (int) size;
 543
 544    DBG("%s\n", __FUNCTION__);
 545
 546    CLAMP_SELF(point_size, 1, 255);
 547    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 548
 549    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 550       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 551       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 552    }
 553 }
 554
 555
 556 /* =============================================================
 557  * Color masks
 558  */
 559
 560 static void
 561 i915ColorMask(GLcontext * ctx,
 562               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 563 {
 564    struct i915_context *i915 = I915_CONTEXT(ctx);
 565    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 566
 567    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 568        a);
 569
 570    if (!r)
 571       tmp |= S5_WRITEDISABLE_RED;
 572    if (!g)
 573       tmp |= S5_WRITEDISABLE_GREEN;
 574    if (!b)
 575       tmp |= S5_WRITEDISABLE_BLUE;
 576    if (!a)
 577       tmp |= S5_WRITEDISABLE_ALPHA;
 578
 579    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 580       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 581       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 582    }
 583 }
 584
 585 static void
 586 update_specular(GLcontext * ctx)
 587 {
 588    /* A hack to trigger the rebuild of the fragment program.
 589     */
 590    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 591 }
 592
 593 static void
 594 i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 595 {
 596    DBG("%s\n", __FUNCTION__);
 597
 598    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 599       update_specular(ctx);
 600    }
 601 }
 602
 603 static void
 604 i915ShadeModel(GLcontext * ctx, GLenum mode)
 605 {
 606    struct i915_context *i915 = I915_CONTEXT(ctx);
 607    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 608
 609    if (mode == GL_SMOOTH) {
 610       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 611                                              S4_FLATSHADE_COLOR |
 612                                              S4_FLATSHADE_SPECULAR);
 613    }
 614    else {
 615       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 616                                             S4_FLATSHADE_COLOR |
 617                                             S4_FLATSHADE_SPECULAR);
 618    }
 619 }
 620
 621 /* =============================================================
 622  * Fog
 623  */
 624 void
 625 i915_update_fog(GLcontext * ctx)
 626 {
 627    struct i915_context *i915 = I915_CONTEXT(ctx);
 628    GLenum mode;
 629    GLboolean enabled;
 630    GLboolean try_pixel_fog;
 631
 632    if (ctx->FragmentProgram._Current) {
 633       /* Pull in static fog state from program */
 634       mode = ctx->FragmentProgram._Current->FogOption;
 635       enabled = (mode != GL_NONE);
 636       try_pixel_fog = 0;
 637    }
 638    else {
 639       enabled = ctx->Fog.Enabled;
 640       mode = ctx->Fog.Mode;
 641 #if 0
 642       /* XXX - DISABLED -- Need ortho fallback */
 643       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
 644                        && ctx->Hint.Fog == GL_NICEST);
 645 #else
 646       try_pixel_fog = 0;
 647 #endif
 648    }
 649
 650    if (!enabled) {
 651       i915->vertex_fog = I915_FOG_NONE;
 652    }
 653    else if (try_pixel_fog) {
 654       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 655       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 656       i915->vertex_fog = I915_FOG_PIXEL;
 657
 658       switch (mode) {
 659       case GL_LINEAR:
 660          if (ctx->Fog.End <= ctx->Fog.Start) {
 661             /* XXX - this won't work with fragment programs.  Need to
 662              * either fallback or append fog instructions to end of
 663              * program in the case of linear fog.
 664              */
 665             printf("vertex fog!\n");
 666             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 667             i915->vertex_fog = I915_FOG_VERTEX;
 668          }
 669          else {
 670             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 671             GLfloat c1 = ctx->Fog.End * c2;
 672
 673             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 674             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 675             i915->state.Fog[I915_FOGREG_MODE1] |=
 676                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 677
 678             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 679                i915->state.Fog[I915_FOGREG_MODE2]
 680                   = (GLuint) (c2 * FMC2_C2_ONE);
 681             }
 682             else {
 683                fi_type fi;
 684                fi.f = c2;
 685                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 686             }
 687          }
 688          break;
 689       case GL_EXP:
 690          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 691          break;
 692       case GL_EXP2:
 693          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 694          break;
 695       default:
 696          break;
 697       }
 698    }
 699    else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 700       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 701       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 702       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 703       i915->vertex_fog = I915_FOG_VERTEX;
 704    }
 705
 706    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 707    I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 708    if (enabled)
 709       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 710    else
 711       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 712
 713    /* Always enable pixel fog.  Vertex fog using fog coord will conflict
 714     * with fog code appended onto fragment program.
 715     */
 716     _tnl_allow_vertex_fog( ctx, 0 );
 717     _tnl_allow_pixel_fog( ctx, 1 );
 718 }
 719
 720 static void
 721 i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 722 {
 723    struct i915_context *i915 = I915_CONTEXT(ctx);
 724
 725    switch (pname) {
 726    case GL_FOG_COORDINATE_SOURCE_EXT:
 727    case GL_FOG_MODE:
 728    case GL_FOG_START:
 729    case GL_FOG_END:
 730       break;
 731
 732    case GL_FOG_DENSITY:
 733       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 734
 735       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 736          i915->state.Fog[I915_FOGREG_MODE3] =
 737             (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
 738       }
 739       else {
 740          fi_type fi;
 741          fi.f = ctx->Fog.Density;
 742          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 743       }
 744       break;
 745
 746    case GL_FOG_COLOR:
 747       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 748       i915->state.Fog[I915_FOGREG_COLOR] =
 749          (_3DSTATE_FOG_COLOR_CMD |
 750           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 751           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 752           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 753       break;
 754
 755    default:
 756       break;
 757    }
 758 }
 759
 760 static void
 761 i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 762 {
 763    switch (target) {
 764    case GL_FOG_HINT:
 765       break;
 766    default:
 767       break;
 768    }
 769 }
 770
 771 /* =============================================================
 772  */
 773
 774 static void
 775 i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 776 {
 777    struct i915_context *i915 = I915_CONTEXT(ctx);
 778
 779    switch (cap) {
 780    case GL_TEXTURE_2D:
 781       break;
 782
 783    case GL_LIGHTING:
 784    case GL_COLOR_SUM:
 785       update_specular(ctx);
 786       break;
 787
 788    case GL_ALPHA_TEST:
 789       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 790       if (state)
 791          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 792       else
 793          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 794       break;
 795
 796    case GL_BLEND:
 797       i915EvalLogicOpBlendState(ctx);
 798       break;
 799
 800    case GL_COLOR_LOGIC_OP:
 801       i915EvalLogicOpBlendState(ctx);
 802
 803       /* Logicop doesn't seem to work at 16bpp:
 804        */
 805       if (ctx->Visual.rgbBits == 16)
 806          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 807       break;
 808
 809    case GL_FRAGMENT_PROGRAM_ARB:
 810       break;
 811
 812    case GL_DITHER:
 813       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 814       if (state)
 815          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 816       else
 817          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 818       break;
 819
 820    case GL_DEPTH_TEST:
 821       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 822       if (state)
 823          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 824       else
 825          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 826
 827       i915DepthMask(ctx, ctx->Depth.Mask);
 828       break;
 829
 830    case GL_SCISSOR_TEST:
 831       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 832       if (state)
 833          i915->state.Buffer[I915_DESTREG_SENABLE] =
 834             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 835       else
 836          i915->state.Buffer[I915_DESTREG_SENABLE] =
 837             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 838       break;
 839
 840    case GL_LINE_SMOOTH:
 841       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 842       if (state)
 843          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 844       else
 845          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 846       break;
 847
 848    case GL_FOG:
 849       break;
 850
 851    case GL_CULL_FACE:
 852       i915CullFaceFrontFace(ctx, 0);
 853       break;
 854
 855    case GL_STENCIL_TEST:
 856       {
 857          GLboolean hw_stencil = GL_FALSE;
 858          if (ctx->DrawBuffer) {
 859             struct intel_renderbuffer *irbStencil
 860                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 861             hw_stencil = (irbStencil && irbStencil->region);
 862          }
 863          if (hw_stencil) {
 864             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 865             if (state)
 866                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 867                                                      S5_STENCIL_WRITE_ENABLE);
 868             else
 869                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 870                                                       S5_STENCIL_WRITE_ENABLE);
 871          }
 872          else {
 873             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 874          }
 875       }
 876       break;
 877
 878    case GL_POLYGON_STIPPLE:
 879       /* The stipple command worked on my 855GM box, but not my 845G.
 880        * I'll do more testing later to find out exactly which hardware
 881        * supports it.  Disabled for now.
 882        */
 883       if (i915->intel.hw_stipple &&
 884           i915->intel.reduced_primitive == GL_TRIANGLES) {
 885          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 886          if (state)
 887             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 888          else
 889             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 890       }
 891       break;
 892
 893    case GL_POLYGON_SMOOTH:
 894       break;
 895
 896    case GL_POINT_SMOOTH:
 897       break;
 898
 899    default:
 900       ;
 901    }
 902 }
 903
 904
 905 static void
 906 i915_init_packets(struct i915_context *i915)
 907 {
 908    /* Zero all state */
 909    memset(&i915->state, 0, sizeof(i915->state));
 910
 911
 912    {
 913       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 914       /* Probably don't want to upload all this stuff every time one
 915        * piece changes.
 916        */
 917       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 918                                          I1_LOAD_S(2) |
 919                                          I1_LOAD_S(4) |
 920                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 921       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 922       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 923       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 924
 925       if (i915->intel.ctx.Visual.rgbBits == 16)
 926          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 927
 928
 929       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 930                                            (2 << S6_TRISTRIP_PV_SHIFT));
 931
 932       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 933                                              ENABLE_LOGIC_OP_FUNC |
 934                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 935                                              ENABLE_STENCIL_TEST_MASK |
 936                                              STENCIL_TEST_MASK(0xff) |
 937                                              ENABLE_STENCIL_WRITE_MASK |
 938                                              STENCIL_WRITE_MASK(0xff));
 939
 940       i915->state.Ctx[I915_CTXREG_IAB] =
 941          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 942           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 943
 944       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
 945          _3DSTATE_CONST_BLEND_COLOR_CMD;
 946       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
 947
 948    }
 949
 950    {
 951       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 952       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 953    }
 954
 955
 956    {
 957       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 958       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
 959       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
 960                                             FMC1_FOGFUNC_VERTEX |
 961                                             FMC1_FOGINDEX_MODIFY_ENABLE |
 962                                             FMC1_FOGINDEX_W |
 963                                             FMC1_C1_C2_MODIFY_ENABLE |
 964                                             FMC1_DENSITY_MODIFY_ENABLE);
 965       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
 966    }
 967
 968    {
 969       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 970
 971       /* scissor */
 972       i915->state.Buffer[I915_DESTREG_SENABLE] =
 973          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 974       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 975       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 976       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 977    }
 978
 979
 980 #if 0
 981    {
 982       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 983       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 984       i915->state.Default[I915_DEFREG_C1] = 0;
 985       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 986       i915->state.Default[I915_DEFREG_S1] = 0;
 987       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 988       i915->state.Default[I915_DEFREG_Z1] = 0;
 989    }
 990 #endif
 991
 992
 993    /* These will be emitted every at the head of every buffer, unless
 994     * we get hardware contexts working.
 995     */
 996    i915->state.active = (I915_UPLOAD_PROGRAM |
 997                          I915_UPLOAD_STIPPLE |
 998                          I915_UPLOAD_CTX |
 999                          I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
1000 }
1001
1002 void
1003 i915InitStateFunctions(struct dd_function_table *functions)
1004 {
1005    functions->AlphaFunc = i915AlphaFunc;
1006    functions->BlendColor = i915BlendColor;
1007    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1008    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1009    functions->ColorMask = i915ColorMask;
1010    functions->CullFace = i915CullFaceFrontFace;
1011    functions->DepthFunc = i915DepthFunc;
1012    functions->DepthMask = i915DepthMask;
1013    functions->Enable = i915Enable;
1014    functions->Fogfv = i915Fogfv;
1015    functions->FrontFace = i915CullFaceFrontFace;
1016    functions->Hint = i915Hint;
1017    functions->LightModelfv = i915LightModelfv;
1018    functions->LineWidth = i915LineWidth;
1019    functions->LogicOpcode = i915LogicOp;
1020    functions->PointSize = i915PointSize;
1021    functions->PolygonStipple = i915PolygonStipple;
1022    functions->Scissor = i915Scissor;
1023    functions->ShadeModel = i915ShadeModel;
1024    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1025    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1026    functions->StencilOpSeparate = i915StencilOpSeparate;
1027    functions->DepthRange = i915DepthRange;
1028    functions->Viewport = i915Viewport;
1029 }
1030
1031
1032 void
1033 i915InitState(struct i915_context *i915)
1034 {
1035    GLcontext *ctx = &i915->intel.ctx;
1036
1037    i915_init_packets(i915);
1038
1039    _mesa_init_driver_state(ctx);
1040
1041    memcpy(&i915->initial, &i915->state, sizeof(i915->state));
1042    i915->current = &i915->state;
1043 }