src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "main/state.h"
  35 #include "tnl/tnl.h"
  36 #include "tnl/t_context.h"
  37
  38 #include "texmem.h"
  39
  40 #include "drivers/common/driverfuncs.h"
  41
  42 #include "intel_fbo.h"
  43 #include "intel_screen.h"
  44 #include "intel_batchbuffer.h"
  45 #include "intel_buffers.h"
  46
  47 #include "i915_context.h"
  48 #include "i915_reg.h"
  49
  50 #define FILE_DEBUG_FLAG DEBUG_STATE
  51
  52 void
  53 i915_update_stencil(struct gl_context * ctx)
  54 {
  55    struct i915_context *i915 = I915_CONTEXT(ctx);
  56    GLuint front_ref, front_writemask, front_mask;
  57    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  58    GLuint back_ref, back_writemask, back_mask;
  59    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  60    GLuint dirty = 0;
  61
  62    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  63     * appropriately.
  64     */
  65    /* _NEW_POLYGON | _NEW_STENCIL */
  66    if (ctx->Polygon.FrontFace == GL_CW) {
  67       front_ref = ctx->Stencil.Ref[0];
  68       front_mask = ctx->Stencil.ValueMask[0];
  69       front_writemask = ctx->Stencil.WriteMask[0];
  70       front_func = ctx->Stencil.Function[0];
  71       front_fail = ctx->Stencil.FailFunc[0];
  72       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  73       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  74       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  75       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  76       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  77       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  78       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  81    } else {
  82       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  83       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  84       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  85       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  86       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  89       back_ref = ctx->Stencil.Ref[0];
  90       back_mask = ctx->Stencil.ValueMask[0];
  91       back_writemask = ctx->Stencil.WriteMask[0];
  92       back_func = ctx->Stencil.Function[0];
  93       back_fail = ctx->Stencil.FailFunc[0];
  94       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  95       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  96    }
  97 #define set_ctx_bits(reg, mask, set) do{ \
  98    GLuint dw = i915->state.Ctx[reg]; \
  99    dw &= ~(mask); \
 100    dw |= (set); \
 101    dirty |= dw != i915->state.Ctx[reg]; \
 102    i915->state.Ctx[reg] = dw; \
 103 } while(0)
 104
 105    /* Set front state. */
 106    set_ctx_bits(I915_CTXREG_STATE4,
 107                 MODE4_ENABLE_STENCIL_TEST_MASK |
 108                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 109                 ENABLE_STENCIL_TEST_MASK |
 110                 ENABLE_STENCIL_WRITE_MASK |
 111                 STENCIL_TEST_MASK(front_mask) |
 112                 STENCIL_WRITE_MASK(front_writemask));
 113
 114    set_ctx_bits(I915_CTXREG_LIS5,
 115                 S5_STENCIL_REF_MASK |
 116                 S5_STENCIL_TEST_FUNC_MASK |
 117                 S5_STENCIL_FAIL_MASK |
 118                 S5_STENCIL_PASS_Z_FAIL_MASK |
 119                 S5_STENCIL_PASS_Z_PASS_MASK,
 120                 (front_ref << S5_STENCIL_REF_SHIFT) |
 121                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 122                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 123                 (intel_translate_stencil_op(front_pass_z_fail) <<
 124                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 125                 (intel_translate_stencil_op(front_pass_z_pass) <<
 126                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 127
 128    /* Set back state if different from front. */
 129    if (ctx->Stencil._TestTwoSide) {
 130       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 131                    BFO_STENCIL_REF_MASK |
 132                    BFO_STENCIL_TEST_MASK |
 133                    BFO_STENCIL_FAIL_MASK |
 134                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 135                    BFO_STENCIL_PASS_Z_PASS_MASK,
 136                    BFO_STENCIL_TWO_SIDE |
 137                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 138                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 139                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 140                    (intel_translate_stencil_op(back_pass_z_fail) <<
 141                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 142                    (intel_translate_stencil_op(back_pass_z_pass) <<
 143                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 144
 145       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 146                    BFM_STENCIL_TEST_MASK_MASK |
 147                    BFM_STENCIL_WRITE_MASK_MASK,
 148                    BFM_STENCIL_TEST_MASK(back_mask) |
 149                    BFM_STENCIL_WRITE_MASK(back_writemask));
 150    } else {
 151       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 152                    BFO_STENCIL_TWO_SIDE, 0);
 153    }
 154
 155 #undef set_ctx_bits
 156
 157    if (dirty)
 158       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 159 }
 160
 161 static void
 162 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 163                         GLuint mask)
 164 {
 165 }
 166
 167 static void
 168 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 169 {
 170 }
 171
 172 static void
 173 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 174                       GLenum zpass)
 175 {
 176 }
 177
 178 static void
 179 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 180 {
 181    struct i915_context *i915 = I915_CONTEXT(ctx);
 182    int test = intel_translate_compare_func(func);
 183    GLubyte refByte;
 184    GLuint dw;
 185
 186    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 187
 188    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 189    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 190    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 191           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 192    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 193       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 194       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 195    }
 196 }
 197
 198 /* This function makes sure that the proper enables are
 199  * set for LogicOp, Independant Alpha Blend, and Blending.
 200  * It needs to be called from numerous places where we
 201  * could change the LogicOp or Independant Alpha Blend without subsequent
 202  * calls to glEnable.
 203  */
 204 static void
 205 i915EvalLogicOpBlendState(struct gl_context * ctx)
 206 {
 207    struct i915_context *i915 = I915_CONTEXT(ctx);
 208    GLuint dw0, dw1;
 209
 210    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 211    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 212
 213    if (_mesa_rgba_logicop_enabled(ctx)) {
 214       dw0 |= S5_LOGICOP_ENABLE;
 215       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 216    }
 217    else {
 218       dw0 &= ~S5_LOGICOP_ENABLE;
 219
 220       if (ctx->Color.BlendEnabled) {
 221          dw1 |= S6_CBUF_BLEND_ENABLE;
 222       }
 223       else {
 224          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 225       }
 226    }
 227    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 228        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 229       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 230       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 231
 232       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 233    }
 234 }
 235
 236 static void
 237 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 238 {
 239    struct i915_context *i915 = I915_CONTEXT(ctx);
 240    GLubyte r, g, b, a;
 241    GLuint dw;
 242
 243    DBG("%s\n", __FUNCTION__);
 244
 245    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 246    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 247    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 248    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 249
 250    dw = (a << 24) | (r << 16) | (g << 8) | b;
 251    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 252       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 253       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 254    }
 255 }
 256
 257
 258 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 259 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 260 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 261 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 262
 263
 264
 265 static GLuint
 266 translate_blend_equation(GLenum mode)
 267 {
 268    switch (mode) {
 269    case GL_FUNC_ADD:
 270       return BLENDFUNC_ADD;
 271    case GL_MIN:
 272       return BLENDFUNC_MIN;
 273    case GL_MAX:
 274       return BLENDFUNC_MAX;
 275    case GL_FUNC_SUBTRACT:
 276       return BLENDFUNC_SUBTRACT;
 277    case GL_FUNC_REVERSE_SUBTRACT:
 278       return BLENDFUNC_REVERSE_SUBTRACT;
 279    default:
 280       return 0;
 281    }
 282 }
 283
 284 static void
 285 i915UpdateBlendState(struct gl_context * ctx)
 286 {
 287    struct i915_context *i915 = I915_CONTEXT(ctx);
 288    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 289                  ~(IAB_SRC_FACTOR_MASK |
 290                    IAB_DST_FACTOR_MASK |
 291                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 292
 293    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 294                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 295                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 296
 297    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 298    GLuint eqA = ctx->Color.Blend[0].EquationA;
 299    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 300    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 301    GLuint srcA = ctx->Color.Blend[0].SrcA;
 302    GLuint dstA = ctx->Color.Blend[0].DstA;
 303
 304    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 305       srcRGB = dstRGB = GL_ONE;
 306    }
 307
 308    if (eqA == GL_MIN || eqA == GL_MAX) {
 309       srcA = dstA = GL_ONE;
 310    }
 311
 312    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 313    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 314    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 315
 316    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 317    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 318    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 319
 320    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 321       iab |= IAB_ENABLE;
 322
 323    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 324       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 325       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 326    }
 327    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 328       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 329       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 330    }
 331
 332    /* This will catch a logicop blend equation */
 333    i915EvalLogicOpBlendState(ctx);
 334 }
 335
 336
 337 static void
 338 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 339                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 340 {
 341    i915UpdateBlendState(ctx);
 342 }
 343
 344
 345 static void
 346 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 347 {
 348    i915UpdateBlendState(ctx);
 349 }
 350
 351
 352 static void
 353 i915DepthFunc(struct gl_context * ctx, GLenum func)
 354 {
 355    struct i915_context *i915 = I915_CONTEXT(ctx);
 356    int test = intel_translate_compare_func(func);
 357    GLuint dw;
 358
 359    DBG("%s\n", __FUNCTION__);
 360
 361    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 362    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 363    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 364    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 365       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 366       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 367    }
 368 }
 369
 370 static void
 371 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 372 {
 373    struct i915_context *i915 = I915_CONTEXT(ctx);
 374    GLuint dw;
 375
 376    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 377
 378    if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 379       flag = false;
 380
 381    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 382    if (flag && ctx->Depth.Test)
 383       dw |= S6_DEPTH_WRITE_ENABLE;
 384    else
 385       dw &= ~S6_DEPTH_WRITE_ENABLE;
 386    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 387       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 388       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 389    }
 390 }
 391
 392
 393
 394 /**
 395  * Update the viewport transformation matrix.  Depends on:
 396  *  - viewport pos/size
 397  *  - depthrange
 398  *  - window pos/size or FBO size
 399  */
 400 void
 401 intelCalcViewport(struct gl_context * ctx)
 402 {
 403    struct intel_context *intel = intel_context(ctx);
 404    const GLfloat *v = ctx->Viewport._WindowMap.m;
 405    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 406    GLfloat *m = intel->ViewportMatrix.m;
 407    GLfloat yScale, yBias;
 408
 409    if (ctx->DrawBuffer->Name) {
 410       /* User created FBO */
 411       /* y=0=bottom */
 412       yScale = 1.0;
 413       yBias = 0.0;
 414    }
 415    else {
 416       /* window buffer, y=0=top */
 417       yScale = -1.0;
 418       yBias = ctx->DrawBuffer->Height;
 419    }
 420
 421    m[MAT_SX] = v[MAT_SX];
 422    m[MAT_TX] = v[MAT_TX];
 423
 424    m[MAT_SY] = v[MAT_SY] * yScale;
 425    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 426
 427    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 428    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 429 }
 430
 431
 432 /** Called from ctx->Driver.Viewport() */
 433 static void
 434 i915Viewport(struct gl_context * ctx,
 435               GLint x, GLint y, GLsizei width, GLsizei height)
 436 {
 437    intelCalcViewport(ctx);
 438 }
 439
 440
 441 /** Called from ctx->Driver.DepthRange() */
 442 static void
 443 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 444 {
 445    intelCalcViewport(ctx);
 446 }
 447
 448
 449 /* =============================================================
 450  * Polygon stipple
 451  *
 452  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 453  * Fortunately stipple is usually a repeating pattern.
 454  */
 455 static void
 456 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 457 {
 458    struct i915_context *i915 = I915_CONTEXT(ctx);
 459    const GLubyte *m;
 460    GLubyte p[4];
 461    int i, j, k;
 462    int active = (ctx->Polygon.StippleFlag &&
 463                  i915->intel.reduced_primitive == GL_TRIANGLES);
 464    GLuint newMask;
 465
 466    if (active) {
 467       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 468       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 469    }
 470
 471    /* Use the already unpacked stipple data from the context rather than the
 472     * uninterpreted mask passed in.
 473     */
 474    mask = (const GLubyte *)ctx->PolygonStipple;
 475    m = mask;
 476
 477    p[0] = mask[12] & 0xf;
 478    p[0] |= p[0] << 4;
 479    p[1] = mask[8] & 0xf;
 480    p[1] |= p[1] << 4;
 481    p[2] = mask[4] & 0xf;
 482    p[2] |= p[2] << 4;
 483    p[3] = mask[0] & 0xf;
 484    p[3] |= p[3] << 4;
 485
 486    for (k = 0; k < 8; k++)
 487       for (j = 3; j >= 0; j--)
 488          for (i = 0; i < 4; i++, m++)
 489             if (*m != p[j]) {
 490                i915->intel.hw_stipple = 0;
 491                return;
 492             }
 493
 494    newMask = (((p[0] & 0xf) << 0) |
 495               ((p[1] & 0xf) << 4) |
 496               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 497
 498
 499    if (newMask == 0xffff || newMask == 0x0) {
 500       /* this is needed to make conform pass */
 501       i915->intel.hw_stipple = 0;
 502       return;
 503    }
 504
 505    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 506    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 507    i915->intel.hw_stipple = 1;
 508
 509    if (active)
 510       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 511 }
 512
 513
 514 /* =============================================================
 515  * Hardware clipping
 516  */
 517 static void
 518 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 519 {
 520    struct i915_context *i915 = I915_CONTEXT(ctx);
 521    int x1, y1, x2, y2;
 522
 523    if (!ctx->DrawBuffer)
 524       return;
 525
 526    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 527
 528    if (ctx->DrawBuffer->Name == 0) {
 529       x1 = x;
 530       y1 = ctx->DrawBuffer->Height - (y + h);
 531       x2 = x + w - 1;
 532       y2 = y1 + h - 1;
 533       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 534    }
 535    else {
 536       /* FBO - not inverted
 537        */
 538       x1 = x;
 539       y1 = y;
 540       x2 = x + w - 1;
 541       y2 = y + h - 1;
 542       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 543    }
 544
 545    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 546    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 547    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 548    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 549
 550    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 551
 552    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 553    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 554    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 555 }
 556
 557 static void
 558 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 559 {
 560    struct i915_context *i915 = I915_CONTEXT(ctx);
 561    int tmp = intel_translate_logic_op(opcode);
 562
 563    DBG("%s\n", __FUNCTION__);
 564
 565    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 566    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 567    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 568 }
 569
 570
 571
 572 static void
 573 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 574 {
 575    struct i915_context *i915 = I915_CONTEXT(ctx);
 576    GLuint mode, dw;
 577
 578    DBG("%s %d\n", __FUNCTION__,
 579        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 580
 581    if (!ctx->Polygon.CullFlag) {
 582       mode = S4_CULLMODE_NONE;
 583    }
 584    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 585       mode = S4_CULLMODE_CW;
 586
 587       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 588          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 589       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 590          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 591       if (ctx->Polygon.FrontFace != GL_CCW)
 592          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 593    }
 594    else {
 595       mode = S4_CULLMODE_BOTH;
 596    }
 597
 598    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 599    dw &= ~S4_CULLMODE_MASK;
 600    dw |= mode;
 601    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 602       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 603       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 604    }
 605 }
 606
 607 static void
 608 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 609 {
 610    struct i915_context *i915 = I915_CONTEXT(ctx);
 611    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 612    int width;
 613
 614    DBG("%s\n", __FUNCTION__);
 615
 616    width = (int) (widthf * 2);
 617    width = CLAMP(width, 1, 0xf);
 618    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 619
 620    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 621       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 622       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 623    }
 624 }
 625
 626 static void
 627 i915PointSize(struct gl_context * ctx, GLfloat size)
 628 {
 629    struct i915_context *i915 = I915_CONTEXT(ctx);
 630    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 631    GLint point_size = (int) round(size);
 632
 633    DBG("%s\n", __FUNCTION__);
 634
 635    point_size = CLAMP(point_size, 1, 255);
 636    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 637
 638    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 639       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 640       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 641    }
 642 }
 643
 644
 645 static void
 646 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 647 {
 648    struct i915_context *i915 = I915_CONTEXT(ctx);
 649
 650    switch (pname) {
 651    case GL_POINT_SPRITE_COORD_ORIGIN:
 652       /* This could be supported, but it would require modifying the fragment
 653        * program to invert the y component of the texture coordinate by
 654        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 655        */
 656       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 657                (params[0] != GL_UPPER_LEFT));
 658       break;
 659    }
 660 }
 661
 662
 663 /* =============================================================
 664  * Color masks
 665  */
 666
 667 static void
 668 i915ColorMask(struct gl_context * ctx,
 669               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 670 {
 671    struct i915_context *i915 = I915_CONTEXT(ctx);
 672    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 673
 674    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 675        a);
 676
 677    if (!r)
 678       tmp |= S5_WRITEDISABLE_RED;
 679    if (!g)
 680       tmp |= S5_WRITEDISABLE_GREEN;
 681    if (!b)
 682       tmp |= S5_WRITEDISABLE_BLUE;
 683    if (!a)
 684       tmp |= S5_WRITEDISABLE_ALPHA;
 685
 686    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 687       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 688       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 689    }
 690 }
 691
 692 static void
 693 update_specular(struct gl_context * ctx)
 694 {
 695    /* A hack to trigger the rebuild of the fragment program.
 696     */
 697    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 698 }
 699
 700 static void
 701 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 702 {
 703    DBG("%s\n", __FUNCTION__);
 704
 705    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 706       update_specular(ctx);
 707    }
 708 }
 709
 710 static void
 711 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 712 {
 713    struct i915_context *i915 = I915_CONTEXT(ctx);
 714    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 715
 716    if (mode == GL_SMOOTH) {
 717       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 718                                              S4_FLATSHADE_COLOR |
 719                                              S4_FLATSHADE_SPECULAR);
 720    }
 721    else {
 722       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 723                                             S4_FLATSHADE_COLOR |
 724                                             S4_FLATSHADE_SPECULAR);
 725    }
 726 }
 727
 728 /* =============================================================
 729  * Fog
 730  *
 731  * This empty function remains because _mesa_init_driver_state calls
 732  * dd_function_table::Fogfv unconditionally.  We have to have some function
 733  * there so that it doesn't try to call a NULL pointer.
 734  */
 735 static void
 736 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 737 {
 738    (void) ctx;
 739    (void) pname;
 740    (void) param;
 741 }
 742
 743 /* =============================================================
 744  */
 745
 746 static void
 747 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 748 {
 749    struct i915_context *i915 = I915_CONTEXT(ctx);
 750    GLuint dw;
 751
 752    switch (cap) {
 753    case GL_TEXTURE_2D:
 754       break;
 755
 756    case GL_LIGHTING:
 757    case GL_COLOR_SUM:
 758       update_specular(ctx);
 759       break;
 760
 761    case GL_ALPHA_TEST:
 762       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 763       if (state)
 764          dw |= S6_ALPHA_TEST_ENABLE;
 765       else
 766          dw &= ~S6_ALPHA_TEST_ENABLE;
 767       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 768          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 769          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 770       }
 771       break;
 772
 773    case GL_BLEND:
 774       i915EvalLogicOpBlendState(ctx);
 775       break;
 776
 777    case GL_COLOR_LOGIC_OP:
 778       i915EvalLogicOpBlendState(ctx);
 779
 780       /* Logicop doesn't seem to work at 16bpp:
 781        */
 782       if (ctx->Visual.rgbBits == 16)
 783          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 784       break;
 785
 786    case GL_FRAGMENT_PROGRAM_ARB:
 787       break;
 788
 789    case GL_DITHER:
 790       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 791       if (state)
 792          dw |= S5_COLOR_DITHER_ENABLE;
 793       else
 794          dw &= ~S5_COLOR_DITHER_ENABLE;
 795       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 796          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 797          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 798       }
 799       break;
 800
 801    case GL_DEPTH_TEST:
 802       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 803
 804       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 805          state = false;
 806
 807       if (state)
 808          dw |= S6_DEPTH_TEST_ENABLE;
 809       else
 810          dw &= ~S6_DEPTH_TEST_ENABLE;
 811       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 812          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 813          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 814       }
 815
 816       i915DepthMask(ctx, ctx->Depth.Mask);
 817       break;
 818
 819    case GL_SCISSOR_TEST:
 820       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 821       if (state)
 822          i915->state.Buffer[I915_DESTREG_SENABLE] =
 823             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 824       else
 825          i915->state.Buffer[I915_DESTREG_SENABLE] =
 826             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 827       break;
 828
 829    case GL_LINE_SMOOTH:
 830       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 831       if (state)
 832          dw |= S4_LINE_ANTIALIAS_ENABLE;
 833       else
 834          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 835       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 836          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 837          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 838       }
 839       break;
 840
 841    case GL_CULL_FACE:
 842       i915CullFaceFrontFace(ctx, 0);
 843       break;
 844
 845    case GL_STENCIL_TEST:
 846       {
 847          GLboolean hw_stencil = GL_FALSE;
 848          if (ctx->DrawBuffer) {
 849             struct intel_renderbuffer *irbStencil
 850                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 851             hw_stencil = (irbStencil && irbStencil->region);
 852          }
 853          if (hw_stencil) {
 854             dw = i915->state.Ctx[I915_CTXREG_LIS5];
 855             if (state)
 856                dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 857             else
 858                dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 859             if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 860                i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 861                I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 862             }
 863          }
 864          else {
 865             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 866          }
 867       }
 868       break;
 869
 870    case GL_POLYGON_STIPPLE:
 871       /* The stipple command worked on my 855GM box, but not my 845G.
 872        * I'll do more testing later to find out exactly which hardware
 873        * supports it.  Disabled for now.
 874        */
 875       if (i915->intel.hw_stipple &&
 876           i915->intel.reduced_primitive == GL_TRIANGLES) {
 877          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 878          if (state)
 879             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 880          else
 881             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 882       }
 883       break;
 884
 885    case GL_POLYGON_SMOOTH:
 886       break;
 887
 888    case GL_POINT_SPRITE:
 889       /* This state change is handled in i915_reduced_primitive_state because
 890        * the hardware bit should only be set when rendering points.
 891        */
 892          dw = i915->state.Ctx[I915_CTXREG_LIS4];
 893       if (state)
 894          dw |= S4_SPRITE_POINT_ENABLE;
 895       else
 896          dw &= ~S4_SPRITE_POINT_ENABLE;
 897       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 898          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 899          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 900       }
 901       break;
 902
 903    case GL_POINT_SMOOTH:
 904       break;
 905
 906    default:
 907       ;
 908    }
 909 }
 910
 911
 912 static void
 913 i915_init_packets(struct i915_context *i915)
 914 {
 915    /* Zero all state */
 916    memset(&i915->state, 0, sizeof(i915->state));
 917
 918
 919    {
 920       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 921       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 922       /* Probably don't want to upload all this stuff every time one
 923        * piece changes.
 924        */
 925       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 926                                          I1_LOAD_S(2) |
 927                                          I1_LOAD_S(4) |
 928                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 929       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 930       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 931       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 932
 933       if (i915->intel.ctx.Visual.rgbBits == 16)
 934          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 935
 936
 937       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 938                                            (2 << S6_TRISTRIP_PV_SHIFT));
 939
 940       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 941                                              ENABLE_LOGIC_OP_FUNC |
 942                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 943                                              ENABLE_STENCIL_TEST_MASK |
 944                                              STENCIL_TEST_MASK(0xff) |
 945                                              ENABLE_STENCIL_WRITE_MASK |
 946                                              STENCIL_WRITE_MASK(0xff));
 947
 948       i915->state.Blend[I915_BLENDREG_IAB] =
 949          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 950           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 951
 952       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
 953          _3DSTATE_CONST_BLEND_COLOR_CMD;
 954       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 955
 956       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 957          _3DSTATE_BACKFACE_STENCIL_MASKS |
 958          BFM_ENABLE_STENCIL_TEST_MASK |
 959          BFM_ENABLE_STENCIL_WRITE_MASK |
 960          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
 961          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
 962       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
 963          _3DSTATE_BACKFACE_STENCIL_OPS |
 964          BFO_ENABLE_STENCIL_REF |
 965          BFO_ENABLE_STENCIL_FUNCS |
 966          BFO_ENABLE_STENCIL_TWO_SIDE;
 967    }
 968
 969    {
 970       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 971       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 972    }
 973
 974    {
 975       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 976
 977       /* scissor */
 978       i915->state.Buffer[I915_DESTREG_SENABLE] =
 979          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 980       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 981       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 982       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 983    }
 984
 985    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
 986       ENABLE_POINT_RASTER_RULE |
 987       OGL_POINT_RASTER_RULE |
 988       ENABLE_LINE_STRIP_PROVOKE_VRTX |
 989       ENABLE_TRI_FAN_PROVOKE_VRTX |
 990       LINE_STRIP_PROVOKE_VRTX(1) |
 991       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
 992
 993 #if 0
 994    {
 995       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 996       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 997       i915->state.Default[I915_DEFREG_C1] = 0;
 998       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 999       i915->state.Default[I915_DEFREG_S1] = 0;
1000       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1001       i915->state.Default[I915_DEFREG_Z1] = 0;
1002    }
1003 #endif
1004
1005
1006    /* These will be emitted every at the head of every buffer, unless
1007     * we get hardware contexts working.
1008     */
1009    i915->state.active = (I915_UPLOAD_PROGRAM |
1010                          I915_UPLOAD_STIPPLE |
1011                          I915_UPLOAD_CTX |
1012                          I915_UPLOAD_BLEND |
1013                          I915_UPLOAD_BUFFERS |
1014                          I915_UPLOAD_INVARIENT |
1015                          I915_UPLOAD_RASTER_RULES);
1016 }
1017
1018 void
1019 i915_update_provoking_vertex(struct gl_context * ctx)
1020 {
1021    struct i915_context *i915 = I915_CONTEXT(ctx);
1022
1023    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1024    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1025
1026    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1027    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1028                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1029
1030    /* _NEW_LIGHT */
1031    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1032       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1033                                                      TRI_FAN_PROVOKE_VRTX(2));
1034       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1035    } else {
1036       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1037                                                      TRI_FAN_PROVOKE_VRTX(1));
1038       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1039     }
1040 }
1041
1042 void
1043 i915InitStateFunctions(struct dd_function_table *functions)
1044 {
1045    functions->AlphaFunc = i915AlphaFunc;
1046    functions->BlendColor = i915BlendColor;
1047    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1048    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1049    functions->ColorMask = i915ColorMask;
1050    functions->CullFace = i915CullFaceFrontFace;
1051    functions->DepthFunc = i915DepthFunc;
1052    functions->DepthMask = i915DepthMask;
1053    functions->Enable = i915Enable;
1054    functions->Fogfv = i915Fogfv;
1055    functions->FrontFace = i915CullFaceFrontFace;
1056    functions->LightModelfv = i915LightModelfv;
1057    functions->LineWidth = i915LineWidth;
1058    functions->LogicOpcode = i915LogicOp;
1059    functions->PointSize = i915PointSize;
1060    functions->PointParameterfv = i915PointParameterfv;
1061    functions->PolygonStipple = i915PolygonStipple;
1062    functions->Scissor = i915Scissor;
1063    functions->ShadeModel = i915ShadeModel;
1064    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1065    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1066    functions->StencilOpSeparate = i915StencilOpSeparate;
1067    functions->DepthRange = i915DepthRange;
1068    functions->Viewport = i915Viewport;
1069 }
1070
1071
1072 void
1073 i915InitState(struct i915_context *i915)
1074 {
1075    struct gl_context *ctx = &i915->intel.ctx;
1076
1077    i915_init_packets(i915);
1078
1079    _mesa_init_driver_state(ctx);
1080 }