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3 * Copyright 2006 VMware, Inc.
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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28 /** @file i915_tex_layout.c
29 * Code to layout images in a mipmap tree for i830M-GM915 and G945 and beyond.
32 #include "intel_mipmap_tree.h"
33 #include "intel_tex_layout.h"
34 #include "main/macros.h"
35 #include "intel_context.h"
37 #define FILE_DEBUG_FLAG DEBUG_TEXTURE
39 static GLint initial_offsets
[6][2] = {
40 [FACE_POS_X
] = {0, 0},
41 [FACE_POS_Y
] = {1, 0},
42 [FACE_POS_Z
] = {1, 1},
43 [FACE_NEG_X
] = {0, 2},
44 [FACE_NEG_Y
] = {1, 2},
45 [FACE_NEG_Z
] = {1, 3},
49 static GLint step_offsets
[6][2] = {
50 [FACE_POS_X
] = {0, 2},
51 [FACE_POS_Y
] = {-1, 2},
52 [FACE_POS_Z
] = {-1, 1},
53 [FACE_NEG_X
] = {0, 2},
54 [FACE_NEG_Y
] = {-1, 2},
55 [FACE_NEG_Z
] = {-1, 1},
59 static GLint bottom_offsets
[6] = {
60 [FACE_POS_X
] = 16 + 0 * 8,
61 [FACE_POS_Y
] = 16 + 1 * 8,
62 [FACE_POS_Z
] = 16 + 2 * 8,
63 [FACE_NEG_X
] = 16 + 3 * 8,
64 [FACE_NEG_Y
] = 16 + 4 * 8,
65 [FACE_NEG_Z
] = 16 + 5 * 8,
70 * Cube texture map layout for i830M-GM915 and
71 * non-compressed cube texture map on GM945.
73 * Hardware layout looks like:
115 i915_miptree_layout_cube(struct intel_mipmap_tree
* mt
)
117 const GLuint dim
= mt
->physical_width0
;
119 GLuint lvlWidth
= mt
->physical_width0
, lvlHeight
= mt
->physical_height0
;
122 assert(lvlWidth
== lvlHeight
); /* cubemap images are square */
124 /* double pitch for cube layouts */
125 mt
->total_width
= dim
* 2;
126 mt
->total_height
= dim
* 4;
128 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
129 intel_miptree_set_level_info(mt
, level
,
137 for (face
= 0; face
< 6; face
++) {
138 GLuint x
= initial_offsets
[face
][0] * dim
;
139 GLuint y
= initial_offsets
[face
][1] * dim
;
142 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
143 intel_miptree_set_image_offset(mt
, level
, face
, x
, y
);
146 printf("cube mipmap %d/%d (%d..%d) is 0x0\n",
147 face
, level
, mt
->first_level
, mt
->last_level
);
150 x
+= step_offsets
[face
][0] * d
;
151 y
+= step_offsets
[face
][1] * d
;
157 i915_miptree_layout_3d(struct intel_mipmap_tree
* mt
)
159 GLuint width
= mt
->physical_width0
;
160 GLuint height
= mt
->physical_height0
;
161 GLuint depth
= mt
->physical_depth0
;
162 GLuint stack_height
= 0;
165 /* Calculate the size of a single slice. */
166 mt
->total_width
= mt
->physical_width0
;
168 /* XXX: hardware expects/requires 9 levels at minimum. */
169 for (level
= mt
->first_level
; level
<= MAX2(8, mt
->last_level
); level
++) {
170 intel_miptree_set_level_info(mt
, level
, 0, mt
->total_height
,
171 width
, height
, depth
);
173 stack_height
+= MAX2(2, height
);
175 width
= minify(width
, 1);
176 height
= minify(height
, 1);
177 depth
= minify(depth
, 1);
180 /* Fixup depth image_offsets: */
181 depth
= mt
->physical_depth0
;
182 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
184 for (i
= 0; i
< depth
; i
++) {
185 intel_miptree_set_image_offset(mt
, level
, i
,
186 0, i
* stack_height
);
189 depth
= minify(depth
, 1);
192 /* Multiply slice size by texture depth for total size. It's
193 * remarkable how wasteful of memory the i915 texture layouts
194 * are. They are largely fixed in the i945.
196 mt
->total_height
= stack_height
* mt
->physical_depth0
;
200 i915_miptree_layout_2d(struct intel_mipmap_tree
* mt
)
202 GLuint width
= mt
->physical_width0
;
203 GLuint height
= mt
->physical_height0
;
207 mt
->total_width
= mt
->physical_width0
;
208 mt
->total_height
= 0;
210 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
211 intel_miptree_set_level_info(mt
, level
,
216 img_height
= ALIGN(height
, 4) / 4;
218 img_height
= ALIGN(height
, 2);
220 mt
->total_height
+= img_height
;
222 width
= minify(width
, 1);
223 height
= minify(height
, 1);
228 i915_miptree_layout(struct intel_mipmap_tree
* mt
)
230 switch (mt
->target
) {
231 case GL_TEXTURE_CUBE_MAP
:
232 i915_miptree_layout_cube(mt
);
235 i915_miptree_layout_3d(mt
);
239 case GL_TEXTURE_RECTANGLE_ARB
:
240 i915_miptree_layout_2d(mt
);
243 _mesa_problem(NULL
, "Unexpected tex target in i915_miptree_layout()");
247 DBG("%s: %dx%dx%d\n", __FUNCTION__
,
248 mt
->total_width
, mt
->total_height
, mt
->cpp
);
253 * Compressed cube texture map layout for GM945 and later.
255 * The hardware layout looks like the 830-915 layout, except for the small
256 * sizes. A zoomed in view of the layout for 945 is:
298 * +---+ +---+---+---+---+---+---+---+---+---+
299 * |4x4| |4x4| |2x2| |2x2| |2x2| |2x2|
300 * | +z| | -z| | +x| | +y| | +z| | -x| ...
301 * | | | | | | | | | | | |
302 * +---+ +---+ +---+ +---+ +---+ +---+
304 * The bottom row continues with the remaining 2x2 then the 1x1 mip contents
305 * in order, with each of them aligned to a 8x8 block boundary. Thus, for
306 * 32x32 cube maps and smaller, the bottom row layout is going to dictate the
307 * pitch of the tree. For a tree with 4x4 images, the pitch is at least
308 * 14 * 8 = 112 texels, for 2x2 it is at least 12 * 8 texels, and for 1x1
309 * it is 6 * 8 texels.
313 i945_miptree_layout_cube(struct intel_mipmap_tree
* mt
)
315 const GLuint dim
= mt
->physical_width0
;
317 GLuint lvlWidth
= mt
->physical_width0
, lvlHeight
= mt
->physical_height0
;
320 assert(lvlWidth
== lvlHeight
); /* cubemap images are square */
322 /* Depending on the size of the largest images, pitch can be
323 * determined either by the old-style packing of cubemap faces,
324 * or the final row of 4x4, 2x2 and 1x1 faces below this.
327 mt
->total_width
= dim
* 2;
329 mt
->total_width
= 14 * 8;
332 mt
->total_height
= dim
* 4 + 4;
334 mt
->total_height
= 4;
336 /* Set all the levels to effectively occupy the whole rectangular region. */
337 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
338 intel_miptree_set_level_info(mt
, level
,
340 lvlWidth
, lvlHeight
, 6);
345 for (face
= 0; face
< 6; face
++) {
346 GLuint x
= initial_offsets
[face
][0] * dim
;
347 GLuint y
= initial_offsets
[face
][1] * dim
;
350 if (dim
== 4 && face
>= 4) {
351 y
= mt
->total_height
- 4;
353 } else if (dim
< 4 && (face
> 0 || mt
->first_level
> 0)) {
354 y
= mt
->total_height
- 4;
358 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
359 intel_miptree_set_image_offset(mt
, level
, face
, x
, y
);
368 x
+= step_offsets
[face
][0] * d
;
369 y
+= step_offsets
[face
][1] * d
;
378 y
= mt
->total_height
- 4;
385 y
= mt
->total_height
- 4;
386 x
= bottom_offsets
[face
];
394 x
+= step_offsets
[face
][0] * d
;
395 y
+= step_offsets
[face
][1] * d
;
403 i945_miptree_layout_3d(struct intel_mipmap_tree
* mt
)
405 GLuint width
= mt
->physical_width0
;
406 GLuint height
= mt
->physical_height0
;
407 GLuint depth
= mt
->physical_depth0
;
408 GLuint pack_x_pitch
, pack_x_nr
;
412 mt
->total_width
= mt
->physical_width0
;
413 mt
->total_height
= 0;
415 pack_y_pitch
= MAX2(mt
->physical_height0
, 2);
416 pack_x_pitch
= mt
->total_width
;
419 for (level
= mt
->first_level
; level
<= mt
->last_level
; level
++) {
424 intel_miptree_set_level_info(mt
, level
,
426 width
, height
, depth
);
428 for (q
= 0; q
< depth
;) {
429 for (j
= 0; j
< pack_x_nr
&& q
< depth
; j
++, q
++) {
430 intel_miptree_set_image_offset(mt
, level
, q
, x
, y
);
438 mt
->total_height
+= y
;
440 if (pack_x_pitch
> 4) {
443 assert(pack_x_pitch
* pack_x_nr
<= mt
->total_width
);
446 if (pack_y_pitch
> 2) {
450 width
= minify(width
, 1);
451 height
= minify(height
, 1);
452 depth
= minify(depth
, 1);
457 i945_miptree_layout(struct intel_mipmap_tree
* mt
)
459 switch (mt
->target
) {
460 case GL_TEXTURE_CUBE_MAP
:
462 i945_miptree_layout_cube(mt
);
464 i915_miptree_layout_cube(mt
);
467 i945_miptree_layout_3d(mt
);
471 case GL_TEXTURE_RECTANGLE_ARB
:
472 i945_miptree_layout_2d(mt
);
475 _mesa_problem(NULL
, "Unexpected tex target in i945_miptree_layout()");
479 DBG("%s: %dx%dx%d\n", __FUNCTION__
,
480 mt
->total_width
, mt
->total_height
, mt
->cpp
);