Merge branch 'master' of git+ssh://brianp@git.freedesktop.org/git/mesa/mesa
[mesa.git] / src / mesa / drivers / dri / i915 / intel_blit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include <stdio.h>
30 #include <errno.h>
31
32 #include "mtypes.h"
33 #include "context.h"
34 #include "enums.h"
35
36 #include "intel_batchbuffer.h"
37 #include "intel_blit.h"
38 #include "intel_buffers.h"
39 #include "intel_context.h"
40 #include "intel_fbo.h"
41 #include "intel_reg.h"
42 #include "intel_regions.h"
43 #include "vblank.h"
44
45 #define FILE_DEBUG_FLAG DEBUG_BLIT
46
47 /**
48 * Copy the back color buffer to the front color buffer.
49 * Used for SwapBuffers().
50 */
51 void
52 intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
53 const drm_clip_rect_t * rect)
54 {
55
56 struct intel_context *intel;
57 const intelScreenPrivate *intelScreen;
58
59 DBG("%s\n", __FUNCTION__);
60
61 assert(dPriv);
62
63 intel = intelScreenContext(dPriv->driScreenPriv->private);
64 if (!intel)
65 return;
66
67 intelScreen = intel->intelScreen;
68
69 if (intel->last_swap_fence) {
70 dri_fence_wait(intel->last_swap_fence);
71 dri_fence_unreference(intel->last_swap_fence);
72 intel->last_swap_fence = NULL;
73 }
74 intel->last_swap_fence = intel->first_swap_fence;
75 intel->first_swap_fence = NULL;
76
77 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets
78 * should work regardless.
79 */
80 LOCK_HARDWARE(intel);
81
82 if (dPriv && dPriv->numClipRects) {
83 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
84 const struct intel_region *frontRegion
85 = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
86 const struct intel_region *backRegion
87 = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
88 const int nbox = dPriv->numClipRects;
89 const drm_clip_rect_t *pbox = dPriv->pClipRects;
90 const int pitch = frontRegion->pitch;
91 const int cpp = frontRegion->cpp;
92 int BR13, CMD;
93 int i;
94
95 ASSERT(intel_fb);
96 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */
97 ASSERT(frontRegion);
98 ASSERT(backRegion);
99 ASSERT(frontRegion->pitch == backRegion->pitch);
100 ASSERT(frontRegion->cpp == backRegion->cpp);
101
102 if (cpp == 2) {
103 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
104 CMD = XY_SRC_COPY_BLT_CMD;
105 }
106 else {
107 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
108 CMD = (XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
109 }
110
111 for (i = 0; i < nbox; i++, pbox++) {
112 drm_clip_rect_t box;
113
114 if (pbox->x1 > pbox->x2 ||
115 pbox->y1 > pbox->y2 ||
116 pbox->x2 > intelScreen->width || pbox->y2 > intelScreen->height)
117 continue;
118
119 box = *pbox;
120
121 if (rect) {
122 if (rect->x1 > box.x1)
123 box.x1 = rect->x1;
124 if (rect->y1 > box.y1)
125 box.y1 = rect->y1;
126 if (rect->x2 < box.x2)
127 box.x2 = rect->x2;
128 if (rect->y2 < box.y2)
129 box.y2 = rect->y2;
130
131 if (box.x1 > box.x2 || box.y1 > box.y2)
132 continue;
133 }
134
135 BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
136 OUT_BATCH(CMD);
137 OUT_BATCH(BR13);
138 OUT_BATCH((pbox->y1 << 16) | pbox->x1);
139 OUT_BATCH((pbox->y2 << 16) | pbox->x2);
140
141 OUT_RELOC(frontRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
142 0);
143 OUT_BATCH((pbox->y1 << 16) | pbox->x1);
144 OUT_BATCH(BR13 & 0xffff);
145 OUT_RELOC(backRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
146 0);
147
148 ADVANCE_BATCH();
149 }
150
151 if (intel->first_swap_fence)
152 dri_fence_unreference(intel->first_swap_fence);
153 intel_batchbuffer_flush(intel->batch);
154 intel->first_swap_fence = intel->batch->last_fence;
155 dri_fence_reference(intel->first_swap_fence);
156 }
157
158 UNLOCK_HARDWARE(intel);
159 }
160
161
162
163
164 void
165 intelEmitFillBlit(struct intel_context *intel,
166 GLuint cpp,
167 GLshort dst_pitch,
168 dri_bo *dst_buffer,
169 GLuint dst_offset,
170 GLshort x, GLshort y, GLshort w, GLshort h, GLuint color)
171 {
172 GLuint BR13, CMD;
173 BATCH_LOCALS;
174
175 dst_pitch *= cpp;
176
177 switch (cpp) {
178 case 1:
179 case 2:
180 case 3:
181 BR13 = dst_pitch | (0xF0 << 16) | (1 << 24);
182 CMD = XY_COLOR_BLT_CMD;
183 break;
184 case 4:
185 BR13 = dst_pitch | (0xF0 << 16) | (1 << 24) | (1 << 25);
186 CMD = (XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
187 break;
188 default:
189 return;
190 }
191
192 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
193 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h);
194
195
196 BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
197 OUT_BATCH(CMD);
198 OUT_BATCH(BR13);
199 OUT_BATCH((y << 16) | x);
200 OUT_BATCH(((y + h) << 16) | (x + w));
201 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset);
202 OUT_BATCH(color);
203 ADVANCE_BATCH();
204 }
205
206
207 static GLuint translate_raster_op(GLenum logicop)
208 {
209 switch(logicop) {
210 case GL_CLEAR: return 0x00;
211 case GL_AND: return 0x88;
212 case GL_AND_REVERSE: return 0x44;
213 case GL_COPY: return 0xCC;
214 case GL_AND_INVERTED: return 0x22;
215 case GL_NOOP: return 0xAA;
216 case GL_XOR: return 0x66;
217 case GL_OR: return 0xEE;
218 case GL_NOR: return 0x11;
219 case GL_EQUIV: return 0x99;
220 case GL_INVERT: return 0x55;
221 case GL_OR_REVERSE: return 0xDD;
222 case GL_COPY_INVERTED: return 0x33;
223 case GL_OR_INVERTED: return 0xBB;
224 case GL_NAND: return 0x77;
225 case GL_SET: return 0xFF;
226 default: return 0;
227 }
228 }
229
230
231 /* Copy BitBlt
232 */
233 void
234 intelEmitCopyBlit(struct intel_context *intel,
235 GLuint cpp,
236 GLshort src_pitch,
237 dri_bo *src_buffer,
238 GLuint src_offset,
239 GLshort dst_pitch,
240 dri_bo *dst_buffer,
241 GLuint dst_offset,
242 GLshort src_x, GLshort src_y,
243 GLshort dst_x, GLshort dst_y,
244 GLshort w, GLshort h,
245 GLenum logic_op)
246 {
247 GLuint CMD, BR13;
248 int dst_y2 = dst_y + h;
249 int dst_x2 = dst_x + w;
250 BATCH_LOCALS;
251
252
253 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
254 __FUNCTION__,
255 src_buffer, src_pitch, src_offset, src_x, src_y,
256 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
257
258 src_pitch *= cpp;
259 dst_pitch *= cpp;
260
261 switch (cpp) {
262 case 1:
263 case 2:
264 case 3:
265 BR13 = (((GLint) dst_pitch) & 0xffff) |
266 (translate_raster_op(logic_op) << 16) | (1 << 24);
267 CMD = XY_SRC_COPY_BLT_CMD;
268 break;
269 case 4:
270 BR13 =
271 (((GLint) dst_pitch) & 0xffff) |
272 (translate_raster_op(logic_op) << 16) | (1 << 24) | (1 << 25);
273 CMD =
274 (XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
275 break;
276 default:
277 return;
278 }
279
280 if (dst_y2 < dst_y || dst_x2 < dst_x) {
281 return;
282 }
283
284 /* Initial y values don't seem to work with negative pitches. If
285 * we adjust the offsets manually (below), it seems to work fine.
286 *
287 * On the other hand, if we always adjust, the hardware doesn't
288 * know which blit directions to use, so overlapping copypixels get
289 * the wrong result.
290 */
291 if (dst_pitch > 0 && src_pitch > 0) {
292 BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
293 OUT_BATCH(CMD);
294 OUT_BATCH(BR13);
295 OUT_BATCH((dst_y << 16) | dst_x);
296 OUT_BATCH((dst_y2 << 16) | dst_x2);
297 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset);
298 OUT_BATCH((src_y << 16) | src_x);
299 OUT_BATCH(((GLint) src_pitch & 0xffff));
300 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, src_offset);
301 ADVANCE_BATCH();
302 }
303 else {
304 BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
305 OUT_BATCH(CMD);
306 OUT_BATCH(BR13);
307 OUT_BATCH((0 << 16) | dst_x);
308 OUT_BATCH((h << 16) | dst_x2);
309 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
310 dst_offset + dst_y * dst_pitch);
311 OUT_BATCH((0 << 16) | src_x);
312 OUT_BATCH(((GLint) src_pitch & 0xffff));
313 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
314 src_offset + src_y * src_pitch);
315 ADVANCE_BATCH();
316 }
317 }
318
319
320 /**
321 * Use blitting to clear the renderbuffers named by 'flags'.
322 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferMask field
323 * since that might include software renderbuffers or renderbuffers
324 * which we're clearing with triangles.
325 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
326 */
327 void
328 intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
329 {
330 struct intel_context *intel = intel_context(ctx);
331 struct gl_framebuffer *fb = ctx->DrawBuffer;
332 GLuint clear_depth;
333 GLbitfield skipBuffers = 0;
334 BATCH_LOCALS;
335
336 DBG("%s %x\n", __FUNCTION__, mask);
337
338 /*
339 * Compute values for clearing the buffers.
340 */
341 clear_depth = 0;
342 if (mask & BUFFER_BIT_DEPTH) {
343 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
344 }
345 if (mask & BUFFER_BIT_STENCIL) {
346 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
347 }
348
349 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
350 * the loop below.
351 */
352 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
353 skipBuffers = BUFFER_BIT_STENCIL;
354 }
355
356 /* XXX Move this flush/lock into the following conditional? */
357 intelFlush(&intel->ctx);
358 LOCK_HARDWARE(intel);
359
360 if (intel->numClipRects) {
361 GLint cx, cy, cw, ch;
362 drm_clip_rect_t clear;
363 int i;
364
365 /* Get clear bounds after locking */
366 cx = fb->_Xmin;
367 cy = fb->_Ymin;
368 cw = fb->_Xmax - cx;
369 ch = fb->_Ymax - cy;
370
371 if (fb->Name == 0) {
372 /* clearing a window */
373
374 /* flip top to bottom */
375 clear.x1 = cx + intel->drawX;
376 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
377 clear.x2 = clear.x1 + cw;
378 clear.y2 = clear.y1 + ch;
379 }
380 else {
381 /* clearing FBO */
382 assert(intel->numClipRects == 1);
383 assert(intel->pClipRects == &intel->fboRect);
384 clear.x1 = cx;
385 clear.y1 = cy;
386 clear.x2 = clear.x1 + cw;
387 clear.y2 = clear.y1 + ch;
388 /* no change to mask */
389 }
390
391 for (i = 0; i < intel->numClipRects; i++) {
392 const drm_clip_rect_t *box = &intel->pClipRects[i];
393 drm_clip_rect_t b;
394 GLuint buf;
395 GLuint clearMask = mask; /* use copy, since we modify it below */
396 GLboolean all = (cw == fb->Width && ch == fb->Height);
397
398 if (!all) {
399 intel_intersect_cliprects(&b, &clear, box);
400 }
401 else {
402 b = *box;
403 }
404
405 if (0)
406 _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
407 b.x1, b.y1, b.x2, b.y2, mask);
408
409 /* Loop over all renderbuffers */
410 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
411 const GLbitfield bufBit = 1 << buf;
412 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
413 /* OK, clear this renderbuffer */
414 struct intel_region *irb_region =
415 intel_get_rb_region(fb, buf);
416 dri_bo *write_buffer =
417 intel_region_buffer(intel->intelScreen, irb_region,
418 all ? INTEL_WRITE_FULL :
419 INTEL_WRITE_PART);
420
421 GLuint clearVal;
422 GLint pitch, cpp;
423 GLuint BR13, CMD;
424
425 ASSERT(irb_region);
426
427 pitch = irb_region->pitch;
428 cpp = irb_region->cpp;
429
430 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
431 __FUNCTION__,
432 irb_region->buffer, (pitch * cpp),
433 irb_region->draw_offset,
434 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1);
435
436
437 /* Setup the blit command */
438 if (cpp == 4) {
439 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
440 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
441 CMD = XY_COLOR_BLT_CMD;
442 if (clearMask & BUFFER_BIT_DEPTH)
443 CMD |= XY_BLT_WRITE_RGB;
444 if (clearMask & BUFFER_BIT_STENCIL)
445 CMD |= XY_BLT_WRITE_ALPHA;
446 }
447 else {
448 /* clearing RGBA */
449 CMD = XY_COLOR_BLT_CMD |
450 XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
451 }
452 }
453 else {
454 ASSERT(cpp == 2 || cpp == 0);
455 BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
456 CMD = XY_COLOR_BLT_CMD;
457 }
458
459 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
460 clearVal = clear_depth;
461 }
462 else {
463 clearVal = (cpp == 4)
464 ? intel->ClearColor8888 : intel->ClearColor565;
465 }
466 /*
467 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
468 buf, irb->Base.Name);
469 */
470 intel_wait_flips(intel, INTEL_BATCH_NO_CLIPRECTS);
471
472 BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
473 OUT_BATCH(CMD);
474 OUT_BATCH(BR13);
475 OUT_BATCH((b.y1 << 16) | b.x1);
476 OUT_BATCH((b.y2 << 16) | b.x2);
477 OUT_RELOC(write_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
478 irb_region->draw_offset);
479 OUT_BATCH(clearVal);
480 ADVANCE_BATCH();
481 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */
482 }
483 }
484 }
485 intel_batchbuffer_flush(intel->batch);
486 }
487
488 UNLOCK_HARDWARE(intel);
489 }