i915: Remove miscellanous uncalled gen4 code from formerly shared files.
[mesa.git] / src / mesa / drivers / dri / i915 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/mm.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 /* Evil hack for using libdrm in a c++ compiler. */
40 #define virtual virt
41 #endif
42
43 #include "drm.h"
44 #include "intel_bufmgr.h"
45
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
48 #include "i915_drm.h"
49
50 #ifdef __cplusplus
51 #undef virtual
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
58 #undef TAG
59
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
65
66 struct intel_region;
67 struct intel_context;
68
69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70 intelVertex *, intelVertex *);
71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72 intelVertex *);
73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75 /**
76 * Bits for intel->Fallback field
77 */
78 /*@{*/
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
87 /*@}*/
88
89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90 bool mode);
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
97
98 #define INTEL_MAX_FIXUP 64
99
100 #ifndef likely
101 #ifdef __GNUC__
102 #define likely(expr) (__builtin_expect(expr, 1))
103 #define unlikely(expr) (__builtin_expect(expr, 0))
104 #else
105 #define likely(expr) (expr)
106 #define unlikely(expr) (expr)
107 #endif
108 #endif
109
110 struct intel_sync_object {
111 struct gl_sync_object Base;
112
113 /** Batch associated with this sync object */
114 drm_intel_bo *bo;
115 };
116
117 struct brw_context;
118
119 struct intel_batchbuffer {
120 /** Current batchbuffer being queued up. */
121 drm_intel_bo *bo;
122 /** Last BO submitted to the hardware. Used for glFinish(). */
123 drm_intel_bo *last_bo;
124
125 struct cached_batch_item *cached_items;
126
127 uint16_t emit, total;
128 uint16_t used, reserved_space;
129 uint32_t *map;
130 uint32_t *cpu_map;
131 #define BATCH_SZ (8192*sizeof(uint32_t))
132
133 uint32_t state_batch_offset;
134 bool is_blit;
135 bool needs_sol_reset;
136 };
137
138 /**
139 * intel_context is derived from Mesa's context class: struct gl_context.
140 */
141 struct intel_context
142 {
143 struct gl_context ctx; /**< base class, must be first field */
144
145 struct
146 {
147 void (*destroy) (struct intel_context * intel);
148 void (*emit_state) (struct intel_context * intel);
149 void (*finish_batch) (struct intel_context * intel);
150 void (*new_batch) (struct intel_context * intel);
151 void (*emit_invarient_state) (struct intel_context * intel);
152 void (*update_texture_state) (struct intel_context * intel);
153
154 void (*render_start) (struct intel_context * intel);
155 void (*render_prevalidate) (struct intel_context * intel);
156 void (*set_draw_region) (struct intel_context * intel,
157 struct intel_region * draw_regions[],
158 struct intel_region * depth_region,
159 GLuint num_regions);
160 void (*update_draw_buffer)(struct intel_context *intel);
161
162 void (*reduced_primitive_state) (struct intel_context * intel,
163 GLenum rprim);
164
165 bool (*check_vertex_size) (struct intel_context * intel,
166 GLuint expected);
167 void (*invalidate_state) (struct intel_context *intel,
168 GLuint new_state);
169
170 void (*assert_not_dirty) (struct intel_context *intel);
171
172 void (*debug_batch)(struct intel_context *intel);
173 void (*annotate_aub)(struct intel_context *intel);
174 bool (*render_target_supported)(struct intel_context *intel,
175 struct gl_renderbuffer *rb);
176
177 /**
178 * Surface state operations (i965+ only)
179 * \{
180 */
181 void (*update_texture_surface)(struct gl_context *ctx,
182 unsigned unit,
183 uint32_t *binding_table,
184 unsigned surf_index);
185 void (*update_renderbuffer_surface)(struct brw_context *brw,
186 struct gl_renderbuffer *rb,
187 bool layered,
188 unsigned unit);
189 void (*update_null_renderbuffer_surface)(struct brw_context *brw,
190 unsigned unit);
191 void (*create_constant_surface)(struct brw_context *brw,
192 drm_intel_bo *bo,
193 uint32_t offset,
194 uint32_t size,
195 uint32_t *out_offset,
196 bool dword_pitch);
197 /** \} */
198 } vtbl;
199
200 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
201 GLuint NewGLState;
202
203 dri_bufmgr *bufmgr;
204 unsigned int maxBatchSize;
205
206 /**
207 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
208 */
209 int gen;
210 int gt;
211 bool is_haswell;
212 bool is_baytrail;
213 bool is_g4x;
214 bool is_945;
215 bool has_llc;
216 bool has_swizzling;
217
218 int urb_size;
219
220 drm_intel_context *hw_ctx;
221
222 struct intel_batchbuffer batch;
223
224 drm_intel_bo *first_post_swapbuffers_batch;
225 bool need_throttle;
226 bool no_batch_wrap;
227 bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
228
229 /**
230 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
231 * variable is set, this is the flag indicating to do expensive work that
232 * might lead to a perf_debug() call.
233 */
234 bool perf_debug;
235
236 struct
237 {
238 GLuint id;
239 uint32_t start_ptr; /**< for i8xx */
240 uint32_t primitive; /**< Current hardware primitive type */
241 void (*flush) (struct intel_context *);
242 drm_intel_bo *vb_bo;
243 uint8_t *vb;
244 unsigned int start_offset; /**< Byte offset of primitive sequence */
245 unsigned int current_offset; /**< Byte offset of next vertex */
246 unsigned int count; /**< Number of vertices in current primitive */
247 } prim;
248
249 struct {
250 drm_intel_bo *bo;
251 GLuint offset;
252 uint32_t buffer_len;
253 uint32_t buffer_offset;
254 char buffer[4096];
255 } upload;
256
257 uint32_t max_gtt_map_object_size;
258
259 GLuint stats_wm;
260
261 /* Offsets of fields within the current vertex:
262 */
263 GLuint coloroffset;
264 GLuint specoffset;
265 GLuint wpos_offset;
266
267 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
268 GLuint vertex_attr_count;
269
270 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
271
272 bool hw_stencil;
273 bool hw_stipple;
274 bool no_rast;
275 bool always_flush_batch;
276 bool always_flush_cache;
277 bool disable_throttling;
278
279 /* State for intelvb.c and inteltris.c.
280 */
281 GLuint RenderIndex;
282 GLmatrix ViewportMatrix;
283 GLenum render_primitive;
284 GLenum reduced_primitive; /*< Only gen < 6 */
285 GLuint vertex_size;
286 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
287
288 /* Fallback rasterization functions
289 */
290 intel_point_func draw_point;
291 intel_line_func draw_line;
292 intel_tri_func draw_tri;
293
294 /**
295 * Set if rendering has occured to the drawable's front buffer.
296 *
297 * This is used in the DRI2 case to detect that glFlush should also copy
298 * the contents of the fake front buffer to the real front buffer.
299 */
300 bool front_buffer_dirty;
301
302 /**
303 * Track whether front-buffer rendering is currently enabled
304 *
305 * A separate flag is used to track this in order to support MRT more
306 * easily.
307 */
308 bool is_front_buffer_rendering;
309 /**
310 * Track whether front-buffer is the current read target.
311 *
312 * This is closely associated with is_front_buffer_rendering, but may
313 * be set separately. The DRI2 fake front buffer must be referenced
314 * either way.
315 */
316 bool is_front_buffer_reading;
317
318 bool use_early_z;
319
320 int driFd;
321
322 __DRIcontext *driContext;
323 struct intel_screen *intelScreen;
324 void (*saved_viewport)(struct gl_context * ctx,
325 GLint x, GLint y, GLsizei width, GLsizei height);
326
327 /**
328 * Configuration cache
329 */
330 driOptionCache optionCache;
331 };
332
333 extern char *__progname;
334
335
336 #define SUBPIXEL_X 0.125
337 #define SUBPIXEL_Y 0.125
338
339 /**
340 * Align a value down to an alignment value
341 *
342 * If \c value is not already aligned to the requested alignment value, it
343 * will be rounded down.
344 *
345 * \param value Value to be rounded
346 * \param alignment Alignment value to be used. This must be a power of two.
347 *
348 * \sa ALIGN()
349 */
350 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
351
352 static INLINE uint32_t
353 U_FIXED(float value, uint32_t frac_bits)
354 {
355 value *= (1 << frac_bits);
356 return value < 0 ? 0 : value;
357 }
358
359 static INLINE uint32_t
360 S_FIXED(float value, uint32_t frac_bits)
361 {
362 return value * (1 << frac_bits);
363 }
364
365 #define INTEL_FIREVERTICES(intel) \
366 do { \
367 if ((intel)->prim.flush) \
368 (intel)->prim.flush(intel); \
369 } while (0)
370
371 /* ================================================================
372 * From linux kernel i386 header files, copes with odd sizes better
373 * than COPY_DWORDS would:
374 * XXX Put this in src/mesa/main/imports.h ???
375 */
376 #if defined(i386) || defined(__i386__)
377 static INLINE void * __memcpy(void * to, const void * from, size_t n)
378 {
379 int d0, d1, d2;
380 __asm__ __volatile__(
381 "rep ; movsl\n\t"
382 "testb $2,%b4\n\t"
383 "je 1f\n\t"
384 "movsw\n"
385 "1:\ttestb $1,%b4\n\t"
386 "je 2f\n\t"
387 "movsb\n"
388 "2:"
389 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
390 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
391 : "memory");
392 return (to);
393 }
394 #else
395 #define __memcpy(a,b,c) memcpy(a,b,c)
396 #endif
397
398
399 /* ================================================================
400 * Debugging:
401 */
402 extern int INTEL_DEBUG;
403
404 #define DEBUG_TEXTURE 0x1
405 #define DEBUG_STATE 0x2
406 #define DEBUG_IOCTL 0x4
407 #define DEBUG_BLIT 0x8
408 #define DEBUG_MIPTREE 0x10
409 #define DEBUG_PERF 0x20
410 #define DEBUG_BATCH 0x80
411 #define DEBUG_PIXEL 0x100
412 #define DEBUG_BUFMGR 0x200
413 #define DEBUG_REGION 0x400
414 #define DEBUG_FBO 0x800
415 #define DEBUG_GS 0x1000
416 #define DEBUG_SYNC 0x2000
417 #define DEBUG_PRIMS 0x4000
418 #define DEBUG_VERTS 0x8000
419 #define DEBUG_DRI 0x10000
420 #define DEBUG_SF 0x20000
421 #define DEBUG_STATS 0x100000
422 #define DEBUG_WM 0x400000
423 #define DEBUG_URB 0x800000
424 #define DEBUG_VS 0x1000000
425 #define DEBUG_CLIP 0x2000000
426 #define DEBUG_AUB 0x4000000
427 #define DEBUG_BLORP 0x10000000
428 #define DEBUG_NO16 0x20000000
429
430 #ifdef HAVE_ANDROID_PLATFORM
431 #define LOG_TAG "INTEL-MESA"
432 #include <cutils/log.h>
433 #ifndef ALOGW
434 #define ALOGW LOGW
435 #endif
436 #define dbg_printf(...) ALOGW(__VA_ARGS__)
437 #else
438 #define dbg_printf(...) printf(__VA_ARGS__)
439 #endif /* HAVE_ANDROID_PLATFORM */
440
441 #define DBG(...) do { \
442 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
443 dbg_printf(__VA_ARGS__); \
444 } while(0)
445
446 #define perf_debug(...) do { \
447 static GLuint msg_id = 0; \
448 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
449 dbg_printf(__VA_ARGS__); \
450 if (intel->perf_debug) \
451 _mesa_gl_debug(&intel->ctx, &msg_id, \
452 MESA_DEBUG_TYPE_PERFORMANCE, \
453 MESA_DEBUG_SEVERITY_MEDIUM, \
454 __VA_ARGS__); \
455 } while(0)
456
457 #define WARN_ONCE(cond, fmt...) do { \
458 if (unlikely(cond)) { \
459 static bool _warned = false; \
460 static GLuint msg_id = 0; \
461 if (!_warned) { \
462 fprintf(stderr, "WARNING: "); \
463 fprintf(stderr, fmt); \
464 _warned = true; \
465 \
466 _mesa_gl_debug(ctx, &msg_id, \
467 MESA_DEBUG_TYPE_OTHER, \
468 MESA_DEBUG_SEVERITY_HIGH, fmt); \
469 } \
470 } \
471 } while (0)
472
473 #define PCI_CHIP_845_G 0x2562
474 #define PCI_CHIP_I830_M 0x3577
475 #define PCI_CHIP_I855_GM 0x3582
476 #define PCI_CHIP_I865_G 0x2572
477 #define PCI_CHIP_I915_G 0x2582
478 #define PCI_CHIP_I915_GM 0x2592
479 #define PCI_CHIP_I945_G 0x2772
480 #define PCI_CHIP_I945_GM 0x27A2
481 #define PCI_CHIP_I945_GME 0x27AE
482 #define PCI_CHIP_G33_G 0x29C2
483 #define PCI_CHIP_Q35_G 0x29B2
484 #define PCI_CHIP_Q33_G 0x29D2
485
486
487 /* ================================================================
488 * intel_context.c:
489 */
490
491 extern bool intelInitContext(struct intel_context *intel,
492 int api,
493 unsigned major_version,
494 unsigned minor_version,
495 const struct gl_config * mesaVis,
496 __DRIcontext * driContextPriv,
497 void *sharedContextPrivate,
498 struct dd_function_table *functions,
499 unsigned *dri_ctx_error);
500
501 extern void intelFinish(struct gl_context * ctx);
502 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
503 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
504
505 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
506
507 extern void intelInitDriverFunctions(struct dd_function_table *functions);
508
509 void intel_init_syncobj_functions(struct dd_function_table *functions);
510
511
512 /* ================================================================
513 * intel_state.c:
514 */
515
516 #define COMPAREFUNC_ALWAYS 0
517 #define COMPAREFUNC_NEVER 0x1
518 #define COMPAREFUNC_LESS 0x2
519 #define COMPAREFUNC_EQUAL 0x3
520 #define COMPAREFUNC_LEQUAL 0x4
521 #define COMPAREFUNC_GREATER 0x5
522 #define COMPAREFUNC_NOTEQUAL 0x6
523 #define COMPAREFUNC_GEQUAL 0x7
524
525 #define STENCILOP_KEEP 0
526 #define STENCILOP_ZERO 0x1
527 #define STENCILOP_REPLACE 0x2
528 #define STENCILOP_INCRSAT 0x3
529 #define STENCILOP_DECRSAT 0x4
530 #define STENCILOP_INCR 0x5
531 #define STENCILOP_DECR 0x6
532 #define STENCILOP_INVERT 0x7
533
534 #define LOGICOP_CLEAR 0
535 #define LOGICOP_NOR 0x1
536 #define LOGICOP_AND_INV 0x2
537 #define LOGICOP_COPY_INV 0x3
538 #define LOGICOP_AND_RVRSE 0x4
539 #define LOGICOP_INV 0x5
540 #define LOGICOP_XOR 0x6
541 #define LOGICOP_NAND 0x7
542 #define LOGICOP_AND 0x8
543 #define LOGICOP_EQUIV 0x9
544 #define LOGICOP_NOOP 0xa
545 #define LOGICOP_OR_INV 0xb
546 #define LOGICOP_COPY 0xc
547 #define LOGICOP_OR_RVRSE 0xd
548 #define LOGICOP_OR 0xe
549 #define LOGICOP_SET 0xf
550
551 #define BLENDFACT_ZERO 0x01
552 #define BLENDFACT_ONE 0x02
553 #define BLENDFACT_SRC_COLR 0x03
554 #define BLENDFACT_INV_SRC_COLR 0x04
555 #define BLENDFACT_SRC_ALPHA 0x05
556 #define BLENDFACT_INV_SRC_ALPHA 0x06
557 #define BLENDFACT_DST_ALPHA 0x07
558 #define BLENDFACT_INV_DST_ALPHA 0x08
559 #define BLENDFACT_DST_COLR 0x09
560 #define BLENDFACT_INV_DST_COLR 0x0a
561 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
562 #define BLENDFACT_CONST_COLOR 0x0c
563 #define BLENDFACT_INV_CONST_COLOR 0x0d
564 #define BLENDFACT_CONST_ALPHA 0x0e
565 #define BLENDFACT_INV_CONST_ALPHA 0x0f
566 #define BLENDFACT_MASK 0x0f
567
568 enum {
569 DRI_CONF_BO_REUSE_DISABLED,
570 DRI_CONF_BO_REUSE_ALL
571 };
572
573 extern int intel_translate_shadow_compare_func(GLenum func);
574 extern int intel_translate_compare_func(GLenum func);
575 extern int intel_translate_stencil_op(GLenum op);
576 extern int intel_translate_blend_factor(GLenum factor);
577 extern int intel_translate_logic_op(GLenum opcode);
578
579 void intel_update_renderbuffers(__DRIcontext *context,
580 __DRIdrawable *drawable);
581 void intel_prepare_render(struct intel_context *intel);
582
583 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
584 uint32_t buffer_id);
585 void intel_init_texture_formats(struct gl_context *ctx);
586
587 /*======================================================================
588 * Inline conversion functions.
589 * These are better-typed than the macros used previously:
590 */
591 static INLINE struct intel_context *
592 intel_context(struct gl_context * ctx)
593 {
594 return (struct intel_context *) ctx;
595 }
596
597 static INLINE bool
598 is_power_of_two(uint32_t value)
599 {
600 return (value & (value - 1)) == 0;
601 }
602
603 #ifdef __cplusplus
604 }
605 #endif
606
607 #endif