i915: Remove unused fields intel_mipmap_tree::logical_(width|height|depth)0
[mesa.git] / src / mesa / drivers / dri / i915 / intel_mipmap_tree.c
1 /**************************************************************************
2 *
3 * Copyright 2006 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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26 **************************************************************************/
27
28 #include <GL/gl.h>
29 #include <GL/internal/dri_interface.h>
30
31 #include "intel_batchbuffer.h"
32 #include "intel_chipset.h"
33 #include "intel_context.h"
34 #include "intel_mipmap_tree.h"
35 #include "intel_regions.h"
36 #include "intel_tex_layout.h"
37 #include "intel_tex.h"
38 #include "intel_blit.h"
39
40 #include "main/enums.h"
41 #include "main/formats.h"
42 #include "main/glformats.h"
43 #include "main/teximage.h"
44
45 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
46
47 static GLenum
48 target_to_target(GLenum target)
49 {
50 switch (target) {
51 case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
52 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
53 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
54 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
55 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
56 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
57 return GL_TEXTURE_CUBE_MAP_ARB;
58 default:
59 return target;
60 }
61 }
62
63 struct intel_mipmap_tree *
64 intel_miptree_create_layout(struct intel_context *intel,
65 GLenum target,
66 mesa_format format,
67 GLuint first_level,
68 GLuint last_level,
69 GLuint width0,
70 GLuint height0,
71 GLuint depth0)
72 {
73 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
74 if (!mt)
75 return NULL;
76
77 DBG("%s target %s format %s level %d..%d <-- %p\n", __func__,
78 _mesa_enum_to_string(target),
79 _mesa_get_format_name(format),
80 first_level, last_level, mt);
81
82 mt->target = target_to_target(target);
83 mt->format = format;
84 mt->first_level = first_level;
85 mt->last_level = last_level;
86
87 /* The cpp is bytes per (1, blockheight)-sized block for compressed
88 * textures. This is why you'll see divides by blockheight all over
89 */
90 unsigned bw, bh;
91 _mesa_get_format_block_size(format, &bw, &bh);
92 assert(_mesa_get_format_bytes(mt->format) % bw == 0);
93 mt->cpp = _mesa_get_format_bytes(mt->format) / bw;
94
95 mt->compressed = _mesa_is_format_compressed(format);
96 mt->refcount = 1;
97
98 if (target == GL_TEXTURE_CUBE_MAP) {
99 assert(depth0 == 1);
100 depth0 = 6;
101 }
102
103 mt->physical_width0 = width0;
104 mt->physical_height0 = height0;
105 mt->physical_depth0 = depth0;
106
107 intel_get_texture_alignment_unit(intel, mt->format,
108 &mt->align_w, &mt->align_h);
109
110 if (intel->is_945)
111 i945_miptree_layout(mt);
112 else
113 i915_miptree_layout(mt);
114
115 return mt;
116 }
117
118 /**
119 * \brief Helper function for intel_miptree_create().
120 */
121 static uint32_t
122 intel_miptree_choose_tiling(struct intel_context *intel,
123 mesa_format format,
124 uint32_t width0,
125 enum intel_miptree_tiling_mode requested,
126 struct intel_mipmap_tree *mt)
127 {
128 /* Some usages may want only one type of tiling, like depth miptrees (Y
129 * tiled), or temporary BOs for uploading data once (linear).
130 */
131 switch (requested) {
132 case INTEL_MIPTREE_TILING_ANY:
133 break;
134 case INTEL_MIPTREE_TILING_Y:
135 return I915_TILING_Y;
136 case INTEL_MIPTREE_TILING_NONE:
137 return I915_TILING_NONE;
138 }
139
140 int minimum_pitch = mt->total_width * mt->cpp;
141
142 /* If the width is much smaller than a tile, don't bother tiling. */
143 if (minimum_pitch < 64)
144 return I915_TILING_NONE;
145
146 if (ALIGN(minimum_pitch, 512) >= 32768) {
147 perf_debug("%dx%d miptree too large to blit, falling back to untiled",
148 mt->total_width, mt->total_height);
149 return I915_TILING_NONE;
150 }
151
152 /* We don't have BLORP to handle Y-tiled blits, so use X-tiling. */
153 return I915_TILING_X;
154 }
155
156 struct intel_mipmap_tree *
157 intel_miptree_create(struct intel_context *intel,
158 GLenum target,
159 mesa_format format,
160 GLuint first_level,
161 GLuint last_level,
162 GLuint width0,
163 GLuint height0,
164 GLuint depth0,
165 bool expect_accelerated_upload,
166 enum intel_miptree_tiling_mode requested_tiling)
167 {
168 struct intel_mipmap_tree *mt;
169 GLuint total_width, total_height;
170
171
172 mt = intel_miptree_create_layout(intel, target, format,
173 first_level, last_level, width0,
174 height0, depth0);
175
176 /* pitch == 0 || height == 0 indicates the null texture */
177 if (!mt || !mt->total_width || !mt->total_height) {
178 intel_miptree_release(&mt);
179 return NULL;
180 }
181
182 total_width = mt->total_width;
183 total_height = mt->total_height;
184
185 uint32_t tiling = intel_miptree_choose_tiling(intel, format, width0,
186 requested_tiling,
187 mt);
188 bool y_or_x = tiling == (I915_TILING_Y | I915_TILING_X);
189
190 mt->region = intel_region_alloc(intel->intelScreen,
191 y_or_x ? I915_TILING_Y : tiling,
192 mt->cpp,
193 total_width,
194 total_height,
195 expect_accelerated_upload);
196
197 /* If the region is too large to fit in the aperture, we need to use the
198 * BLT engine to support it. The BLT paths can't currently handle Y-tiling,
199 * so we need to fall back to X.
200 */
201 if (y_or_x && mt->region->bo->size >= intel->max_gtt_map_object_size) {
202 perf_debug("%dx%d miptree larger than aperture; falling back to X-tiled\n",
203 mt->total_width, mt->total_height);
204 intel_region_release(&mt->region);
205
206 mt->region = intel_region_alloc(intel->intelScreen,
207 I915_TILING_X,
208 mt->cpp,
209 total_width,
210 total_height,
211 expect_accelerated_upload);
212 }
213
214 mt->offset = 0;
215
216 if (!mt->region) {
217 intel_miptree_release(&mt);
218 return NULL;
219 }
220
221 return mt;
222 }
223
224 struct intel_mipmap_tree *
225 intel_miptree_create_for_bo(struct intel_context *intel,
226 drm_intel_bo *bo,
227 mesa_format format,
228 uint32_t offset,
229 uint32_t width,
230 uint32_t height,
231 int pitch,
232 uint32_t tiling)
233 {
234 struct intel_mipmap_tree *mt;
235
236 struct intel_region *region = calloc(1, sizeof(*region));
237 if (!region)
238 return NULL;
239
240 /* Nothing will be able to use this miptree with the BO if the offset isn't
241 * aligned.
242 */
243 if (tiling != I915_TILING_NONE)
244 assert(offset % 4096 == 0);
245
246 /* miptrees can't handle negative pitch. If you need flipping of images,
247 * that's outside of the scope of the mt.
248 */
249 assert(pitch >= 0);
250
251 mt = intel_miptree_create_layout(intel, GL_TEXTURE_2D, format,
252 0, 0,
253 width, height, 1);
254 if (!mt) {
255 free(region);
256 return mt;
257 }
258
259 region->cpp = mt->cpp;
260 region->width = width;
261 region->height = height;
262 region->pitch = pitch;
263 region->refcount = 1;
264 drm_intel_bo_reference(bo);
265 region->bo = bo;
266 region->tiling = tiling;
267
268 mt->region = region;
269 mt->offset = offset;
270
271 return mt;
272 }
273
274
275 /**
276 * Wraps the given region with a miptree.
277 */
278 struct intel_mipmap_tree *
279 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
280 unsigned dri_attachment,
281 mesa_format format,
282 struct intel_region *region)
283 {
284 struct intel_mipmap_tree *mt = NULL;
285
286 /* Only the front and back buffers, which are color buffers, are shared
287 * through DRI2.
288 */
289 assert(dri_attachment == __DRI_BUFFER_BACK_LEFT ||
290 dri_attachment == __DRI_BUFFER_FRONT_LEFT ||
291 dri_attachment == __DRI_BUFFER_FAKE_FRONT_LEFT);
292 assert(_mesa_get_format_base_format(format) == GL_RGB ||
293 _mesa_get_format_base_format(format) == GL_RGBA);
294
295 mt = intel_miptree_create_for_bo(intel,
296 region->bo,
297 format,
298 0,
299 region->width,
300 region->height,
301 region->pitch,
302 region->tiling);
303 if (!mt)
304 return NULL;
305 mt->region->name = region->name;
306
307 return mt;
308 }
309
310 /**
311 * Wraps the given region with a miptree.
312 */
313 struct intel_mipmap_tree *
314 intel_miptree_create_for_image_buffer(struct intel_context *intel,
315 enum __DRIimageBufferMask buffer_type,
316 mesa_format format,
317 uint32_t num_samples,
318 struct intel_region *region)
319 {
320 struct intel_mipmap_tree *mt = NULL;
321
322 /* Only the front and back buffers, which are color buffers, are allocated
323 * through the image loader.
324 */
325 assert(_mesa_get_format_base_format(format) == GL_RGB ||
326 _mesa_get_format_base_format(format) == GL_RGBA);
327
328 mt = intel_miptree_create_for_bo(intel,
329 region->bo,
330 format,
331 0,
332 region->width,
333 region->height,
334 region->pitch,
335 region->tiling);
336 return mt;
337 }
338
339 struct intel_mipmap_tree *
340 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
341 mesa_format format,
342 uint32_t width,
343 uint32_t height)
344 {
345 uint32_t depth = 1;
346
347 return intel_miptree_create(intel, GL_TEXTURE_2D, format, 0, 0,
348 width, height, depth, true,
349 INTEL_MIPTREE_TILING_ANY);
350 }
351
352 void
353 intel_miptree_reference(struct intel_mipmap_tree **dst,
354 struct intel_mipmap_tree *src)
355 {
356 if (*dst == src)
357 return;
358
359 intel_miptree_release(dst);
360
361 if (src) {
362 src->refcount++;
363 DBG("%s %p refcount now %d\n", __func__, src, src->refcount);
364 }
365
366 *dst = src;
367 }
368
369
370 void
371 intel_miptree_release(struct intel_mipmap_tree **mt)
372 {
373 if (!*mt)
374 return;
375
376 DBG("%s %p refcount will be %d\n", __func__, *mt, (*mt)->refcount - 1);
377 if (--(*mt)->refcount <= 0) {
378 GLuint i;
379
380 DBG("%s deleting %p\n", __func__, *mt);
381
382 intel_region_release(&((*mt)->region));
383
384 for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
385 free((*mt)->level[i].slice);
386 }
387
388 free(*mt);
389 }
390 *mt = NULL;
391 }
392
393 void
394 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
395 int *width, int *height, int *depth)
396 {
397 switch (image->TexObject->Target) {
398 case GL_TEXTURE_1D_ARRAY:
399 *width = image->Width;
400 *height = 1;
401 *depth = image->Height;
402 break;
403 default:
404 *width = image->Width;
405 *height = image->Height;
406 *depth = image->Depth;
407 break;
408 }
409 }
410
411 /**
412 * Can the image be pulled into a unified mipmap tree? This mirrors
413 * the completeness test in a lot of ways.
414 *
415 * Not sure whether I want to pass gl_texture_image here.
416 */
417 bool
418 intel_miptree_match_image(struct intel_mipmap_tree *mt,
419 struct gl_texture_image *image)
420 {
421 struct intel_texture_image *intelImage = intel_texture_image(image);
422 GLuint level = intelImage->base.Base.Level;
423 int width, height, depth;
424
425 /* glTexImage* choose the texture object based on the target passed in, and
426 * objects can't change targets over their lifetimes, so this should be
427 * true.
428 */
429 assert(target_to_target(image->TexObject->Target) == mt->target);
430
431 mesa_format mt_format = mt->format;
432
433 if (image->TexFormat != mt_format)
434 return false;
435
436 intel_miptree_get_dimensions_for_image(image, &width, &height, &depth);
437
438 if (mt->target == GL_TEXTURE_CUBE_MAP)
439 depth = 6;
440
441 /* Test image dimensions against the base level image adjusted for
442 * minification. This will also catch images not present in the
443 * tree, changed targets, etc.
444 */
445 if (width != mt->level[level].width ||
446 height != mt->level[level].height ||
447 depth != mt->level[level].depth) {
448 return false;
449 }
450
451 return true;
452 }
453
454
455 void
456 intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
457 GLuint level,
458 GLuint x, GLuint y,
459 GLuint w, GLuint h, GLuint d)
460 {
461 mt->level[level].width = w;
462 mt->level[level].height = h;
463 mt->level[level].depth = d;
464 mt->level[level].level_x = x;
465 mt->level[level].level_y = y;
466
467 DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __func__,
468 level, w, h, d, x, y);
469
470 assert(mt->level[level].slice == NULL);
471
472 mt->level[level].slice = calloc(d, sizeof(*mt->level[0].slice));
473 mt->level[level].slice[0].x_offset = mt->level[level].level_x;
474 mt->level[level].slice[0].y_offset = mt->level[level].level_y;
475 }
476
477
478 void
479 intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
480 GLuint level, GLuint img,
481 GLuint x, GLuint y)
482 {
483 if (img == 0 && level == 0)
484 assert(x == 0 && y == 0);
485
486 assert(img < mt->level[level].depth);
487
488 mt->level[level].slice[img].x_offset = mt->level[level].level_x + x;
489 mt->level[level].slice[img].y_offset = mt->level[level].level_y + y;
490
491 DBG("%s level %d img %d pos %d,%d\n",
492 __func__, level, img,
493 mt->level[level].slice[img].x_offset,
494 mt->level[level].slice[img].y_offset);
495 }
496
497 void
498 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
499 GLuint level, GLuint slice,
500 GLuint *x, GLuint *y)
501 {
502 assert(slice < mt->level[level].depth);
503
504 *x = mt->level[level].slice[slice].x_offset;
505 *y = mt->level[level].slice[slice].y_offset;
506 }
507
508 /**
509 * Rendering with tiled buffers requires that the base address of the buffer
510 * be aligned to a page boundary. For renderbuffers, and sometimes with
511 * textures, we may want the surface to point at a texture image level that
512 * isn't at a page boundary.
513 *
514 * This function returns an appropriately-aligned base offset
515 * according to the tiling restrictions, plus any required x/y offset
516 * from there.
517 */
518 uint32_t
519 intel_miptree_get_tile_offsets(struct intel_mipmap_tree *mt,
520 GLuint level, GLuint slice,
521 uint32_t *tile_x,
522 uint32_t *tile_y)
523 {
524 struct intel_region *region = mt->region;
525 uint32_t x, y;
526 uint32_t mask_x, mask_y;
527
528 intel_region_get_tile_masks(region, &mask_x, &mask_y, false);
529 intel_miptree_get_image_offset(mt, level, slice, &x, &y);
530
531 *tile_x = x & mask_x;
532 *tile_y = y & mask_y;
533
534 return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y,
535 false);
536 }
537
538 static void
539 intel_miptree_copy_slice_sw(struct intel_context *intel,
540 struct intel_mipmap_tree *dst_mt,
541 struct intel_mipmap_tree *src_mt,
542 int level,
543 int slice,
544 int width,
545 int height)
546 {
547 void *src, *dst;
548 int src_stride, dst_stride;
549 int cpp = dst_mt->cpp;
550
551 intel_miptree_map(intel, src_mt,
552 level, slice,
553 0, 0,
554 width, height,
555 GL_MAP_READ_BIT,
556 &src, &src_stride);
557
558 intel_miptree_map(intel, dst_mt,
559 level, slice,
560 0, 0,
561 width, height,
562 GL_MAP_WRITE_BIT | GL_MAP_INVALIDATE_RANGE_BIT,
563 &dst, &dst_stride);
564
565 DBG("sw blit %s mt %p %p/%d -> %s mt %p %p/%d (%dx%d)\n",
566 _mesa_get_format_name(src_mt->format),
567 src_mt, src, src_stride,
568 _mesa_get_format_name(dst_mt->format),
569 dst_mt, dst, dst_stride,
570 width, height);
571
572 int row_size = cpp * width;
573 if (src_stride == row_size &&
574 dst_stride == row_size) {
575 memcpy(dst, src, row_size * height);
576 } else {
577 for (int i = 0; i < height; i++) {
578 memcpy(dst, src, row_size);
579 dst += dst_stride;
580 src += src_stride;
581 }
582 }
583
584 intel_miptree_unmap(intel, dst_mt, level, slice);
585 intel_miptree_unmap(intel, src_mt, level, slice);
586 }
587
588 static void
589 intel_miptree_copy_slice(struct intel_context *intel,
590 struct intel_mipmap_tree *dst_mt,
591 struct intel_mipmap_tree *src_mt,
592 int level,
593 int face,
594 int depth)
595
596 {
597 mesa_format format = src_mt->format;
598 uint32_t width = src_mt->level[level].width;
599 uint32_t height = src_mt->level[level].height;
600 int slice;
601
602 if (face > 0)
603 slice = face;
604 else
605 slice = depth;
606
607 assert(depth < src_mt->level[level].depth);
608 assert(src_mt->format == dst_mt->format);
609
610 if (dst_mt->compressed) {
611 height = ALIGN(height, dst_mt->align_h) / dst_mt->align_h;
612 width = ALIGN(width, dst_mt->align_w);
613 }
614
615 uint32_t dst_x, dst_y, src_x, src_y;
616 intel_miptree_get_image_offset(dst_mt, level, slice, &dst_x, &dst_y);
617 intel_miptree_get_image_offset(src_mt, level, slice, &src_x, &src_y);
618
619 DBG("validate blit mt %s %p %d,%d/%d -> mt %s %p %d,%d/%d (%dx%d)\n",
620 _mesa_get_format_name(src_mt->format),
621 src_mt, src_x, src_y, src_mt->region->pitch,
622 _mesa_get_format_name(dst_mt->format),
623 dst_mt, dst_x, dst_y, dst_mt->region->pitch,
624 width, height);
625
626 if (!intel_miptree_blit(intel,
627 src_mt, level, slice, 0, 0, false,
628 dst_mt, level, slice, 0, 0, false,
629 width, height, GL_COPY)) {
630 perf_debug("miptree validate blit for %s failed\n",
631 _mesa_get_format_name(format));
632
633 intel_miptree_copy_slice_sw(intel, dst_mt, src_mt, level, slice,
634 width, height);
635 }
636 }
637
638 /**
639 * Copies the image's current data to the given miptree, and associates that
640 * miptree with the image.
641 *
642 * If \c invalidate is true, then the actual image data does not need to be
643 * copied, but the image still needs to be associated to the new miptree (this
644 * is set to true if we're about to clear the image).
645 */
646 void
647 intel_miptree_copy_teximage(struct intel_context *intel,
648 struct intel_texture_image *intelImage,
649 struct intel_mipmap_tree *dst_mt,
650 bool invalidate)
651 {
652 struct intel_mipmap_tree *src_mt = intelImage->mt;
653 struct intel_texture_object *intel_obj =
654 intel_texture_object(intelImage->base.Base.TexObject);
655 int level = intelImage->base.Base.Level;
656 int face = intelImage->base.Base.Face;
657 GLuint depth = intelImage->base.Base.Depth;
658
659 if (!invalidate) {
660 for (int slice = 0; slice < depth; slice++) {
661 intel_miptree_copy_slice(intel, dst_mt, src_mt, level, face, slice);
662 }
663 }
664
665 intel_miptree_reference(&intelImage->mt, dst_mt);
666 intel_obj->needs_validate = true;
667 }
668
669 void *
670 intel_miptree_map_raw(struct intel_context *intel, struct intel_mipmap_tree *mt)
671 {
672 drm_intel_bo *bo = mt->region->bo;
673
674 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) {
675 if (drm_intel_bo_busy(bo)) {
676 perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
677 }
678 }
679
680 intel_flush(&intel->ctx);
681
682 if (mt->region->tiling != I915_TILING_NONE)
683 drm_intel_gem_bo_map_gtt(bo);
684 else
685 drm_intel_bo_map(bo, true);
686
687 return bo->virtual;
688 }
689
690 void
691 intel_miptree_unmap_raw(struct intel_mipmap_tree *mt)
692 {
693 drm_intel_bo_unmap(mt->region->bo);
694 }
695
696 static void
697 intel_miptree_map_gtt(struct intel_context *intel,
698 struct intel_mipmap_tree *mt,
699 struct intel_miptree_map *map,
700 unsigned int level, unsigned int slice)
701 {
702 unsigned int bw, bh;
703 void *base;
704 unsigned int image_x, image_y;
705 int x = map->x;
706 int y = map->y;
707
708 /* For compressed formats, the stride is the number of bytes per
709 * row of blocks. intel_miptree_get_image_offset() already does
710 * the divide.
711 */
712 _mesa_get_format_block_size(mt->format, &bw, &bh);
713 assert(y % bh == 0);
714 y /= bh;
715
716 base = intel_miptree_map_raw(intel, mt) + mt->offset;
717
718 if (base == NULL)
719 map->ptr = NULL;
720 else {
721 /* Note that in the case of cube maps, the caller must have passed the
722 * slice number referencing the face.
723 */
724 intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
725 x += image_x;
726 y += image_y;
727
728 map->stride = mt->region->pitch;
729 map->ptr = base + y * map->stride + x * mt->cpp;
730 }
731
732 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__,
733 map->x, map->y, map->w, map->h,
734 mt, _mesa_get_format_name(mt->format),
735 x, y, map->ptr, map->stride);
736 }
737
738 static void
739 intel_miptree_unmap_gtt(struct intel_mipmap_tree *mt)
740 {
741 intel_miptree_unmap_raw(mt);
742 }
743
744 static void
745 intel_miptree_map_blit(struct intel_context *intel,
746 struct intel_mipmap_tree *mt,
747 struct intel_miptree_map *map,
748 unsigned int level, unsigned int slice)
749 {
750 map->mt = intel_miptree_create(intel, GL_TEXTURE_2D, mt->format,
751 0, 0,
752 map->w, map->h, 1,
753 false,
754 INTEL_MIPTREE_TILING_NONE);
755 if (!map->mt) {
756 fprintf(stderr, "Failed to allocate blit temporary\n");
757 goto fail;
758 }
759 map->stride = map->mt->region->pitch;
760
761 if (!intel_miptree_blit(intel,
762 mt, level, slice,
763 map->x, map->y, false,
764 map->mt, 0, 0,
765 0, 0, false,
766 map->w, map->h, GL_COPY)) {
767 fprintf(stderr, "Failed to blit\n");
768 goto fail;
769 }
770
771 intel_batchbuffer_flush(intel);
772 map->ptr = intel_miptree_map_raw(intel, map->mt);
773
774 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__,
775 map->x, map->y, map->w, map->h,
776 mt, _mesa_get_format_name(mt->format),
777 level, slice, map->ptr, map->stride);
778
779 return;
780
781 fail:
782 intel_miptree_release(&map->mt);
783 map->ptr = NULL;
784 map->stride = 0;
785 }
786
787 static void
788 intel_miptree_unmap_blit(struct intel_context *intel,
789 struct intel_mipmap_tree *mt,
790 struct intel_miptree_map *map,
791 unsigned int level,
792 unsigned int slice)
793 {
794 struct gl_context *ctx = &intel->ctx;
795
796 intel_miptree_unmap_raw(map->mt);
797
798 if (map->mode & GL_MAP_WRITE_BIT) {
799 bool ok = intel_miptree_blit(intel,
800 map->mt, 0, 0,
801 0, 0, false,
802 mt, level, slice,
803 map->x, map->y, false,
804 map->w, map->h, GL_COPY);
805 WARN_ONCE(!ok, "Failed to blit from linear temporary mapping");
806 }
807
808 intel_miptree_release(&map->mt);
809 }
810
811 /**
812 * Create and attach a map to the miptree at (level, slice). Return the
813 * attached map.
814 */
815 static struct intel_miptree_map*
816 intel_miptree_attach_map(struct intel_mipmap_tree *mt,
817 unsigned int level,
818 unsigned int slice,
819 unsigned int x,
820 unsigned int y,
821 unsigned int w,
822 unsigned int h,
823 GLbitfield mode)
824 {
825 struct intel_miptree_map *map = calloc(1, sizeof(*map));
826
827 if (!map)
828 return NULL;
829
830 assert(mt->level[level].slice[slice].map == NULL);
831 mt->level[level].slice[slice].map = map;
832
833 map->mode = mode;
834 map->x = x;
835 map->y = y;
836 map->w = w;
837 map->h = h;
838
839 return map;
840 }
841
842 /**
843 * Release the map at (level, slice).
844 */
845 static void
846 intel_miptree_release_map(struct intel_mipmap_tree *mt,
847 unsigned int level,
848 unsigned int slice)
849 {
850 struct intel_miptree_map **map;
851
852 map = &mt->level[level].slice[slice].map;
853 free(*map);
854 *map = NULL;
855 }
856
857 void
858 intel_miptree_map(struct intel_context *intel,
859 struct intel_mipmap_tree *mt,
860 unsigned int level,
861 unsigned int slice,
862 unsigned int x,
863 unsigned int y,
864 unsigned int w,
865 unsigned int h,
866 GLbitfield mode,
867 void **out_ptr,
868 int *out_stride)
869 {
870 struct intel_miptree_map *map;
871
872 map = intel_miptree_attach_map(mt, level, slice, x, y, w, h, mode);
873 if (!map) {
874 *out_ptr = NULL;
875 *out_stride = 0;
876 return;
877 }
878
879 /* See intel_miptree_blit() for details on the 32k pitch limit. */
880 if (mt->region->tiling != I915_TILING_NONE &&
881 mt->region->bo->size >= intel->max_gtt_map_object_size) {
882 assert(mt->region->pitch < 32768);
883 intel_miptree_map_blit(intel, mt, map, level, slice);
884 } else {
885 intel_miptree_map_gtt(intel, mt, map, level, slice);
886 }
887
888 *out_ptr = map->ptr;
889 *out_stride = map->stride;
890
891 if (map->ptr == NULL)
892 intel_miptree_release_map(mt, level, slice);
893 }
894
895 void
896 intel_miptree_unmap(struct intel_context *intel,
897 struct intel_mipmap_tree *mt,
898 unsigned int level,
899 unsigned int slice)
900 {
901 struct intel_miptree_map *map = mt->level[level].slice[slice].map;
902
903 if (!map)
904 return;
905
906 DBG("%s: mt %p (%s) level %d slice %d\n", __func__,
907 mt, _mesa_get_format_name(mt->format), level, slice);
908
909 if (map->mt) {
910 intel_miptree_unmap_blit(intel, mt, map, level, slice);
911 } else {
912 intel_miptree_unmap_gtt(mt);
913 }
914
915 intel_miptree_release_map(mt, level, slice);
916 }