i915: On Gen <= 3 there is no multisampling
[mesa.git] / src / mesa / drivers / dri / i915 / intel_mipmap_tree.c
1 /**************************************************************************
2 *
3 * Copyright 2006 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <GL/gl.h>
29 #include <GL/internal/dri_interface.h>
30
31 #include "intel_batchbuffer.h"
32 #include "intel_chipset.h"
33 #include "intel_context.h"
34 #include "intel_mipmap_tree.h"
35 #include "intel_regions.h"
36 #include "intel_tex_layout.h"
37 #include "intel_tex.h"
38 #include "intel_blit.h"
39
40 #include "main/enums.h"
41 #include "main/formats.h"
42 #include "main/glformats.h"
43 #include "main/teximage.h"
44
45 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
46
47 static GLenum
48 target_to_target(GLenum target)
49 {
50 switch (target) {
51 case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
52 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
53 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
54 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
55 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
56 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
57 return GL_TEXTURE_CUBE_MAP_ARB;
58 default:
59 return target;
60 }
61 }
62
63 struct intel_mipmap_tree *
64 intel_miptree_create_layout(struct intel_context *intel,
65 GLenum target,
66 mesa_format format,
67 GLuint first_level,
68 GLuint last_level,
69 GLuint width0,
70 GLuint height0,
71 GLuint depth0)
72 {
73 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
74 if (!mt)
75 return NULL;
76
77 DBG("%s target %s format %s level %d..%d <-- %p\n", __func__,
78 _mesa_enum_to_string(target),
79 _mesa_get_format_name(format),
80 first_level, last_level, mt);
81
82 mt->target = target_to_target(target);
83 mt->format = format;
84 mt->first_level = first_level;
85 mt->last_level = last_level;
86 mt->logical_width0 = width0;
87 mt->logical_height0 = height0;
88 mt->logical_depth0 = depth0;
89
90 /* The cpp is bytes per (1, blockheight)-sized block for compressed
91 * textures. This is why you'll see divides by blockheight all over
92 */
93 unsigned bw, bh;
94 _mesa_get_format_block_size(format, &bw, &bh);
95 assert(_mesa_get_format_bytes(mt->format) % bw == 0);
96 mt->cpp = _mesa_get_format_bytes(mt->format) / bw;
97
98 mt->compressed = _mesa_is_format_compressed(format);
99 mt->refcount = 1;
100
101 if (target == GL_TEXTURE_CUBE_MAP) {
102 assert(depth0 == 1);
103 depth0 = 6;
104 }
105
106 mt->physical_width0 = width0;
107 mt->physical_height0 = height0;
108 mt->physical_depth0 = depth0;
109
110 intel_get_texture_alignment_unit(intel, mt->format,
111 &mt->align_w, &mt->align_h);
112
113 if (intel->is_945)
114 i945_miptree_layout(mt);
115 else
116 i915_miptree_layout(mt);
117
118 return mt;
119 }
120
121 /**
122 * \brief Helper function for intel_miptree_create().
123 */
124 static uint32_t
125 intel_miptree_choose_tiling(struct intel_context *intel,
126 mesa_format format,
127 uint32_t width0,
128 enum intel_miptree_tiling_mode requested,
129 struct intel_mipmap_tree *mt)
130 {
131 /* Some usages may want only one type of tiling, like depth miptrees (Y
132 * tiled), or temporary BOs for uploading data once (linear).
133 */
134 switch (requested) {
135 case INTEL_MIPTREE_TILING_ANY:
136 break;
137 case INTEL_MIPTREE_TILING_Y:
138 return I915_TILING_Y;
139 case INTEL_MIPTREE_TILING_NONE:
140 return I915_TILING_NONE;
141 }
142
143 int minimum_pitch = mt->total_width * mt->cpp;
144
145 /* If the width is much smaller than a tile, don't bother tiling. */
146 if (minimum_pitch < 64)
147 return I915_TILING_NONE;
148
149 if (ALIGN(minimum_pitch, 512) >= 32768) {
150 perf_debug("%dx%d miptree too large to blit, falling back to untiled",
151 mt->total_width, mt->total_height);
152 return I915_TILING_NONE;
153 }
154
155 /* We don't have BLORP to handle Y-tiled blits, so use X-tiling. */
156 return I915_TILING_X;
157 }
158
159 struct intel_mipmap_tree *
160 intel_miptree_create(struct intel_context *intel,
161 GLenum target,
162 mesa_format format,
163 GLuint first_level,
164 GLuint last_level,
165 GLuint width0,
166 GLuint height0,
167 GLuint depth0,
168 bool expect_accelerated_upload,
169 enum intel_miptree_tiling_mode requested_tiling)
170 {
171 struct intel_mipmap_tree *mt;
172 GLuint total_width, total_height;
173
174
175 mt = intel_miptree_create_layout(intel, target, format,
176 first_level, last_level, width0,
177 height0, depth0);
178
179 /* pitch == 0 || height == 0 indicates the null texture */
180 if (!mt || !mt->total_width || !mt->total_height) {
181 intel_miptree_release(&mt);
182 return NULL;
183 }
184
185 total_width = mt->total_width;
186 total_height = mt->total_height;
187
188 uint32_t tiling = intel_miptree_choose_tiling(intel, format, width0,
189 requested_tiling,
190 mt);
191 bool y_or_x = tiling == (I915_TILING_Y | I915_TILING_X);
192
193 mt->region = intel_region_alloc(intel->intelScreen,
194 y_or_x ? I915_TILING_Y : tiling,
195 mt->cpp,
196 total_width,
197 total_height,
198 expect_accelerated_upload);
199
200 /* If the region is too large to fit in the aperture, we need to use the
201 * BLT engine to support it. The BLT paths can't currently handle Y-tiling,
202 * so we need to fall back to X.
203 */
204 if (y_or_x && mt->region->bo->size >= intel->max_gtt_map_object_size) {
205 perf_debug("%dx%d miptree larger than aperture; falling back to X-tiled\n",
206 mt->total_width, mt->total_height);
207 intel_region_release(&mt->region);
208
209 mt->region = intel_region_alloc(intel->intelScreen,
210 I915_TILING_X,
211 mt->cpp,
212 total_width,
213 total_height,
214 expect_accelerated_upload);
215 }
216
217 mt->offset = 0;
218
219 if (!mt->region) {
220 intel_miptree_release(&mt);
221 return NULL;
222 }
223
224 return mt;
225 }
226
227 struct intel_mipmap_tree *
228 intel_miptree_create_for_bo(struct intel_context *intel,
229 drm_intel_bo *bo,
230 mesa_format format,
231 uint32_t offset,
232 uint32_t width,
233 uint32_t height,
234 int pitch,
235 uint32_t tiling)
236 {
237 struct intel_mipmap_tree *mt;
238
239 struct intel_region *region = calloc(1, sizeof(*region));
240 if (!region)
241 return NULL;
242
243 /* Nothing will be able to use this miptree with the BO if the offset isn't
244 * aligned.
245 */
246 if (tiling != I915_TILING_NONE)
247 assert(offset % 4096 == 0);
248
249 /* miptrees can't handle negative pitch. If you need flipping of images,
250 * that's outside of the scope of the mt.
251 */
252 assert(pitch >= 0);
253
254 mt = intel_miptree_create_layout(intel, GL_TEXTURE_2D, format,
255 0, 0,
256 width, height, 1);
257 if (!mt) {
258 free(region);
259 return mt;
260 }
261
262 region->cpp = mt->cpp;
263 region->width = width;
264 region->height = height;
265 region->pitch = pitch;
266 region->refcount = 1;
267 drm_intel_bo_reference(bo);
268 region->bo = bo;
269 region->tiling = tiling;
270
271 mt->region = region;
272 mt->offset = offset;
273
274 return mt;
275 }
276
277
278 /**
279 * Wraps the given region with a miptree.
280 */
281 struct intel_mipmap_tree *
282 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
283 unsigned dri_attachment,
284 mesa_format format,
285 struct intel_region *region)
286 {
287 struct intel_mipmap_tree *mt = NULL;
288
289 /* Only the front and back buffers, which are color buffers, are shared
290 * through DRI2.
291 */
292 assert(dri_attachment == __DRI_BUFFER_BACK_LEFT ||
293 dri_attachment == __DRI_BUFFER_FRONT_LEFT ||
294 dri_attachment == __DRI_BUFFER_FAKE_FRONT_LEFT);
295 assert(_mesa_get_format_base_format(format) == GL_RGB ||
296 _mesa_get_format_base_format(format) == GL_RGBA);
297
298 mt = intel_miptree_create_for_bo(intel,
299 region->bo,
300 format,
301 0,
302 region->width,
303 region->height,
304 region->pitch,
305 region->tiling);
306 if (!mt)
307 return NULL;
308 mt->region->name = region->name;
309
310 return mt;
311 }
312
313 /**
314 * Wraps the given region with a miptree.
315 */
316 struct intel_mipmap_tree *
317 intel_miptree_create_for_image_buffer(struct intel_context *intel,
318 enum __DRIimageBufferMask buffer_type,
319 mesa_format format,
320 uint32_t num_samples,
321 struct intel_region *region)
322 {
323 struct intel_mipmap_tree *mt = NULL;
324
325 /* Only the front and back buffers, which are color buffers, are allocated
326 * through the image loader.
327 */
328 assert(_mesa_get_format_base_format(format) == GL_RGB ||
329 _mesa_get_format_base_format(format) == GL_RGBA);
330
331 mt = intel_miptree_create_for_bo(intel,
332 region->bo,
333 format,
334 0,
335 region->width,
336 region->height,
337 region->pitch,
338 region->tiling);
339 return mt;
340 }
341
342 struct intel_mipmap_tree *
343 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
344 mesa_format format,
345 uint32_t width,
346 uint32_t height)
347 {
348 uint32_t depth = 1;
349
350 return intel_miptree_create(intel, GL_TEXTURE_2D, format, 0, 0,
351 width, height, depth, true,
352 INTEL_MIPTREE_TILING_ANY);
353 }
354
355 void
356 intel_miptree_reference(struct intel_mipmap_tree **dst,
357 struct intel_mipmap_tree *src)
358 {
359 if (*dst == src)
360 return;
361
362 intel_miptree_release(dst);
363
364 if (src) {
365 src->refcount++;
366 DBG("%s %p refcount now %d\n", __func__, src, src->refcount);
367 }
368
369 *dst = src;
370 }
371
372
373 void
374 intel_miptree_release(struct intel_mipmap_tree **mt)
375 {
376 if (!*mt)
377 return;
378
379 DBG("%s %p refcount will be %d\n", __func__, *mt, (*mt)->refcount - 1);
380 if (--(*mt)->refcount <= 0) {
381 GLuint i;
382
383 DBG("%s deleting %p\n", __func__, *mt);
384
385 intel_region_release(&((*mt)->region));
386
387 for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
388 free((*mt)->level[i].slice);
389 }
390
391 free(*mt);
392 }
393 *mt = NULL;
394 }
395
396 void
397 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
398 int *width, int *height, int *depth)
399 {
400 switch (image->TexObject->Target) {
401 case GL_TEXTURE_1D_ARRAY:
402 *width = image->Width;
403 *height = 1;
404 *depth = image->Height;
405 break;
406 default:
407 *width = image->Width;
408 *height = image->Height;
409 *depth = image->Depth;
410 break;
411 }
412 }
413
414 /**
415 * Can the image be pulled into a unified mipmap tree? This mirrors
416 * the completeness test in a lot of ways.
417 *
418 * Not sure whether I want to pass gl_texture_image here.
419 */
420 bool
421 intel_miptree_match_image(struct intel_mipmap_tree *mt,
422 struct gl_texture_image *image)
423 {
424 struct intel_texture_image *intelImage = intel_texture_image(image);
425 GLuint level = intelImage->base.Base.Level;
426 int width, height, depth;
427
428 /* glTexImage* choose the texture object based on the target passed in, and
429 * objects can't change targets over their lifetimes, so this should be
430 * true.
431 */
432 assert(target_to_target(image->TexObject->Target) == mt->target);
433
434 mesa_format mt_format = mt->format;
435
436 if (image->TexFormat != mt_format)
437 return false;
438
439 intel_miptree_get_dimensions_for_image(image, &width, &height, &depth);
440
441 if (mt->target == GL_TEXTURE_CUBE_MAP)
442 depth = 6;
443
444 /* Test image dimensions against the base level image adjusted for
445 * minification. This will also catch images not present in the
446 * tree, changed targets, etc.
447 */
448 if (width != mt->level[level].width ||
449 height != mt->level[level].height ||
450 depth != mt->level[level].depth) {
451 return false;
452 }
453
454 return true;
455 }
456
457
458 void
459 intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
460 GLuint level,
461 GLuint x, GLuint y,
462 GLuint w, GLuint h, GLuint d)
463 {
464 mt->level[level].width = w;
465 mt->level[level].height = h;
466 mt->level[level].depth = d;
467 mt->level[level].level_x = x;
468 mt->level[level].level_y = y;
469
470 DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __func__,
471 level, w, h, d, x, y);
472
473 assert(mt->level[level].slice == NULL);
474
475 mt->level[level].slice = calloc(d, sizeof(*mt->level[0].slice));
476 mt->level[level].slice[0].x_offset = mt->level[level].level_x;
477 mt->level[level].slice[0].y_offset = mt->level[level].level_y;
478 }
479
480
481 void
482 intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
483 GLuint level, GLuint img,
484 GLuint x, GLuint y)
485 {
486 if (img == 0 && level == 0)
487 assert(x == 0 && y == 0);
488
489 assert(img < mt->level[level].depth);
490
491 mt->level[level].slice[img].x_offset = mt->level[level].level_x + x;
492 mt->level[level].slice[img].y_offset = mt->level[level].level_y + y;
493
494 DBG("%s level %d img %d pos %d,%d\n",
495 __func__, level, img,
496 mt->level[level].slice[img].x_offset,
497 mt->level[level].slice[img].y_offset);
498 }
499
500 void
501 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
502 GLuint level, GLuint slice,
503 GLuint *x, GLuint *y)
504 {
505 assert(slice < mt->level[level].depth);
506
507 *x = mt->level[level].slice[slice].x_offset;
508 *y = mt->level[level].slice[slice].y_offset;
509 }
510
511 /**
512 * Rendering with tiled buffers requires that the base address of the buffer
513 * be aligned to a page boundary. For renderbuffers, and sometimes with
514 * textures, we may want the surface to point at a texture image level that
515 * isn't at a page boundary.
516 *
517 * This function returns an appropriately-aligned base offset
518 * according to the tiling restrictions, plus any required x/y offset
519 * from there.
520 */
521 uint32_t
522 intel_miptree_get_tile_offsets(struct intel_mipmap_tree *mt,
523 GLuint level, GLuint slice,
524 uint32_t *tile_x,
525 uint32_t *tile_y)
526 {
527 struct intel_region *region = mt->region;
528 uint32_t x, y;
529 uint32_t mask_x, mask_y;
530
531 intel_region_get_tile_masks(region, &mask_x, &mask_y, false);
532 intel_miptree_get_image_offset(mt, level, slice, &x, &y);
533
534 *tile_x = x & mask_x;
535 *tile_y = y & mask_y;
536
537 return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y,
538 false);
539 }
540
541 static void
542 intel_miptree_copy_slice_sw(struct intel_context *intel,
543 struct intel_mipmap_tree *dst_mt,
544 struct intel_mipmap_tree *src_mt,
545 int level,
546 int slice,
547 int width,
548 int height)
549 {
550 void *src, *dst;
551 int src_stride, dst_stride;
552 int cpp = dst_mt->cpp;
553
554 intel_miptree_map(intel, src_mt,
555 level, slice,
556 0, 0,
557 width, height,
558 GL_MAP_READ_BIT,
559 &src, &src_stride);
560
561 intel_miptree_map(intel, dst_mt,
562 level, slice,
563 0, 0,
564 width, height,
565 GL_MAP_WRITE_BIT | GL_MAP_INVALIDATE_RANGE_BIT,
566 &dst, &dst_stride);
567
568 DBG("sw blit %s mt %p %p/%d -> %s mt %p %p/%d (%dx%d)\n",
569 _mesa_get_format_name(src_mt->format),
570 src_mt, src, src_stride,
571 _mesa_get_format_name(dst_mt->format),
572 dst_mt, dst, dst_stride,
573 width, height);
574
575 int row_size = cpp * width;
576 if (src_stride == row_size &&
577 dst_stride == row_size) {
578 memcpy(dst, src, row_size * height);
579 } else {
580 for (int i = 0; i < height; i++) {
581 memcpy(dst, src, row_size);
582 dst += dst_stride;
583 src += src_stride;
584 }
585 }
586
587 intel_miptree_unmap(intel, dst_mt, level, slice);
588 intel_miptree_unmap(intel, src_mt, level, slice);
589 }
590
591 static void
592 intel_miptree_copy_slice(struct intel_context *intel,
593 struct intel_mipmap_tree *dst_mt,
594 struct intel_mipmap_tree *src_mt,
595 int level,
596 int face,
597 int depth)
598
599 {
600 mesa_format format = src_mt->format;
601 uint32_t width = src_mt->level[level].width;
602 uint32_t height = src_mt->level[level].height;
603 int slice;
604
605 if (face > 0)
606 slice = face;
607 else
608 slice = depth;
609
610 assert(depth < src_mt->level[level].depth);
611 assert(src_mt->format == dst_mt->format);
612
613 if (dst_mt->compressed) {
614 height = ALIGN(height, dst_mt->align_h) / dst_mt->align_h;
615 width = ALIGN(width, dst_mt->align_w);
616 }
617
618 uint32_t dst_x, dst_y, src_x, src_y;
619 intel_miptree_get_image_offset(dst_mt, level, slice, &dst_x, &dst_y);
620 intel_miptree_get_image_offset(src_mt, level, slice, &src_x, &src_y);
621
622 DBG("validate blit mt %s %p %d,%d/%d -> mt %s %p %d,%d/%d (%dx%d)\n",
623 _mesa_get_format_name(src_mt->format),
624 src_mt, src_x, src_y, src_mt->region->pitch,
625 _mesa_get_format_name(dst_mt->format),
626 dst_mt, dst_x, dst_y, dst_mt->region->pitch,
627 width, height);
628
629 if (!intel_miptree_blit(intel,
630 src_mt, level, slice, 0, 0, false,
631 dst_mt, level, slice, 0, 0, false,
632 width, height, GL_COPY)) {
633 perf_debug("miptree validate blit for %s failed\n",
634 _mesa_get_format_name(format));
635
636 intel_miptree_copy_slice_sw(intel, dst_mt, src_mt, level, slice,
637 width, height);
638 }
639 }
640
641 /**
642 * Copies the image's current data to the given miptree, and associates that
643 * miptree with the image.
644 *
645 * If \c invalidate is true, then the actual image data does not need to be
646 * copied, but the image still needs to be associated to the new miptree (this
647 * is set to true if we're about to clear the image).
648 */
649 void
650 intel_miptree_copy_teximage(struct intel_context *intel,
651 struct intel_texture_image *intelImage,
652 struct intel_mipmap_tree *dst_mt,
653 bool invalidate)
654 {
655 struct intel_mipmap_tree *src_mt = intelImage->mt;
656 struct intel_texture_object *intel_obj =
657 intel_texture_object(intelImage->base.Base.TexObject);
658 int level = intelImage->base.Base.Level;
659 int face = intelImage->base.Base.Face;
660 GLuint depth = intelImage->base.Base.Depth;
661
662 if (!invalidate) {
663 for (int slice = 0; slice < depth; slice++) {
664 intel_miptree_copy_slice(intel, dst_mt, src_mt, level, face, slice);
665 }
666 }
667
668 intel_miptree_reference(&intelImage->mt, dst_mt);
669 intel_obj->needs_validate = true;
670 }
671
672 void *
673 intel_miptree_map_raw(struct intel_context *intel, struct intel_mipmap_tree *mt)
674 {
675 drm_intel_bo *bo = mt->region->bo;
676
677 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) {
678 if (drm_intel_bo_busy(bo)) {
679 perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
680 }
681 }
682
683 intel_flush(&intel->ctx);
684
685 if (mt->region->tiling != I915_TILING_NONE)
686 drm_intel_gem_bo_map_gtt(bo);
687 else
688 drm_intel_bo_map(bo, true);
689
690 return bo->virtual;
691 }
692
693 void
694 intel_miptree_unmap_raw(struct intel_mipmap_tree *mt)
695 {
696 drm_intel_bo_unmap(mt->region->bo);
697 }
698
699 static void
700 intel_miptree_map_gtt(struct intel_context *intel,
701 struct intel_mipmap_tree *mt,
702 struct intel_miptree_map *map,
703 unsigned int level, unsigned int slice)
704 {
705 unsigned int bw, bh;
706 void *base;
707 unsigned int image_x, image_y;
708 int x = map->x;
709 int y = map->y;
710
711 /* For compressed formats, the stride is the number of bytes per
712 * row of blocks. intel_miptree_get_image_offset() already does
713 * the divide.
714 */
715 _mesa_get_format_block_size(mt->format, &bw, &bh);
716 assert(y % bh == 0);
717 y /= bh;
718
719 base = intel_miptree_map_raw(intel, mt) + mt->offset;
720
721 if (base == NULL)
722 map->ptr = NULL;
723 else {
724 /* Note that in the case of cube maps, the caller must have passed the
725 * slice number referencing the face.
726 */
727 intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
728 x += image_x;
729 y += image_y;
730
731 map->stride = mt->region->pitch;
732 map->ptr = base + y * map->stride + x * mt->cpp;
733 }
734
735 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__,
736 map->x, map->y, map->w, map->h,
737 mt, _mesa_get_format_name(mt->format),
738 x, y, map->ptr, map->stride);
739 }
740
741 static void
742 intel_miptree_unmap_gtt(struct intel_mipmap_tree *mt)
743 {
744 intel_miptree_unmap_raw(mt);
745 }
746
747 static void
748 intel_miptree_map_blit(struct intel_context *intel,
749 struct intel_mipmap_tree *mt,
750 struct intel_miptree_map *map,
751 unsigned int level, unsigned int slice)
752 {
753 map->mt = intel_miptree_create(intel, GL_TEXTURE_2D, mt->format,
754 0, 0,
755 map->w, map->h, 1,
756 false,
757 INTEL_MIPTREE_TILING_NONE);
758 if (!map->mt) {
759 fprintf(stderr, "Failed to allocate blit temporary\n");
760 goto fail;
761 }
762 map->stride = map->mt->region->pitch;
763
764 if (!intel_miptree_blit(intel,
765 mt, level, slice,
766 map->x, map->y, false,
767 map->mt, 0, 0,
768 0, 0, false,
769 map->w, map->h, GL_COPY)) {
770 fprintf(stderr, "Failed to blit\n");
771 goto fail;
772 }
773
774 intel_batchbuffer_flush(intel);
775 map->ptr = intel_miptree_map_raw(intel, map->mt);
776
777 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__,
778 map->x, map->y, map->w, map->h,
779 mt, _mesa_get_format_name(mt->format),
780 level, slice, map->ptr, map->stride);
781
782 return;
783
784 fail:
785 intel_miptree_release(&map->mt);
786 map->ptr = NULL;
787 map->stride = 0;
788 }
789
790 static void
791 intel_miptree_unmap_blit(struct intel_context *intel,
792 struct intel_mipmap_tree *mt,
793 struct intel_miptree_map *map,
794 unsigned int level,
795 unsigned int slice)
796 {
797 struct gl_context *ctx = &intel->ctx;
798
799 intel_miptree_unmap_raw(map->mt);
800
801 if (map->mode & GL_MAP_WRITE_BIT) {
802 bool ok = intel_miptree_blit(intel,
803 map->mt, 0, 0,
804 0, 0, false,
805 mt, level, slice,
806 map->x, map->y, false,
807 map->w, map->h, GL_COPY);
808 WARN_ONCE(!ok, "Failed to blit from linear temporary mapping");
809 }
810
811 intel_miptree_release(&map->mt);
812 }
813
814 /**
815 * Create and attach a map to the miptree at (level, slice). Return the
816 * attached map.
817 */
818 static struct intel_miptree_map*
819 intel_miptree_attach_map(struct intel_mipmap_tree *mt,
820 unsigned int level,
821 unsigned int slice,
822 unsigned int x,
823 unsigned int y,
824 unsigned int w,
825 unsigned int h,
826 GLbitfield mode)
827 {
828 struct intel_miptree_map *map = calloc(1, sizeof(*map));
829
830 if (!map)
831 return NULL;
832
833 assert(mt->level[level].slice[slice].map == NULL);
834 mt->level[level].slice[slice].map = map;
835
836 map->mode = mode;
837 map->x = x;
838 map->y = y;
839 map->w = w;
840 map->h = h;
841
842 return map;
843 }
844
845 /**
846 * Release the map at (level, slice).
847 */
848 static void
849 intel_miptree_release_map(struct intel_mipmap_tree *mt,
850 unsigned int level,
851 unsigned int slice)
852 {
853 struct intel_miptree_map **map;
854
855 map = &mt->level[level].slice[slice].map;
856 free(*map);
857 *map = NULL;
858 }
859
860 void
861 intel_miptree_map(struct intel_context *intel,
862 struct intel_mipmap_tree *mt,
863 unsigned int level,
864 unsigned int slice,
865 unsigned int x,
866 unsigned int y,
867 unsigned int w,
868 unsigned int h,
869 GLbitfield mode,
870 void **out_ptr,
871 int *out_stride)
872 {
873 struct intel_miptree_map *map;
874
875 map = intel_miptree_attach_map(mt, level, slice, x, y, w, h, mode);
876 if (!map) {
877 *out_ptr = NULL;
878 *out_stride = 0;
879 return;
880 }
881
882 /* See intel_miptree_blit() for details on the 32k pitch limit. */
883 if (mt->region->tiling != I915_TILING_NONE &&
884 mt->region->bo->size >= intel->max_gtt_map_object_size) {
885 assert(mt->region->pitch < 32768);
886 intel_miptree_map_blit(intel, mt, map, level, slice);
887 } else {
888 intel_miptree_map_gtt(intel, mt, map, level, slice);
889 }
890
891 *out_ptr = map->ptr;
892 *out_stride = map->stride;
893
894 if (map->ptr == NULL)
895 intel_miptree_release_map(mt, level, slice);
896 }
897
898 void
899 intel_miptree_unmap(struct intel_context *intel,
900 struct intel_mipmap_tree *mt,
901 unsigned int level,
902 unsigned int slice)
903 {
904 struct intel_miptree_map *map = mt->level[level].slice[slice].map;
905
906 if (!map)
907 return;
908
909 DBG("%s: mt %p (%s) level %d slice %d\n", __func__,
910 mt, _mesa_get_format_name(mt->format), level, slice);
911
912 if (map->mt) {
913 intel_miptree_unmap_blit(intel, mt, map, level, slice);
914 } else {
915 intel_miptree_unmap_gtt(mt);
916 }
917
918 intel_miptree_release_map(mt, level, slice);
919 }