1 /**************************************************************************
3 * Copyright 2003 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * Render unclipped vertex buffers by emitting vertices directly to
30 * dma buffers. Use strip/fan hardware acceleration where possible.
33 #include "main/glheader.h"
34 #include "main/context.h"
35 #include "main/macros.h"
36 #include "main/imports.h"
37 #include "main/mtypes.h"
38 #include "main/enums.h"
40 #include "math/m_xform.h"
42 #include "tnl/t_context.h"
43 #include "tnl/t_vertex.h"
44 #include "tnl/t_pipeline.h"
46 #include "intel_screen.h"
47 #include "intel_context.h"
48 #include "intel_tris.h"
49 #include "intel_batchbuffer.h"
50 #include "intel_reg.h"
53 * Render unclipped vertex buffers by emitting vertices directly to
54 * dma buffers. Use strip/fan hardware primitives where possible.
55 * Try to simulate missing primitives with indexed vertices.
57 #define HAVE_POINTS 0 /* Has it, but can't use because subpixel has to
58 * be adjusted for points on the INTEL/I845G
61 #define HAVE_LINE_STRIPS 1
62 #define HAVE_TRIANGLES 1
63 #define HAVE_TRI_STRIPS 1
64 #define HAVE_TRI_FANS 1
65 #define HAVE_POLYGONS 1
69 static uint32_t hw_prim
[GL_POLYGON
+ 1] = {
82 static const GLenum reduced_prim
[GL_POLYGON
+ 1] = {
95 static const int scale_prim
[GL_POLYGON
+ 1] = {
96 0, /* fallback case */
103 0, /* fallback case */
104 0, /* fallback case */
110 intelDmaPrimitive(struct intel_context
*intel
, GLenum prim
)
113 fprintf(stderr
, "%s %s\n", __func__
, _mesa_enum_to_string(prim
));
114 INTEL_FIREVERTICES(intel
);
115 intel
->vtbl
.reduced_primitive_state(intel
, reduced_prim
[prim
]);
116 intel_set_prim(intel
, hw_prim
[prim
]);
119 #define INTEL_NO_VBO_STATE_RESERVED 1500
121 static inline GLuint
intel_get_vb_max(struct intel_context
*intel
)
125 if (intel
->intelScreen
->no_vbo
) {
126 ret
= intel
->batch
.bo
->size
- INTEL_NO_VBO_STATE_RESERVED
;
129 ret
/= (intel
->vertex_size
* 4);
133 static inline GLuint
intel_get_current_max(struct intel_context
*intel
)
137 if (intel
->intelScreen
->no_vbo
) {
138 ret
= intel_batchbuffer_space(intel
);
139 ret
= ret
<= INTEL_NO_VBO_STATE_RESERVED
? 0 : ret
- INTEL_NO_VBO_STATE_RESERVED
;
141 ret
= (INTEL_VB_SIZE
- intel
->prim
.current_offset
);
143 return ret
/ (intel
->vertex_size
* 4);
146 #define LOCAL_VARS struct intel_context *intel = intel_context(ctx)
147 #define INIT( prim ) \
149 intelDmaPrimitive( intel, prim ); \
152 #define FLUSH() INTEL_FIREVERTICES(intel)
154 #define GET_SUBSEQUENT_VB_MAX_VERTS() intel_get_vb_max(intel)
155 #define GET_CURRENT_VB_MAX_VERTS() intel_get_current_max(intel)
157 #define ALLOC_VERTS(nr) intel_get_prim_space(intel, nr)
159 #define EMIT_VERTS( ctx, j, nr, buf ) \
160 _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf )
162 #define TAG(x) intel_##x
163 #include "tnl_dd/t_dd_dmatmp.h"
166 /**********************************************************************/
167 /* Render pipeline stage */
168 /**********************************************************************/
170 /* Heuristic to choose between the two render paths:
173 choose_render(struct intel_context
*intel
, struct vertex_buffer
*VB
)
175 int vertsz
= intel
->vertex_size
;
177 int cost_fallback
= 0;
181 int rprim
= intel
->reduced_primitive
;
184 for (i
= 0; i
< VB
->PrimitiveCount
; i
++) {
185 GLuint prim
= VB
->Primitive
[i
].mode
;
186 GLuint length
= VB
->Primitive
[i
].count
;
192 nr_rverts
+= length
* scale_prim
[prim
& PRIM_MODE_MASK
];
194 if (reduced_prim
[prim
& PRIM_MODE_MASK
] != rprim
) {
196 rprim
= reduced_prim
[prim
& PRIM_MODE_MASK
];
200 /* One point for each generated primitive:
202 cost_render
= nr_prims
;
203 cost_fallback
= nr_rprims
;
205 /* One point for every 1024 dwords (4k) of dma:
207 cost_render
+= (vertsz
* i
) / 1024;
208 cost_fallback
+= (vertsz
* nr_rverts
) / 1024;
211 fprintf(stderr
, "cost render: %d fallback: %d\n",
212 cost_render
, cost_fallback
);
214 if (cost_render
> cost_fallback
)
222 intel_run_render(struct gl_context
* ctx
, struct tnl_pipeline_stage
*stage
)
224 struct intel_context
*intel
= intel_context(ctx
);
225 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
226 struct vertex_buffer
*VB
= &tnl
->vb
;
229 intel
->vtbl
.render_prevalidate( intel
);
231 /* Don't handle clipping or indexed vertices.
233 if (intel
->RenderIndex
!= 0 ||
234 !intel_validate_render(ctx
, VB
) || !choose_render(intel
, VB
)) {
238 tnl
->clipspace
.new_inputs
|= VERT_BIT_POS
;
240 tnl
->Driver
.Render
.Start(ctx
);
242 for (i
= 0; i
< VB
->PrimitiveCount
; i
++) {
243 GLuint prim
= _tnl_translate_prim(&VB
->Primitive
[i
]);
244 GLuint start
= VB
->Primitive
[i
].start
;
245 GLuint length
= VB
->Primitive
[i
].count
;
250 intel_render_tab_verts
[prim
& PRIM_MODE_MASK
] (ctx
, start
,
254 tnl
->Driver
.Render
.Finish(ctx
);
256 INTEL_FIREVERTICES(intel
);
258 return false; /* finished the pipe */
261 static const struct tnl_pipeline_stage _intel_render_stage
= {
267 intel_run_render
/* run */
270 const struct tnl_pipeline_stage
*intel_pipeline
[] = {
271 &_tnl_vertex_transform_stage
,
272 &_tnl_normal_transform_stage
,
273 &_tnl_lighting_stage
,
274 &_tnl_fog_coordinate_stage
,
276 &_tnl_texture_transform_stage
,
277 &_tnl_point_attenuation_stage
,
278 &_tnl_vertex_program_stage
,
280 &_intel_render_stage
, /* ADD: unclipped rastersetup-to-dma */