src/mesa/drivers/dri/i915/intel_render.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Render unclipped vertex buffers by emitting vertices directly to
  30  * dma buffers.  Use strip/fan hardware acceleration where possible.
  31  *
  32  */
  33 #include "main/glheader.h"
  34 #include "main/context.h"
  35 #include "main/macros.h"
  36 #include "main/imports.h"
  37 #include "main/mtypes.h"
  38 #include "main/enums.h"
  39
  40 #include "tnl/t_context.h"
  41 #include "tnl/t_vertex.h"
  42 #include "tnl/t_pipeline.h"
  43
  44 #include "intel_screen.h"
  45 #include "intel_context.h"
  46 #include "intel_tris.h"
  47 #include "intel_batchbuffer.h"
  48 #include "intel_reg.h"
  49
  50 /*
  51  * Render unclipped vertex buffers by emitting vertices directly to
  52  * dma buffers.  Use strip/fan hardware primitives where possible.
  53  * Try to simulate missing primitives with indexed vertices.
  54  */
  55 #define HAVE_POINTS      0      /* Has it, but can't use because subpixel has to
  56                                  * be adjusted for points on the INTEL/I845G
  57                                  */
  58 #define HAVE_LINES       1
  59 #define HAVE_LINE_STRIPS 1
  60 #define HAVE_TRIANGLES   1
  61 #define HAVE_TRI_STRIPS  1
  62 #define HAVE_TRI_STRIP_1 0      /* has it, template can't use it yet */
  63 #define HAVE_TRI_FANS    1
  64 #define HAVE_POLYGONS    1
  65 #define HAVE_QUADS       0
  66 #define HAVE_QUAD_STRIPS 0
  67
  68 #define HAVE_ELTS        0
  69
  70 static uint32_t hw_prim[GL_POLYGON + 1] = {
  71    0,
  72    PRIM3D_LINELIST,
  73    PRIM3D_LINESTRIP,
  74    PRIM3D_LINESTRIP,
  75    PRIM3D_TRILIST,
  76    PRIM3D_TRISTRIP,
  77    PRIM3D_TRIFAN,
  78    0,
  79    0,
  80    PRIM3D_POLY
  81 };
  82
  83 static const GLenum reduced_prim[GL_POLYGON + 1] = {
  84    GL_POINTS,
  85    GL_LINES,
  86    GL_LINES,
  87    GL_LINES,
  88    GL_TRIANGLES,
  89    GL_TRIANGLES,
  90    GL_TRIANGLES,
  91    GL_TRIANGLES,
  92    GL_TRIANGLES,
  93    GL_TRIANGLES
  94 };
  95
  96 static const int scale_prim[GL_POLYGON + 1] = {
  97    0,                           /* fallback case */
  98    1,
  99    2,
 100    2,
 101    1,
 102    3,
 103    3,
 104    0,                           /* fallback case */
 105    0,                           /* fallback case */
 106    3
 107 };
 108
 109
 110 static void
 111 intelDmaPrimitive(struct intel_context *intel, GLenum prim)
 112 {
 113    if (0)
 114       fprintf(stderr, "%s %s\n", __FUNCTION__, _mesa_lookup_enum_by_nr(prim));
 115    INTEL_FIREVERTICES(intel);
 116    intel->vtbl.reduced_primitive_state(intel, reduced_prim[prim]);
 117    intel_set_prim(intel, hw_prim[prim]);
 118 }
 119
 120
 121 #define LOCAL_VARS struct intel_context *intel = intel_context(ctx)
 122 #define INIT( prim )                            \
 123 do {                                            \
 124    intelDmaPrimitive( intel, prim );            \
 125 } while (0)
 126
 127 #define FLUSH() INTEL_FIREVERTICES(intel)
 128
 129 #define GET_SUBSEQUENT_VB_MAX_VERTS() (INTEL_VB_SIZE / (intel->vertex_size * 4))
 130 #define GET_CURRENT_VB_MAX_VERTS() \
 131    ((INTEL_VB_SIZE - intel->prim.current_offset) / (intel->vertex_size * 4))
 132
 133 #define ALLOC_VERTS(nr) intel_get_prim_space(intel, nr)
 134
 135 #define EMIT_VERTS( ctx, j, nr, buf ) \
 136   _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf )
 137
 138 #define TAG(x) intel_##x
 139 #include "tnl_dd/t_dd_dmatmp.h"
 140
 141
 142 /**********************************************************************/
 143 /*                          Render pipeline stage                     */
 144 /**********************************************************************/
 145
 146 /* Heuristic to choose between the two render paths:
 147  */
 148 static GLboolean
 149 choose_render(struct intel_context *intel, struct vertex_buffer *VB)
 150 {
 151    int vertsz = intel->vertex_size;
 152    int cost_render = 0;
 153    int cost_fallback = 0;
 154    int nr_prims = 0;
 155    int nr_rprims = 0;
 156    int nr_rverts = 0;
 157    int rprim = intel->reduced_primitive;
 158    int i = 0;
 159
 160    for (i = 0; i < VB->PrimitiveCount; i++) {
 161       GLuint prim = VB->Primitive[i].mode;
 162       GLuint length = VB->Primitive[i].count;
 163
 164       if (!length)
 165          continue;
 166
 167       nr_prims++;
 168       nr_rverts += length * scale_prim[prim & PRIM_MODE_MASK];
 169
 170       if (reduced_prim[prim & PRIM_MODE_MASK] != rprim) {
 171          nr_rprims++;
 172          rprim = reduced_prim[prim & PRIM_MODE_MASK];
 173       }
 174    }
 175
 176    /* One point for each generated primitive:
 177     */
 178    cost_render = nr_prims;
 179    cost_fallback = nr_rprims;
 180
 181    /* One point for every 1024 dwords (4k) of dma:
 182     */
 183    cost_render += (vertsz * i) / 1024;
 184    cost_fallback += (vertsz * nr_rverts) / 1024;
 185
 186    if (0)
 187       fprintf(stderr, "cost render: %d fallback: %d\n",
 188               cost_render, cost_fallback);
 189
 190    if (cost_render > cost_fallback)
 191       return GL_FALSE;
 192
 193    return GL_TRUE;
 194 }
 195
 196
 197 static GLboolean
 198 intel_run_render(GLcontext * ctx, struct tnl_pipeline_stage *stage)
 199 {
 200    struct intel_context *intel = intel_context(ctx);
 201    TNLcontext *tnl = TNL_CONTEXT(ctx);
 202    struct vertex_buffer *VB = &tnl->vb;
 203    GLuint i;
 204
 205    intel->vtbl.render_prevalidate( intel );
 206
 207    /* Don't handle clipping or indexed vertices.
 208     */
 209    if (intel->RenderIndex != 0 ||
 210        !intel_validate_render(ctx, VB) || !choose_render(intel, VB)) {
 211       return GL_TRUE;
 212    }
 213
 214    tnl->clipspace.new_inputs |= VERT_BIT_POS;
 215
 216    tnl->Driver.Render.Start(ctx);
 217
 218    for (i = 0; i < VB->PrimitiveCount; i++) {
 219       GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
 220       GLuint start = VB->Primitive[i].start;
 221       GLuint length = VB->Primitive[i].count;
 222
 223       if (!length)
 224          continue;
 225
 226       intel_render_tab_verts[prim & PRIM_MODE_MASK] (ctx, start,
 227                                                      start + length, prim);
 228    }
 229
 230    tnl->Driver.Render.Finish(ctx);
 231
 232    INTEL_FIREVERTICES(intel);
 233
 234    return GL_FALSE;             /* finished the pipe */
 235 }
 236
 237 static const struct tnl_pipeline_stage _intel_render_stage = {
 238    "intel render",
 239    NULL,
 240    NULL,
 241    NULL,
 242    NULL,
 243    intel_run_render             /* run */
 244 };
 245
 246 const struct tnl_pipeline_stage *intel_pipeline[] = {
 247    &_tnl_vertex_transform_stage,
 248    &_tnl_vertex_cull_stage,
 249    &_tnl_normal_transform_stage,
 250    &_tnl_lighting_stage,
 251    &_tnl_fog_coordinate_stage,
 252    &_tnl_texgen_stage,
 253    &_tnl_texture_transform_stage,
 254    &_tnl_point_attenuation_stage,
 255    &_tnl_vertex_program_stage,
 256 #if 1
 257    &_intel_render_stage,        /* ADD: unclipped rastersetup-to-dma */
 258 #endif
 259    &_tnl_render_stage,
 260    0,
 261 };